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* svga: fix min/max lod clampingBrian Paul2012-01-181-4/+6
| | | | | | | | | | The interaction between the mipmap lod min/max limits and the texture base/max level limits is kind of tricky. Changing the base level didn't work as expected before. NOTE: This is a candidate for the 8.0 branch. Reviewed-by: José Fonseca <[email protected]>
* svga: add 0.5 in float->int conversion of sample min/max lodBrian Paul2012-01-181-2/+2
| | | | | | | | This makes lod clamping more consistent with other drivers. NOTE: This is a candidate for the 8.0 branch. Reviewed-by: José Fonseca <[email protected]>
* st/mesa: pass GL_MAP_INVALIDATE_RANGE_BIT to gallium driversBrian Paul2012-01-182-0/+4
| | | | | | when mapping renderbuffers or texture images. NOTE: This is a candidate for the 8.0 branch.
* mesa: use GL_MAP_INVALIDATE_RANGE_BIT in glTexImage pathsBrian Paul2012-01-182-3/+9
| | | | | | | | | | | | | Update the dd.h docs to indicate that GL_MAP_INVALIDATE_RANGE_BIT can be used with GL_MAP_WRITE_BIT when mapping renderbuffers and texture images. Pass the flag when mapping texture images for glTexImage, glTexSubImage, etc. It's up to drivers whether to actually make use of the flag. NOTE: This is a candidate for the 8.0 branch. Reviewed-by: Ian Romanick <[email protected]>
* mesa: try RGBA_FLOAT16 before RGBA_FLOAT32 when choosing A,L,LA,I formatsBrian Paul2012-01-181-0/+4
| | | | | | | | | To try to use less tex memory and maybe get better performance. Spotted by Roland Scheidegger. NOTE: This is a candidate for the 8.0 and 7.11 branches. Reviewed-by: José Fonseca <[email protected]>
* mesa: fix tex format selection for GL_R32F and other R/G float formatsBrian Paul2012-01-181-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | The i965 driver advertises GL_ARB_texture_float and GL_ARB_texture_rg support but the ctx->TextureFormatSupported[] table entries for MESA_FORMAT_R_FLOAT32 and MESA_FORMAT_RGBA_FLOAT32 are false on gen 4 hardware. So the case for GL_R32F would fail and we'd print an implementation error. This patch adds more Mesa tex format options for GL_R32F and other R/G formats so we fall back to 16-bit formats when 32-bit formats aren't available. Eric made the same fix in commit 6216a5b4 for the non R/G formats. v2: try 16-bit formats before 32-bit formats and try RG formats before RGBA where possible. This should fix https://bugs.freedesktop.org/show_bug.cgi?id=44039 NOTE: This is a candidate for the 8.0 and 7.11 branches. Reviewed-by: José Fonseca <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* r600g: fix ISLT on r600/700Dave Airlie2012-01-181-1/+1
| | | | | | This fixes ISLT like evergreen. Signed-off-by: Dave Airlie <[email protected]>
* r600g: make r600/700 use correct ineg.Dave Airlie2012-01-181-1/+1
| | | | | | Noticed by Vadim Girlin on irc. Signed-off-by: Dave Airlie <[email protected]>
* r600g: fix some of the interpolation tests.Dave Airlie2012-01-181-5/+10
| | | | | | | This enables linear gradients if we need a linear, it also sets the flat shade flag for color/constant interpolations. Signed-off-by: Dave Airlie <[email protected]>
* i965: Bump Ivybridge's fake MRF range to g112-127 instead of g111-126.Kenneth Graunke2012-01-181-1/+9
| | | | | | | | | | | | | | | | | | | | | When I originally implemented the hack to use GRFs 111+ as fake MRFs, I did so purely to avoid rewriting all the code that dealt with MRFs. However, it turns out that a similar hack is actually required. Newly discovered language in the BSpec indicates that SEND instructions with EOT set "should" use g112-g127 as their source registers. Based on assertions in the simulator, this is actually a requirement on certain platforms. Since we're faking MRFs already, we may as well use the officially sanctioned range. My guess is that we avoided this issue because we seldom use m0: URB writes in the new VS backend start at m1, and RT writes in the new FS backend start at m2. NOTE: This is a candidate for stable release branches. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Remove the INTEL_OLD_VS option.Kenneth Graunke2012-01-183-10/+3
| | | | | | | | | | | | | | | Now that we no longer generate Mesa IR from GLSL IR, it's impossible to use the old vertex shader backend for GLSL programs. There's simply no Mesa IR to codegen from. Any attempt to do so would result in immediate GPU hangs, presumably due to the driver uploading an empty program with no EOT message. NOTE: This is a candidate for the 8.0 branch. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Eugeni Dodonov <[email protected]>
* mesa: Support GL_VERTEX_ATTRIB_ARRAY_INTEGER in GL 3.0 contexts.Kenneth Graunke2012-01-181-1/+1
| | | | | | | | | According to Table 6.8 (Page 348) in the OpenGL 3.0 specification, glGetVertexAttribiv supports GL_VERTEX_ATTRIB_ARRAY_INTEGER. NOTE: This is a candidate for the 8.0 branch. Signed-off-by: Kenneth Graunke <[email protected]>
* r600g: fix UINT_TO_FLT on evergreenVadim Girlin2012-01-181-1/+1
| | | | | | | It should be processed as trans-only. Signed-off-by: Vadim Girlin <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* i965/gen5: Fix rendering of depth buffers without stencil [v2]Chad Versace2012-01-171-2/+15
| | | | | | | | | | | | | | | | | | | | | | | | Fixes the following OGLConform tests on gen5: depth-stencil(misc.state_on.depth_int) fbo_db_ARBfp(basic.OnlyDepthBuffDrawBufferRender) The problem was that, if the depth buffer's Mesa format was X8_Z24, then we emitted the hardware format D24_UNORM_X8. But, on gen5, D24_UNORM_S8 must be emitted. This bug was introduced by: commit d84a180417d1eabd680554970f1eaaa93abcd41e Author: Eric Anholt <[email protected]> i965: Base HW depth format setup based on MESA_FORMAT, not bpp. v2: Deref 'intel' directly. Move the branch for newer chipset to top. Quote the PRM. As requested by Ken. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43408 Note: This is a candidate for the 8.0 branch. Reported-by: Xunx Fang <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Return if pointer to intel_context is nullAnuj Phogat2012-01-171-7/+7
| | | | | | | It is better to test if(intel == NULL) and simply return in that case. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* r600g: add workaround for original R600 PS setupAlex Deucher2012-01-171-2/+7
| | | | | | | | | The original R600 requires the UNCACHED_FIRST_INST bit to be set in the PS. Signed-off-by: Alex Deucher <[email protected]> Note: this is candidate for the stable branches.
* i965: Add .gitignore file to exclude automake build artifacts from git.Paul Berry2012-01-171-0/+6
| | | | | | | | | | | | | | | | | | With the conversion to automake in commit e326480e4ebe8687948041c2dc5f5b7595559a2e, several additional build artifacts are created: src/mesa/drivers/dri/i965/.deps/ src/mesa/drivers/dri/i965/.libs/ src/mesa/drivers/dri/i965/Makefile src/mesa/drivers/dri/i965/Makefile.in src/mesa/drivers/dri/i965/i965_dri.la src/mesa/drivers/dri/i965/i965_symbols_test This patch adds all of these files to .gitignore. Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Add condition in glGetTexImage for zero size texturesAnuj Phogat2012-01-172-1/+14
| | | | | | | | | | | | | | | | | | | | TestMipMaps() function in src/OGLconform/textureNPOT.c calls glTexImage2D() with width = 0. Texture with zero size skips miptree allocation due to a condition in function _mesa_store_teximage3d(). While calling glGetTexImage() it results in assertion failure in intel_map_texture_image() due to null mt pointer. This patch fixes the issue by detecting the zero size texture early in glGetTexImage and glGetCompressedTexImage functions. In such a case function simply returns doing nothing. Verified that below mentioned bug is fixed by this patch. https://bugs.freedesktop.org/show_bug.cgi?id=42334 NOTE: This is a candidate for stable branches Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* radeon: share common fog code between radeon and r200Alex Deucher2012-01-1717-259/+227
| | | | Signed-off-by: Alex Deucher <[email protected]>
* radeon: fix fog coordinate emitAlex Deucher2012-01-171-1/+1
| | | | | | | | | Noticed by dungeon on phoronix: http://phoronix.com/forums/showthread.php?65408-Radeon-R100-R200-Mesa-Driver-Sees-Attention&p=247018#post247018 Signed-off-by: Alex Deucher <[email protected]> Note: this is a candidate for the stable branches.
* r200: fix fog coordinate emitAlex Deucher2012-01-171-1/+1
| | | | | | | | | Noticed by dungeon on phoronix: http://phoronix.com/forums/showthread.php?65408-Radeon-R100-R200-Mesa-Driver-Sees-Attention&p=247018#post247018 Signed-off-by: Alex Deucher <[email protected]> Note: this is a candidate for the stable branches.
* r600g: fix recip_uint on r600.Dave Airlie2012-01-181-0/+1
| | | | Signed-off-by: Dave Airlie <[email protected]>
* r600g: fix USLT for r600-egVadim Girlin2012-01-171-2/+2
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* scons: Add Haiku build supportAlexander von Gluck IV2012-01-173-11/+24
| | | | Enables building stock Mesa under the Haiku operating system.
* r600g: rework IDIV/UDIV and implement MOD/UMOD (v2)Vadim Girlin2012-01-172-133/+593
| | | | | Signed-off-by: Vadim Girlin <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* i965: Convert the build to using automake.Eric Anholt2012-01-174-34/+88
| | | | | | | | | | | | | | | | | This does introduce a warning by the automake build system, that the missing-symbols test build is non-portable. That's true -- Mac OS X can't take something built as a loadable module and just link it as a library. Of course, we aren't building this on OS X at all, so it would be nice to be able to suppress it, but I haven't found a way. Still, the build is going to be much quieter than we have ever had before, so I think this is a fair tradeoff until we find a way to shut that warning up. v2: Put a link in /lib to avoid transition pains for people. Reviewed-by: Ian Romanick <[email protected]> (v1) Reviewed-by: Matt Turner <[email protected]> (v1)
* intel: Drop the version override code now that we don't have any left.Eric Anholt2012-01-171-8/+0
| | | | | | | | Fixes a compiler warning. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* intel: Fix warnings of undefined ffs().Eric Anholt2012-01-171-0/+1
| | | | | | | | For some reason these started showing up with the automake conversion. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* Complete ARGB8888 naming convention format renames missedScott Moreau2012-01-171-4/+3
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* i965: Fix gen6,gen7 when used with a non-HiZ capable DDXChad Versace2012-01-161-4/+13
| | | | | | | | | | | | | | | | | | | | | Nothing works if HiZ is enabled and the DDX is incapable of HiZ (that is, the DDX version is < 2.16). The problem is that the refactoring that eliminated intel_renderbuffer::stencil_rb broke the recovery path in intel_verify_dri2_has_hiz(). Specifically, it broke line intel_context.c:1445, which allocates the region for DRI_BUFFER_DEPTH_STENCIL. That allocation was creating a separate stencil miptree, despite the buffer being a packed depthstencil buffer. Havoc ensued. This patch introduces a bool flag that prevents allocation of that stencil miptree. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44103 Tested-by: Ian Romanick <[email protected]> Note: This is a candidate for the 8.0 branch. Signed-off-by: Chad Versace <[email protected]>
* softpipe: Silence unused variable warning on non-LLVM builds.Vinson Lee2012-01-161-0/+2
| | | | | | | | | Fix this GCC warning with non-LLVM builds. sp_screen.c: In function ‘softpipe_get_shader_param’: sp_screen.c:141:28: warning: unused variable ‘sp_screen’ [-Wunused-variable] Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* intel: Fix segfault in glXSwapBuffers with no bound contextAnuj Phogat2012-01-161-5/+7
| | | | | | | | | | | | | | Calling glXSwapBuffers with no bound context causes segmentation fault in function intelDRI2Flush. All the gl calls should be ignored after setting the current context to null. So the contents of framebuffer stay unchanged. But the driver should not seg fault. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44614 Reported-by: Yi Sun <[email protected]> Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Tested-by: Yi Sun <[email protected]>
* llvmpipe: Remove unused variable 'packed' from lp_test_round.Vinson Lee2012-01-161-2/+0
| | | | | | | | | | Fix this GCC warning. lp_test_round.c: In function ‘test_round’: lp_test_round.c:126:13: warning: variable ‘packed’ set but not used [-Wunused-but-set-variable] Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: José Fonseca <[email protected]>
* util: Silence GCC unused-but-set-variable warning.Vinson Lee2012-01-161-0/+2
| | | | | | | | | | Fix this GCC 4.6 warning with 64-bit builds. u_debug_stack.c: In function ‘debug_backtrace_capture’: u_debug_stack.c:45:17: warning: variable ‘frame_pointer’ set but not used [-Wunused-but-set-variable] Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: José Fonseca <[email protected]>
* vl: Make array initialization portable.José Fonseca2012-01-161-1/+4
| | | | Should fix MSVC build.
* i915g: Fix the blending for the A8 destination buffer case.Stéphane Marchesin2012-01-154-12/+29
| | | | | | | | | The i915 GPU can't do A8 dst, so we abuse GREEN8 buffers for that purpose. However, things get hairy as we start to do blending, because then GL_DST_*_ALPHA should be replaced with GL_DST_*_COLOR. This is what we do here. Fixes piglt fbo-alpha.
* r200: remove left-over EGL_SOURCES variableMatt Turner2012-01-151-1/+0
| | | | | | Rest was removed in 2a928899e. Signed-off-by: Matt Turner <[email protected]>
* r600g: fix mullo_uint trans slot only on r600/r700Dave Airlie2012-01-151-1/+1
| | | | | | This fixes 8 piglit tests that currently assert. Signed-off-by: Dave Airlie <[email protected]>
* r600g: implement clip distancesVadim Girlin2012-01-156-17/+111
| | | | | Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600g: implement two-sided lighting (v3)Vadim Girlin2012-01-156-25/+135
| | | | | | | | | v2: select the colors in the pixel shader v3: fix rs state creation for pre-evergreen Signed-off-by: Vadim Girlin <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600g: add support for ISHR/USHR/SHL on r600-evergreenVadim Girlin2012-01-152-10/+13
| | | | Signed-off-by: Vadim Girlin <[email protected]>
* r600g: implement IDIV/UDIV on r600-evergreenVadim Girlin2012-01-151-4/+222
| | | | Signed-off-by: Vadim Girlin <[email protected]>
* r600g: implement ISSG on r600-evergreenVadim Girlin2012-01-151-0/+63
| | | | Signed-off-by: Vadim Girlin <[email protected]>
* r600g: implement IABS on r600-evergreenVadim Girlin2012-01-151-0/+60
| | | | Signed-off-by: Vadim Girlin <[email protected]>
* r600g: implement F2U on evergreenVadim Girlin2012-01-151-2/+2
| | | | Signed-off-by: Vadim Girlin <[email protected]>
* r600g: add FLT_TO_UINT opcode for evergreenVadim Girlin2012-01-152-1/+4
| | | | Signed-off-by: Vadim Girlin <[email protected]>
* r600g: fix F2I on evergreenVadim Girlin2012-01-151-1/+50
| | | | Signed-off-by: Vadim Girlin <[email protected]>
* vl: fix YV12 handlingChristian König2012-01-154-9/+49
| | | | | | We actually implemented YV21 instead of YV12, so fix the plane ordering. Signed-off-by: Christian König <[email protected]>
* st/vdpau: recreate video buffer if decode doesn't like itChristian König2012-01-151-1/+21
| | | | | | Recreate the video buffer if the decoder can't handle it. Signed-off-by: Christian König <[email protected]>
* st/vdpau: recreate video buffer if format doesn't matchChristian König2012-01-152-19/+37
| | | | | | Recreate the video buffer in PutBitsYCbCr if the format doesn't match. Signed-off-by: Christian König <[email protected]>
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