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* i965: Push down inclusion of brw_program.h.Matt Turner2015-11-2418-5/+15
| | | | | | | We were including it in headers, which then caused it to be included in tons of places it wasn't needed. Reviewed-by: Ian Romanick <[email protected]>
* i965: Mark functions called from C as extern "C".Matt Turner2015-11-242-3/+3
| | | | | | | | These functions' prototypes are marked with extern "C", which apparently overrides a lack of extern "C" at the definition site if the prototype has been seen first. Reviewed-by: Ian Romanick <[email protected]>
* i965: Push down inclusion of vbo/vbo.h.Matt Turner2015-11-242-1/+1
| | | | Reviewed-by: Ian Romanick <[email protected]>
* i965: Remove duplicate #includes.Matt Turner2015-11-241-2/+0
| | | | | | | Added in commits 36fd65381 and 337dad8ce even though the existing include was in view. Reviewed-by: Ian Romanick <[email protected]>
* i965: Remove unneeded forward declarations.Matt Turner2015-11-244-8/+0
| | | | Reviewed-by: Ian Romanick <[email protected]>
* i965: Mark count_trailing_one_bits() static.Matt Turner2015-11-241-1/+1
| | | | Reviewed-by: Ian Romanick <[email protected]>
* i965: Remove useless gen6_blorp.h/gen7_blorp.h headers.Matt Turner2015-11-247-88/+7
| | | | Reviewed-by: Ian Romanick <[email protected]>
* util: Include assert.h in macros.h.Matt Turner2015-11-241-0/+2
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* util: Include <stdbool.h> in debug.h.Matt Turner2015-11-241-0/+1
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* i965: Prevent implicit upcasts to brw_reg.Matt Turner2015-11-247-14/+49
| | | | | | | Now that backend_reg inherits from brw_reg, we have to be careful to avoid the object slicing problem. Reviewed-by: Francisco Jerez <[email protected]>
* i965: Use scope operator to ensure brw_reg is interpreted as a type.Matt Turner2015-11-244-6/+6
| | | | | | | | | | | | | | | | | | | In the next patch, I make backend_reg's inheritance from brw_reg private, which confuses clang when it sees the type "struct brw_reg" in the derived class constructors, thinking it is referring to the privately inherited brw_reg: brw_fs.cpp:366:23: error: 'brw_reg' is a private member of 'brw_reg' fs_reg::fs_reg(struct brw_reg reg) : ^ brw_shader.h:39:22: note: constrained by private inheritance here struct backend_reg : private brw_reg ^~~~~~~~~~~~~~~ brw_reg.h:232:8: note: member is declared here struct brw_reg { ^ Avoid this by marking brw_reg with the scope resolution operator.
* i965: Use implicit backend_reg copy-constructor.Matt Turner2015-11-242-5/+3
| | | | | | | | | | | | | | In order to do this, we have to change the signature of the backend_reg(brw_reg) constructor to take a reference to a brw_reg in order to avoid unresolvable ambiguity about which constructor is actually being called in the other modifications in this patch. As far as I understand it, the rule in C++ is that if multiple constructors are available for parent classes, the one closest to you in the class heirarchy is closen, but if one of them didn't take a reference, that screws things up. Reviewed-by: Francisco Jerez <[email protected]>
* i965: Add and use backend_reg::equals().Matt Turner2015-11-244-6/+12
| | | | Reviewed-by: Francisco Jerez <[email protected]>
* softpipe/llvmpipe: don't advertize support for ASTCRoland Scheidegger2015-11-242-2/+4
| | | | | | | | | 33339775565154040e0c4ea2e196217dccc08cdf added support for ASTC textures to gallium. They don't have any helpers hooked up for software decoding, however, so cannot support them in drivers relying on util code for decoding. Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* llvmpipe: don't test for unsupported formats in lp_test_formatRoland Scheidegger2015-11-241-0/+12
| | | | | | | | | | | | | Removing the fake format helpers (1c7d0a6aa4f5cb38af7e281e1e5437cd1a20f781) caused this to fail. These formats were never supported, but previously they would have asserted in the generated jit functions (which, due to lack of test cases for these formats, were never called) whereas we now assert when trying to build the jit function. So, skip them completely. This fixes https://bugs.freedesktop.org/show_bug.cgi?id=93092 Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* util: move brw_env_var_as_boolean() to utilRob Clark2015-11-247-31/+35
| | | | | | | | Kind of a handy function. And I'll want it available outside of i965 for common nir-pass helpers. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* st/va: fix indentationChristian König2015-11-241-7/+7
| | | | | | Signed-off-by: Christian König <[email protected]> Reviewed-by: Julien Isorce <[email protected]> Reviewed-by: Leo Liu <[email protected]>
* st/va: move MPEG4 functions into separate fileChristian König2015-11-244-180/+220
| | | | | | Signed-off-by: Christian König <[email protected]> Reviewed-by: Julien Isorce <[email protected]> Reviewed-by: Leo Liu <[email protected]>
* st/va: move VC-1 functions into separate fileChristian König2015-11-244-35/+70
| | | | | | Signed-off-by: Christian König <[email protected]> Reviewed-by: Julien Isorce <[email protected]> Reviewed-by: Leo Liu <[email protected]>
* st/va: move H264 functions into separate fileChristian König2015-11-244-72/+121
| | | | | | Signed-off-by: Christian König <[email protected]> Reviewed-by: Julien Isorce <[email protected]> Reviewed-by: Leo Liu <[email protected]>
* st/va: move MPEG12 functions into separate fileChristian König2015-11-244-49/+92
| | | | | | Signed-off-by: Christian König <[email protected]> Reviewed-by: Julien Isorce <[email protected]> Reviewed-by: Leo Liu <[email protected]>
* st/va: move post processing function into own fileChristian König2015-11-244-57/+100
| | | | | | Signed-off-by: Christian König <[email protected]> Reviewed-by: Julien Isorce <[email protected]> Reviewed-by: Leo Liu <[email protected]>
* st/va: fix post process dirty area handlingChristian König2015-11-241-4/+1
| | | | | | | | | | The dirty area in this call isn't related to the screen at all. v2: set clear dirty area to false as well Signed-off-by: Christian König <[email protected]> Reviewed-by: Julien Isorce <[email protected]> Reviewed-by: Leo Liu <[email protected]>
* glsl: implement recent spec update to SSO validationTimothy Arceri2015-11-241-0/+24
| | | | | | | | | | | | | Enables 200+ dEQP SSO tests to proceed past validation, and fixes a ES31-CTS.sepshaderobjs.PipelineApi subtest. V2: split out change that reverts a previous patch into its own commit, move variable declaration to top of function, and fix some formatting all suggested by Ian. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Cc: "11.1" <[email protected]>
* Revert "mesa: return initial value for VALIDATE_STATUS if pipe not bound"Timothy Arceri2015-11-241-2/+1
| | | | | | | | | | | | | | This reverts commit ba02f7a3b6a0e4314753a8e5080db61241563f9c. The commit checked whether the pipeline was currently bound instead of checking whether it had ever been bound. The previous setting of Validated during object creation makes this unnecessary. The real problem was that Validated was not properly set to false elsewhere in the code. This is fixed by a later patch. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Cc: "11.1" <[email protected]>
* radeon/llvm: Use llvm.AMDIL.exp intrinsic again for nowMichel Dänzer2015-11-241-1/+1
| | | | | | | | llvm.exp2.f32 doesn't work in some cases yet. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92709 Reviewed-by: Nicolai Hähnle <[email protected]>
* radeon/uvd: uv pitch separation for stoneyBoyuan Zhang2015-11-232-1/+6
| | | | | | | | v2: set the behaviour default for future ASICs. Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Leo Liu <[email protected]> Cc: [email protected]
* texgetimage: consolidate 1D array handling code.Dave Airlie2015-11-241-15/+11
| | | | | | | | | | | | | This should fix the getteximage-depth test that currently asserts. I was hitting problem with virgl as well in this area. This moves the 1D array handling code to a single place. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Ben Skeggs <[email protected]> Cc: "10.6 11.0 11.1" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* i965: Use NIR for lowering texture swizzleJason Ekstrand2015-11-236-196/+44
| | | | | | | | | | Now that nir_lower_tex can do texture swizzle lowering, we can use that instead of repeating more-or-less the same code in both backends. This both allows us to share code and means that things like the tg4 work-arounds are somewhat simpler because they don't have to take the swizzle into account. Reviewed-by: Connor Abbott <[email protected]>
* nir/lower_tex: Add support for lowering texture swizzleJason Ekstrand2015-11-232-0/+80
| | | | Reviewed-by: Connor Abbott <[email protected]>
* nir: Add a tex_instr_is_query helperJason Ekstrand2015-11-231-0/+25
| | | | Reviewed-by: Connor Abbott <[email protected]>
* nir: Add a ssa_def_rewrite_uses_after helperJason Ekstrand2015-11-232-0/+51
| | | | Reviewed-by: Connor Abbott <[email protected]>
* nir: Use instr/if_rewrite in nir_ssa_def_rewrite_usesJason Ekstrand2015-11-231-12/+4
| | | | | | | nir_ssa_def_rewrite_uses is one of the older helpers in NIR and predated both of those. Now it can be substantially simplified. Reviewed-by: Connor Abbott <[email protected]>
* nir/validate: Validated dests after sourcesJason Ekstrand2015-11-231-9/+9
| | | | | | | | | | | | | Previously, if someone accidentally made an instruction that refers to its own SSA destination, the validator wouldn't catch it. The reason for this is that it validated the destination too early and, by the time it got to the source, the destination SSA value was already added to the set of seen SSA values so it would assume that it came from some previous instruction. By moving destination validation to be after source validation, the SSA value is not in the list of seen values and the validator will catch self-referential instructions. Reviewed-by: Connor Abbott <[email protected]>
* i965: Use nir_lower_tex for texture coordinate loweringJason Ekstrand2015-11-238-131/+42
| | | | | | | | | | Previously, we had a rescale_texcoords helper in the FS backend for handling rescaling of texture coordinates. Now that we can do variants in NIR, we can use nir_lower_tex to do the rescaling for us. This allows us to delete the i965-specific code and gives us proper TEXTURE_RECTANGLE and GL_CLAMP handling in vertex and geometry shaders. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Stomp the texture return type to UINT32 for resinfo messagesJason Ekstrand2015-11-231-0/+11
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* nir/lower_tex: Set the dest_type for txs instructionsJason Ekstrand2015-11-231-0/+1
| | | | Reviewed-by: Iago Toral Quiroga <[email protected]>
* nir/lower_tex: Report progressJason Ekstrand2015-11-233-6/+17
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965: Move postprocess_nir to codegen timeJason Ekstrand2015-11-234-5/+20
| | | | | | | | | This allows us to insert NIR passes between initial NIR compilation and optimization (link time) and actual backend code-gen. In particular, it will allow us to do shader variants in NIR and share some of that shader variant code between backends. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/nir: Split shader optimization and lowering into three stagesJason Ekstrand2015-11-232-38/+104
| | | | | | | | | At the moment, brw_create_nir just calls the three stages in sequence so there's not much difference. Soon, however, we will want to start doing variants in NIR at which point the postprocessing step will have to move from shader create time to codegen time. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965: Use ull immediates in brw_inst_bitsJason Ekstrand2015-11-231-2/+2
| | | | | | | | This fixes a regression introduced in b1a83b5d1 that caused basically all shaders to fail to compile on 32-bit platforms. Reported-by: Mark Janes <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* svga: Add ASTC formats to format table.Jose Fonseca2015-11-231-0/+28
| | | | | | Fixes build. Otherwise untested. Trivial.
* freedreno/ir3: add support for a few gs5 opsIlia Mirkin2015-11-231-0/+27
| | | | | | | Tested on a4xx. This is part of the builtins added by ARB_gpu_shader5 and GLSL ES 3.10. Signed-off-by: Ilia Mirkin <[email protected]>
* ttn: fix UMSB conversionIlia Mirkin2015-11-231-1/+1
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* freedreno/a4xx: add ARB_texture_query_lod supportIlia Mirkin2015-11-232-6/+20
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* ttn: add LODQ supportIlia Mirkin2015-11-231-2/+9
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* freedreno/a4xx: re-emit program on dirty framebufferIlia Mirkin2015-11-231-1/+1
| | | | | | | The program emit depends on certain fb details. Make sure those get updated when the fb changes. Signed-off-by: Ilia Mirkin <[email protected]>
* freedreno/a4xx: use a factor of 32767 for snorm8 blendingIlia Mirkin2015-11-231-5/+34
| | | | | | | | | | | | It appears that the hardware wants the integer to be scaled the same way that the hardware representation is. snorm16 uses one of the float factors, so this is only relevant for snorm8. This fixes a number of subcases of bin/fbo-blending-formats GL_EXT_texture_snorm Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* freedreno/a4xx: only compute texture offset once for the viewIlia Mirkin2015-11-233-13/+6
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* freedreno/a4xx: add ARB_texture_view supportIlia Mirkin2015-11-233-8/+10
| | | | Signed-off-by: Ilia Mirkin <[email protected]>