| Commit message (Collapse) | Author | Age | Files | Lines |
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V3: use frame_buffer_texture_layer() helper
Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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To be used to add KHR_no_error support while sharing code between
the DSA and non-DSA OpenGL function.
Reviewed-by: Nicolai Hähnle <[email protected]>
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V3: use always_inline attribute (Suggested by Nicolai)
Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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All combined depth stencil buffers (even those with just stencil)
require a 4x4 alignment on Sandy Bridge. The only depth/stencil buffer
type that requires 4x2 is separate stencil.
Reviewed-by: Chad Versace <[email protected]>
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Reviewed-by: Topi Pohjolainen <[email protected]>
Reviewed-by: Chad Versace <[email protected]>
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Reviewed-by: Topi Pohjolainen <[email protected]>
Reviewed-by: Chad Versace <[email protected]>
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The Ivy Bridge PRM provides a nice table that handles most of the
alignment cases in one place. For standard color buffers we have a
little freedom of choice but for most depth, stencil and compressed it's
hard-coded. Chad's original functions split halign and valign apart and
implemented them almost entirely based on restrictions and not the
table. This makes things way more confusing than they need to be. This
commit gets rid of the split and makes us implement the exact table
up-front. If our surface isn't one of the ones in the table then we
have to make real choices.
Reviewed-by: Topi Pohjolainen <[email protected]>
Reviewed-by: Chad Versace <[email protected]>
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The reasoning Chad gave in the comment for choosing a valign of 4 is
entirely bunk. The fact that you have to multiply pitch by 2 is
completely unrelated to the halign/valign parameters used for texture
layout. (Not completely unrelated. W-tiling is just Y-tiling with a
bit of extra swizzling which turns 8x8 W-tiled chunks into 16x4 y-tiled
chunks so it makes everything easier if miplevels are always aligned to
8x8.) The fact that RENDER_SURFACE_STATE::SurfaceVerticalAlignmet
doesn't have a VALIGN_8 option doesn't matter since this is gen7 and you
can't do stencil texturing anyway.
v2 (Jason Ekstrand):
- Delete most of Chad's comment and add a more descriptive commit
message.
Signed-off-by: Topi Pohjolainen <[email protected]>
Cc: "17.0 17.1" <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Reviewed-by: Chad Versace <[email protected]>
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On all 3 gens, we have 4 bits for width and height in the VSC pipe
config. And overflow results in setting width and/or height to zero
which causes hangs.
Signed-off-by: Rob Clark <[email protected]>
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Atomics can have a result value. And sometimes it is even used.
Signed-off-by: Rob Clark <[email protected]>
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Don't reject YUV formats that the driver doesn't handle natively, since
mesa/st already knows how to lower this in shader.
Reported-by: Nicolas Dechesne <[email protected]>
Fixes: 83e9de2 ("st/mesa: EGLImageTarget* error handling")
Cc: 17.1 <[email protected]
Signed-off-by: Rob Clark <[email protected]>
Tested-by: Nicolas Dechesne <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Some, like lod, don't return 4 components.
Signed-off-by: Rob Clark <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
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Signed-off-by: Rob Clark <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
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Signed-off-by: Rob Clark <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
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Signed-off-by: Rob Clark <[email protected]>
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We probably *could* do this with blit path, but I think it would involve
clobbering settings from batch->gmem (see emit_zs()).
Signed-off-by: Rob Clark <[email protected]>
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Just increment the resource seqno instead of setting the texture
seqno to be lower by one than the resource seqno.
Signed-off-by: Philipp Zabel <[email protected]>
Signed-off-by: Lucas Stach <[email protected]>
Reviewed-By: Wladimir J. van der Laan <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
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Use the proper pipe_resource_reference function instead of
rolling our own.
Signed-off-by: Lucas Stach <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
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This way we can just test the feature bits and don't need to spread
the debug overrides to all locations touching a feature.
Signed-off-by: Lucas Stach <[email protected]>
Reviewed-By: Wladimir J. van der Laan <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
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Fixes: 7f62ffb68ad ("etnaviv: add support for rb swap")
Cc: [email protected]
Signed-off-by: Lucas Stach <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
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PIPE_BUFFER is a target enum, not a binding. This caused the driver to
up-align the height of buffer resources, leading to largely oversizing
those resources. This is especially bad, as the buffer resources used
by the upload manager are already 1MB in size. Height alignment meant
that those would result in 4 to 8MB big BOs.
Fixes: c9e8b49b885 ("etnaviv: gallium driver for Vivante GPUs")
Cc: [email protected]
Signed-off-by: Lucas Stach <[email protected]>
Reviewed-By: Wladimir J. van der Laan <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
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Broken by commit a7217e909ce6 ("i965: Pass pointer and end of assembly
to brw_validate_instructions").
Reported-by: Aaron Watry <[email protected]>
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Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
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Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
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Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
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Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
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Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
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Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
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It's about time to get the growth of si_shader.c somewhat under control.
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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Coverity doesn't understand that we'll never pass non-NULL for vertex
shaders.
This is a bit lame, actually. A straightforward cross-procedural analysis
limited to this source file should be enough to prove that there's no
NULL-pointer dereference. Oh well.
CID: 1405999
Reviewed-by: Marek Olšák <[email protected]>
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What we care about is whether PrimID is used while tessellation is
enabled; whether it's used in TCS/TES or further down the pipeline is
irrelevant.
Reviewed-by: Marek Olšák <[email protected]>
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This builds on commit 0549ea15ec38 ("radeonsi: fix primitive ID in
fragment shader when using tessellation").
Fixes piglit
arb_tessellation_shader/execution/gs-primitiveid-instanced.shader_test
Cc: 17.1 <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Elie Tournier <[email protected]>
Reviewed-by: Timothy Arceri <[email protected]>
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Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Elie Tournier <[email protected]>
Reviewed-by: Timothy Arceri <[email protected]>
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Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Elie Tournier <[email protected]>
Reviewed-by: Timothy Arceri <[email protected]>
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Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Elie Tournier <[email protected]>
Reviewed-by: Timothy Arceri <[email protected]>
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Reviewed-by: Samuel Pitoiset <[email protected]>
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Reviewed-by: Samuel Pitoiset <[email protected]>
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Reviewed-by: Samuel Pitoiset <[email protected]>
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All drivers but the old nouveau dri driver return after this anyway.
Reviewed-by: Samuel Pitoiset <[email protected]>
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There should be no way the OpenGL test suites don't hit the assert()
should we do something to cause this code path to be taken.
Reviewed-by: Samuel Pitoiset <[email protected]>
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From Seciton 7.6 (UNIFORM VARIABLES) of the OpenGL 4.5 spec:
"If the value of location is -1, the Uniform* commands will
silently ignore the data passed in, and the current uniform values
will not be changed.
Reviewed-by: Samuel Pitoiset <[email protected]>
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Reviewed-by: Topi Pohjolainen <[email protected]>
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Reviewed-by: Topi Pohjolainen <[email protected]>
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