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* winsys/radeon: remove definitions already present in radeon_drm.hMarek Olšák2014-04-104-205/+5
* winsys/radeon: handle squared micro tiling from GEM_GET_TILINGMarek Olšák2014-04-101-0/+2
* gallium/u_gen_mipmap: rewrite using pipe->blit (v2)Marek Olšák2014-04-106-566/+81
* st/mesa: properly implement MapTextureImage with multiple mapped slices (v2)Marek Olšák2014-04-103-21/+53
* mesa: remove the MALLOC, CALLOC and FREE macrosBrian Paul2014-04-101-6/+0
* xlib: s/FREE/free/Brian Paul2014-04-101-1/+1
* mesa: s/FREE/free/ in vdpau codeBrian Paul2014-04-101-4/+4
* mesa: s/FREE/free/ in _mesa_free_errors_data()Brian Paul2014-04-101-1/+1
* mesa: use malloc/free instead of MALLOC/FREE in attrib stack codeBrian Paul2014-04-101-10/+10
* st/mesa: fix sampler_view REALLOC/FREE macro mix-upBrian Paul2014-04-103-1/+16
* i965: Enable ARB_texture_view on Gen7Chris Forbes2014-04-101-0/+4
* i965: Account for view parameters in blit CTSI pathChris Forbes2014-04-101-2/+7
* i965: Account for MinLayer/MinLevel in blorp CTSI pathChris Forbes2014-04-101-3/+6
* i965: Account for view parameters in fast depth clearsChris Forbes2014-04-101-3/+3
* i965/blorp: Account for nonzero MinLayer in layered clears.Chris Forbes2014-04-101-1/+1
* i965/blorp: Use irb->layer_count in clearChris Forbes2014-04-101-2/+1
* i965: Add layer_count to intel_renderbufferChris Forbes2014-04-102-0/+13
* i965: Pull out layer_multiplier in intel_update_renderbuffer_wrapperChris Forbes2014-04-101-2/+5
* i965: Add `layered` parameter to intel_update_renderbuffer_wrapperChris Forbes2014-04-101-3/+4
* i965: Adjust renderbuffer wrapper to account for MinLevel/MinLayerChris Forbes2014-04-101-0/+4
* i965: Enable texture upload fast path with MinLevelChris Forbes2014-04-101-1/+1
* i965: Account for MinLevel in texture upload fast pathChris Forbes2014-04-101-2/+4
* i965: Adjust map/unmap code for MinLevel/MinLayerChris Forbes2014-04-101-3/+8
* i965: Don't try to use fast upload path for nontrivial viewsChris Forbes2014-04-101-0/+4
* i965: Adjust surface_state emission to account for view parametersChris Forbes2014-04-101-5/+14
* i965: Add _Format to intel_texobj.Chris Forbes2014-04-103-0/+16
* i965: Add driver hook for TextureViewChris Forbes2014-04-101-0/+41
* i965: Ensure that texture validation is skipped for immutable textures.Chris Forbes2014-04-101-0/+5
* i965: refactor format selection for unsupported ETC* formatsChris Forbes2014-04-102-34/+45
* i965: refactor format munging for separate stencilChris Forbes2014-04-102-8/+26
* i965: Include #slices in miptree debugChris Forbes2014-04-101-2/+2
* mesa: Adjust _MaxLevel computation to account for viewsChris Forbes2014-04-101-0/+7
* mesa: Prefer non-swizzled formats for most sized internalformatsChris Forbes2014-04-101-4/+18
* i965: Render R8G8B8X8 as R8G8B8A8Chris Forbes2014-04-101-0/+3
* i965: Pretend we don't support BRW_SURFACEFORMAT_R16G16B16_FLOAT for textures.Chris Forbes2014-04-101-1/+1
* i965: Enable R10G10B10A2_UNORM formatChris Forbes2014-04-101-0/+1
* i965: Enable R8G8B8A8_UNORM_SRGB formatChris Forbes2014-04-101-0/+1
* swrast: Add support for fetching from MESA_FORMAT_R10G10B10A2_UNORMChris Forbes2014-04-102-3/+16
* mesa: fix packing of float texels to GL_SHORT/GL_BYTEChris Forbes2014-04-101-58/+58
* r600g: Don't leak bytecode on shader compile failureMichel Dänzer2014-04-101-7/+12
* build: force .so extension for the gallium dri modulesEmil Velikov2014-04-091-0/+1
* Partially revert bba9c28 "configure: use LIB_EXT rather than hardcoded .so"Jon TURNEY2014-04-091-13/+13
* Partially revert "st/xa: Fix advertized version number and try to avoid futur...Emil Velikov2014-04-091-3/+3
* glx: drop obsolete _XUnlock_Mutex in __glXInitialize error pathEmil Velikov2014-04-091-3/+1
* freedreno/a3xx: assert() -> debug_assert()Rob Clark2014-04-091-1/+1
* svga: move LIST_INITHEAD(dirty_buffers) earlier in svga_context_create()Brian Paul2014-04-091-2/+2
* i965: Stop advertising GL_MESA_ycbcr_texture.Kenneth Graunke2014-04-091-1/+0
* freedreno/a3xx/compiler: add CEILRob Clark2014-04-091-0/+1
* freedreno/a3xx/compiler: fix neg mov'sRob Clark2014-04-091-20/+1
* radeonsi: allow fast color clear and Hyper-Z with 1D-tiled surfaces on CIKMarek Olšák2014-04-091-5/+5
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