summaryrefslogtreecommitdiffstats
path: root/src
Commit message (Collapse)AuthorAgeFilesLines
* vc4: Make r4-writes implicitly move to a temp, and allocate temps to r4.Eric Anholt2015-08-048-107/+106
| | | | | | | | | | | Previously, SFU values always moved to a temporary, and TLB color reads and texture reads always lived in r4. Instead, we can have these results just be normal temporaries, and the register allocator can leave the values in r4 when they don't interfere with anything else using r4. shader-db results: total instructions in shared programs: 100809 -> 100040 (-0.76%) instructions in affected programs: 42383 -> 41614 (-1.81%)
* vc4: Drop a dead prototype.Eric Anholt2015-08-041-8/+0
|
* Revert "nir: Use a single bit for the dual-source blend index"Eric Anholt2015-08-041-6/+2
| | | | | This reverts commit ab5b7a0fe659ff6f9c1885d5cb047b6531959506. We use more than one bit of value in tgsi_to_nir.
* freedreno/a4xx: add independent blend function supportRob Clark2015-08-042-8/+10
| | | | | | needed for MRT Signed-off-by: Rob Clark <[email protected]>
* freedreno/a4xx: MRT supportRob Clark2015-08-0412-132/+212
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: move the half-precision logic into coreRob Clark2015-08-044-31/+38
| | | | | | | | Both a3xx and a4xx need the same logic to decide if half-precision can be used for blit shaders. So move it to core and simplify things a bit with a helper that considers all render targets. Signed-off-by: Rob Clark <[email protected]>
* freedreno: simplify/cleanup resource status trackingRob Clark2015-08-044-48/+71
| | | | | | | | | Collapse dirty/reading bools into status bitmask (and drop writing which should really be the same as dirty). And use 'used_resources' list for all tracking, including zsbuf/cbufs, rather than special casing the color and depth/stencil buffers. Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix stream-out caps vec4->componentsRob Clark2015-08-041-2/+2
| | | | | | Should be in units of components, not vec4's Signed-off-by: Rob Clark <[email protected]>
* freedreno: small bit of cleanup about max rendertargetsRob Clark2015-08-0413-17/+40
| | | | | | | | We hard-coded 4 or 8 as the max in various places. Switch it all to a define since the limit will go up with a4xx (and maybe even again in the future?) Signed-off-by: Rob Clark <[email protected]>
* glx: Use _mesa_lroundevenf() in glPixelStoref().Matt Turner2015-08-041-12/+13
| | | | | | Functional change in which way half-way cases are rounded from towards positive-infinity to even. The spec says "the passed value is rounded to the nearest integer". Removes another case of bad half-up rounding.
* util: Use SSE intrinsics in _mesa_lroundeven{f,}.Matt Turner2015-08-041-0/+22
| | | | | | | | | | | | | | gcc actually generates this for us now that we use -fno-math-errno (which is weird, since lrintf()/lrint() don't set errno) but clang still does not. Presumably helps MSVC as well. Reduced .text size by 8.5k with gcc before -fno-math-errno. text data bss dec hex filename 4935850 195136 26192 5157178 4eb13a i965_dri.so before 4927225 195128 26192 5148545 4e8f81 i965_dri.so after Reviewed-by: Roland Scheidegger <[email protected]>
* mesa: Use _mesa_lroundevenf() in some more places.Matt Turner2015-08-042-12/+6
|
* vl/mpeg12: Silence GCC unused-variable warning.Vinson Lee2015-08-031-0/+1
| | | | | | | | | | vl/vl_mpeg12_bitstream.c: In function 'decode_slice': vl/vl_mpeg12_bitstream.c:928:19: warning: unused variable 'extra' [-Wunused-variable] unsigned extra = vl_vlc_get_uimsbf(&bs->vlc, 1); ^ Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Christian König <[email protected]>
* glsl: replace old hash table with new and faster oneAlejandro Seguí2015-08-041-7/+11
| | | | | | | | The util/hash_table was intended to be a fast hash table replacement for the program/hash_table see 35fd61bd99c1 and 72e55bb6888ff. Reviewed-by: Timothy Arceri <[email protected]>
* glsl: Add constuctors for the common cases of glsl_struct_fieldIan Romanick2015-08-034-56/+53
| | | | | | | | | | | | | | | | | | | | | | | | Fixes a giant pile of GCC warnings: builtin_types.cpp:60:1: warning: missing initializer for member 'glsl_struct_field::stream' [-Wmissing-field-initializers] I had to add a default constructor because a non-default constructor was added. Otherwise the only constructor would be the one with parameters, and all the plases like glsl_struct_field foo; would fail to compile. I wanted to do this in two patches. All of the initializers of glsl_struct_field structures had to be converted to use the constructor because C++ apparently forces you to do one or the other: builtin_types.cpp:61:1: error: could not convert '{glsl_type::float_type, "near", -1, 0, 0, 0, GLSL_MATRIX_LAYOUT_INHERITED, 0, -1}' from '<brace-enclosed initializer list>' to 'glsl_struct_field' Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> Reviewed-by: Juha-Pekka Heikkila <[email protected]>
* i965: Make gen7_upload_ps_state staticIan Romanick2015-08-032-10/+1
| | | | | | | | It is only ever called from within the same file. Signed-off-by: Ian Romanick <[email protected]> Acked-by: Jason Ekstrand <[email protected]> Reviewed-by: Juha-Pekka Heikkila <[email protected]>
* i965: Remove extern declaration for nonexistent state atomIan Romanick2015-08-031-1/+0
| | | | | | Signed-off-by: Ian Romanick <[email protected]> Acked-by: Jason Ekstrand <[email protected]> Reviewed-by: Juha-Pekka Heikkila <[email protected]>
* i965: Trivial formatting changes in gen7_vs_state.cIan Romanick2015-08-031-5/+5
| | | | | | Signed-off-by: Ian Romanick <[email protected]> Acked-by: Jason Ekstrand <[email protected]> Reviewed-by: Juha-Pekka Heikkila <[email protected]>
* i965: Trivial formatting changes in gen6_multisample_state.cIan Romanick2015-08-031-5/+2
| | | | | | Signed-off-by: Ian Romanick <[email protected]> Acked-by: Jason Ekstrand <[email protected]> Reviewed-by: Juha-Pekka Heikkila <[email protected]>
* i965: Trivial formatting changes in brw_misc_state.cIan Romanick2015-08-031-26/+23
| | | | | | Signed-off-by: Ian Romanick <[email protected]> Acked-by: Jason Ekstrand <[email protected]> Reviewed-by: Juha-Pekka Heikkila <[email protected]>
* i965: Trivial formatting changes in brw_draw_upload.cIan Romanick2015-08-031-3/+6
| | | | | | Signed-off-by: Ian Romanick <[email protected]> Acked-by: Jason Ekstrand <[email protected]> Reviewed-by: Juha-Pekka Heikkila <[email protected]>
* i965: Trivial formatting changes in brw_draw.cIan Romanick2015-08-031-51/+51
| | | | | | Signed-off-by: Ian Romanick <[email protected]> Acked-by: Jason Ekstrand <[email protected]> Reviewed-by: Juha-Pekka Heikkila <[email protected]>
* i965: Trivial formatting changes in brw_wm.cIan Romanick2015-08-031-43/+41
| | | | | | Signed-off-by: Ian Romanick <[email protected]> Acked-by: Jason Ekstrand <[email protected]> Reviewed-by: Juha-Pekka Heikkila <[email protected]>
* i965/nir: Do not scalarize phis in non-scalar setupsIago Toral Quiroga2015-08-031-2/+6
| | | | | | Significantly reduces register pressure in some piglit tests. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/vec4: Handle uniform and GRF array access on vertex programs (NIR)Antia Puentes2015-08-031-1/+1
| | | | | | | | | | | | | | | | When the NIR-vec4 pass is enabled, handles uniform and GRF array access on ARB_vertex_program like it is done on vertex shaders. When the old IR-vec4 pass is used, emit_program_code() emits pull constant loads directly instead of using relative addressing, hence to call to move_uniform_array_access_to_pull_constants() is not needed and it is enough to call to split_uniform_registers(). The patch also calls to move_grf_array_access_to_scratch() like it is done for shaders, however I suspect this is a no-op for vertex programs and we could remove it. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Handle uniforms on vertex programsAntia Puentes2015-08-031-2/+32
| | | | | | | The implementation takes into account that on ARB_vertex_program only a single nir variable is generated to support all the uniform data. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/vec4: Enable NIR-vec4 pass on ARB_vertex_programsAntia Puentes2015-08-031-23/+24
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/gs: Implement support for gl_InvocationID system valueIago Toral Quiroga2015-08-032-0/+29
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* i965/gs/gen6: Refactor ir_emit_vertex and ir_end_primitive for gen6Samuel Iglesias Gonsalvez2015-08-032-1/+14
| | | | | | | | | So the implementation is independent of GLSL IR and the visit methods of the gen6 GS visitor. This way we will be able to reuse that implementation directly from the NIR vec4 backend. Signed-off-by: Samuel Iglesias Gonsalvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/gs: Implement EmitVertex and EndPrimitiveIago Toral Quiroga2015-08-032-0/+23
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/gs: Handle geometry shaders inputsIago Toral Quiroga2015-08-033-0/+71
| | | | | | | Outputs from the vertex shader become array inputs in the geomtry shader, but the arrays are interleaved, so we need to map our inputs accordingly. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/gs: Refactor ir_emit_vertex and ir_end_primitiveIago Toral Quiroga2015-08-034-4/+33
| | | | | | | | So the implementation is independent of GLSL IR and the visit methods of the vec4 visitor. This way we will be able to reuse that implementation directly from the NIR vec4 backend. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir: Enable NIR-vec4 pass on geometry shadersIago Toral Quiroga2015-08-032-1/+5
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Fix output swizzle in get_mul_for_srcSamuel Iglesias Gonsalvez2015-08-031-1/+12
| | | | | | | | | | | | | | | Avoid copying an overwritten swizzle, use the original values. Example: Former swizzle[] = xyzw src->swizzle[] = zyxx The expected output swizzle = zyxx but if we reuse swizzle in the loop, then output swizzle would be zyzz. Signed-off-by: Samuel Iglesias Gonsalvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Add implementation of nir_emit_texture()Alejandro Piñeiro2015-08-031-1/+194
| | | | | | | | Uses the nir structure to get all the info needed (sources, dest reg, etc), and then it uses the common vec4_visitor::emit_texture to emit the final code. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/ir/vec4: Refactor visit(ir_texture *ir)Alejandro Piñeiro2015-08-032-173/+209
| | | | | | | | Splitted in two. The emission is moved to a new vec4_visitor method, vec4_visitor::emit_texture, ir order to be reused on the nir path. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/vec4: Add a new dst_reg constructor accepting a brw_reg_typeAlejandro Piñeiro2015-08-032-0/+13
| | | | | | | | | | | | | | | This is useful for the upcoming texture support in NIR->vec4 pass, as we found several cases where the brw_type is available, but not the glsl_type. Without this new constructor, the alternative would be: dst_reg reg(MRF, <reg>) reg.type = <brw_type> reg.writemask = <mask> Adding a new constructor makes code easier to read. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/vec4: Change vec4_visitor::swizzle_result() method to allow reuseAlejandro Piñeiro2015-08-032-8/+15
| | | | | | | | This patch changes the signature of swizzle_result() to accept lower level arguments. The purpose is to reuse it in the upcoming NIR->vec4 pass. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/vec4: Change vec4_visitor::gather_channel() method to allow reuseEduardo Lima Mitev2015-08-032-5/+6
| | | | | | | | This patch changes the signature of gather_channel() to accept the gather component directly instead of fetching it internally from ir_texture. This will allow reuse in the upcoming NIR->vec4 pass. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/vec4: Change vec4_visitor::emit_mcs_fetch() method to allow reuseEduardo Lima Mitev2015-08-032-6/+8
| | | | | | | This patch changes the signature of emit_mcs_fetch() to accept lower level arguments. The purpose is to reuse it in the upcoming NIR->vec4 pass. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/vec4: Move is_high_sample() method to vec4_visitor classEduardo Lima Mitev2015-08-032-3/+4
| | | | | | | | The is_high_sample() method is currently accessible only in the implementation of vec4_visitor. Since we need to reuse it in the upcoming NIR->vec4 pass, lets make it a method of the class instead. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir: Add new utility method brw_glsl_base_type_for_nir_type()Eduardo Lima Mitev2015-08-033-14/+25
| | | | | | | | This method returns the glsl_base_type corresponding to a nir_alu_type. It will factorize code currently present in fs_nir, that can be reused in vec4_nir on its upcoming emit_texture support. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement nir_emit_jumpEduardo Lima Mitev2015-08-031-1/+14
| | | | | | This implementation is taken as-is from fs_nir. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Mark as unreachable ops that should be already loweredAntia Puentes2015-08-031-0/+17
| | | | | | | | | | | | | | | | | | | | | | NIR ALU operations: * nir_op_fabs * nir_op_iabs * nir_op_fneg * nir_op_ineg * nir_op_fsat should be lowered by lower_source mods * nir_op_fdiv should be lowered in the compiler by DIV_TO_MUL_RCP. * nir_op_fmod should be lowered in the compiler by MOD_TO_FLOOR. * nir_op_fsub * nir_op_isub should be handled by ir_sub_to_add_neg. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement vector "any" operationAntia Puentes2015-08-031-0/+14
| | | | | | | | | Adds NIR ALU operations: * nir_op_bany2 * nir_op_bany3 * nir_op_bany4 Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement the dot product operationAntia Puentes2015-08-031-0/+15
| | | | | | | | | Adds NIR ALU operations: * nir_op_fdot2 * nir_op_fdot3 * nir_op_fdot4 Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement conditional selectAntia Puentes2015-08-031-0/+6
| | | | | | | Adds NIR ALU operations: * nir_op_bcsel Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement linear interpolationAntia Puentes2015-08-031-0/+5
| | | | | | | Adds NIR ALU operation: * nir_op_flrp Reviewed-by: Jason Ekstrand <[email protected]>
* i965/vec4: Return the emitted instruction in emit_lrp()Antia Puentes2015-08-032-6/+6
| | | | | | | Needed in the NIR backend to set the "saturate" value of the instruction. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Implement floating-point fused multiply-addAntia Puentes2015-08-031-0/+9
| | | | | | | Adds NIR ALU operation: * nir_op_ffma Reviewed-by: Jason Ekstrand <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-19 12:30:14 +0000