| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | i965: Create a macro for checking a dirty bit. | Paul Berry | 2014-09-01 | 2 | -1/+7 |
| * | i965: Create a macro for setting all dirty bits. | Paul Berry | 2014-09-01 | 4 | -7/+18 |
| * | i965: Create a macro for setting a dirty bit. | Paul Berry | 2014-09-01 | 32 | -67/+74 |
| * | i965: add missing parens in vec4 visitor | Dave Airlie | 2014-09-02 | 1 | -1/+2 |
| * | nouveau: don't leak dec struct on error | Dave Airlie | 2014-09-02 | 1 | -1/+1 |
| * | xvmc/tests: %C isn't a valid printf specifier. | Dave Airlie | 2014-09-02 | 1 | -2/+2 |
| * | nouveau/nv40: quiten coverity warning in unused vertex texture code. | Dave Airlie | 2014-09-02 | 1 | -0/+1 |
| * | nv50: remove unused variables | Ilia Mirkin | 2014-09-01 | 2 | -2/+0 |
| * | mesa: force height of 1D textures to be 1 in texture views | Ilia Mirkin | 2014-09-01 | 1 | -0/+3 |
| * | nv50: attach the buffer bo to the miptree structures | Ilia Mirkin | 2014-09-01 | 1 | -8/+5 |
| * | nv50: mt address may not be the underlying bo's start address | Ilia Mirkin | 2014-09-01 | 3 | -12/+14 |
| * | nv50: set the miptree address when clearing bo's in vp2 init | Ilia Mirkin | 2014-09-01 | 1 | -0/+2 |
| * | nv50/ir: avoid creating instructions that can't be emitted | Ilia Mirkin | 2014-09-01 | 1 | -0/+4 |
| * | nvc0: don't make 1d staging textures linear | Ilia Mirkin | 2014-09-01 | 1 | -1/+0 |
| * | nv50: zero out unbound samplers | Ilia Mirkin | 2014-09-01 | 1 | -2/+5 |
| * | nvc0/ir: avoid infinite recursion when finding first uses of tex | Ilia Mirkin | 2014-09-01 | 2 | -8/+29 |
| * | freedreno/ir3: add DDX/DDY | Rob Clark | 2014-09-01 | 1 | -4/+53 |
| * | freedreno/ir3: don't keep IR around | Rob Clark | 2014-09-01 | 1 | -1/+6 |
| * | i965/fs: Don't segfault when debug-logging a null program | Jason Ekstrand | 2014-09-01 | 1 | -2/+2 |
| * | i965/vec4: Don't segfault when debug-logging a null program | Jason Ekstrand | 2014-09-01 | 1 | -2/+2 |
| * | radeonsi: implement EXPCLEAR optimization for depth | Marek Olšák | 2014-09-01 | 5 | -2/+23 |
| * | r600g,radeonsi: initialize HTILE to fully-expanded state | Marek Olšák | 2014-09-01 | 1 | -1/+3 |
| * | radeonsi: implement fast depth clear | Marek Olšák | 2014-09-01 | 4 | -2/+21 |
| * | radeonsi: move DB_RENDER_CONTROL into draw_vbo | Marek Olšák | 2014-09-01 | 5 | -58/+46 |
| * | radeonsi: disable occlusion queries if they are not needed | Marek Olšák | 2014-09-01 | 1 | -0/+8 |
| * | r600g,radeonsi: force fast stencil and HTILE stencil off, fixing a Hyper-Z hang | Marek Olšák | 2014-09-01 | 2 | -9/+14 |
| * | r600g: set VGT_ENHANCE=4 on R7xx | Marek Olšák | 2014-09-01 | 2 | -0/+2 |
| * | r600g: expose AMD_vertex_shader_layer and *_viewport_index on R600-R700 | Marek Olšák | 2014-09-01 | 1 | -1/+1 |
| * | r600g: fix layered clear | Marek Olšák | 2014-09-01 | 1 | -1/+2 |
| * | r600g: some DB bug workarounds for R6xx DB flushing | Marek Olšák | 2014-09-01 | 1 | -0/+7 |
| * | r600g: enable fast depth clear for array textures and cubemaps | Marek Olšák | 2014-09-01 | 1 | -1/+2 |
| * | r600g: use HTILE allocator from SI | Marek Olšák | 2014-09-01 | 3 | -47/+23 |
| * | r600g: set DB_DEPTH_SIZE.HEIGHT_TILE_MAX for EG/CM, inline other fields | Marek Olšák | 2014-09-01 | 1 | -9/+12 |
| * | radeonsi: set DB_DEPTH_SIZE.HEIGHT_TILE_MAX, inline other fields | Marek Olšák | 2014-09-01 | 1 | -9/+8 |
| * | r600g: Implement sm5 geometry shader instancing | Glenn Kennard | 2014-09-01 | 3 | -2/+14 |
| * | glsl_to_tgsi: allocate and enlarge arrays for temporaries on demand | Marek Olšák | 2014-09-01 | 1 | -18/+33 |
| * | gallium/pb_bufmgr_cache: limit the size of cache | Marek Olšák | 2014-09-01 | 4 | -8/+30 |
| * | pipe-loader: use the correct screen index | Marek Olšák | 2014-09-01 | 1 | -2/+18 |
| * | egl/dri2: use the correct screen index | Marek Olšák | 2014-09-01 | 2 | -10/+30 |
| * | i965/fs: don't use ir->shadow_comparitor in emit_texture_* | Connor Abbott | 2014-09-01 | 2 | -7/+5 |
| * | i965/fs: don't pass ir_variable * to emit_samplepos_setup() | Connor Abbott | 2014-09-01 | 3 | -5/+4 |
| * | i965/fs: don't pass ir_variable * to emit_frontfacing_interpolation() | Connor Abbott | 2014-09-01 | 4 | -6/+6 |
| * | i965: Fix GPU hangs when INTEL_DEBUG=no16 is set. | Kenneth Graunke | 2014-08-31 | 1 | -1/+2 |
| * | mesa: fix make tarballs | Emil Velikov | 2014-09-01 | 1 | -1/+2 |
| * | i965/vec4: Remove try_emit_saturate | Abdiel Janulgue | 2014-08-31 | 2 | -22/+0 |
| * | i965/fs: Refactor try_emit_saturate | Abdiel Janulgue | 2014-08-31 | 1 | -15/+8 |
| * | ir_to_mesa, glsl_to_tgsi: Remove try_emit_saturate | Abdiel Janulgue | 2014-08-31 | 2 | -99/+0 |
| * | i965/vec4: Allow propagation of instructions with saturate flag to sel | Abdiel Janulgue | 2014-08-31 | 1 | -27/+58 |
| * | i965/fs: Allow propagation of instructions with saturate flag to sel | Abdiel Janulgue | 2014-08-31 | 1 | -1/+17 |
| * | glsl: Optimize clamp(x, b, 1.0), where b > 0.0 as max(saturate(x),b) | Abdiel Janulgue | 2014-08-31 | 1 | -0/+23 |
