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* i965/fs: Use regs_read/written for post-RA scheduling in calculate_depsJason Ekstrand2015-11-071-11/+4
* nir/validate: Add better validation of load/store typesJason Ekstrand2015-11-071-2/+14
* radeonsi: add register definitions for StoneyMarek Olšák2015-11-071-0/+322
* radeonsi: add workarounds for CP DMA to stay on the fast pathMarek Olšák2015-11-071-5/+88
* radeonsi: unify CP DMA preparation logicMarek Olšák2015-11-071-37/+34
* radeonsi: unify CP DMA code determining various flagsMarek Olšák2015-11-071-28/+23
* radeonsi: only enable write confirmation on the last CP DMA packetMarek Olšák2015-11-071-2/+4
* nv50/ir: allow emission of immediates in imul/imad opsIlia Mirkin2015-11-071-2/+8
* nv50/ir: properly set the type of the constant folding resultIlia Mirkin2015-11-061-4/+4
* nv50/ir: add support for const-folding OP_CVT with F64 source/destIlia Mirkin2015-11-063-0/+45
* nv50/ir: add fp64 opcode emission support for G200 (NVA0)Ilia Mirkin2015-11-061-10/+84
* nv50/ir: Add support for 64bit immediates to checkSwapSrc01Hans de Goede2015-11-061-5/+6
* nvc0/ir: Teach insnCanLoad about double immediatesHans de Goede2015-11-061-6/+19
* nv50/ir: Add support for merge-s to the ConstantFolding passHans de Goede2015-11-061-0/+15
* nv50/ir: disallow 64-bit immediates on nv50 targetsIlia Mirkin2015-11-061-1/+1
* nv50/ir: allow movs with TYPE_F64 destinations to be splitIlia Mirkin2015-11-061-0/+6
* gm107/ir: Add support for double immediatesHans de Goede2015-11-061-1/+4
* nvc0/ir: Add support for double immediatesHans de Goede2015-11-061-0/+8
* i965/nir/fs: Add comment for no-op memory barrier functionsFrancisco Jerez2015-11-061-0/+19
* i965/nir/fs: Implement new barrier functions for compute shadersJordan Justen2015-11-061-0/+7
* nir: Add new barrier functions for compute shadersJordan Justen2015-11-062-0/+26
* glsl: Add new barrier functions for compute shadersJordan Justen2015-11-061-6/+49
* radeon/uvd: fix VC-1 simple/main profile decode v2Boyuan Zhang2015-11-062-2/+7
* st/vaapi: fix vaapi VC-1 simple/main corruption v2Boyuan Zhang2015-11-061-0/+2
* st/va: add support for RGBX and BGRX in VPPJulien Isorce2015-11-062-18/+23
* vl/buffers: add RGBX and BGRX to the supported formatsJulien Isorce2015-11-061-0/+18
* st/va: properly use brackets in vlVaAcquireBufferHandle's switchJulien Isorce2015-11-061-5/+4
* st/va: properly indent buffer.c, config.c, image.c and picture.cJulien Isorce2015-11-064-56/+56
* freedreno/a4xx: fix blend colorRob Clark2015-11-061-5/+9
* freedreno: update generated headersRob Clark2015-11-066-43/+54
* freedreno: add a305 supportGuillaume Charifi2015-11-061-0/+1
* freedreno/ir3: Use nir_foreach_variableBoyan Ding2015-11-061-3/+3
* nir: some small cleanupsRob Clark2015-11-062-14/+14
* nvc0: reintroduce BGRA4 format supportIlia Mirkin2015-11-062-3/+1
* mesa: report enum name in glClientActiveTexture() error stringBrian Paul2015-11-051-1/+2
* st/va: fix memory leak on error in vlVaCreateSurfaces2Julien Isorce2015-11-051-3/+9
* st/va: indent vlVaQuerySurfaceAttributes and vlVaCreateSurfaces2Julien Isorce2015-11-051-283/+283
* i965: Fix scalar VS float[] and vec2[] output arrays.Kenneth Graunke2015-11-054-2/+17
* llvmpipe: disable texture cacheRoland Scheidegger2015-11-051-1/+1
* nouveau: send back a debug message when waiting for a fence to completeIlia Mirkin2015-11-0510-16/+30
* nv50,nvc0: provide debug messages with shader compilation statsIlia Mirkin2015-11-0511-9/+28
* nouveau: add support for sending debug messages via KHR_debugIlia Mirkin2015-11-055-0/+26
* st/clover: provide a path for drivers to call through to pfn_notifyIlia Mirkin2015-11-054-4/+36
* st/mesa: set debug callback for debug contextsIlia Mirkin2015-11-051-0/+57
* gallium: expose a debug message callback settable by context ownerIlia Mirkin2015-11-056-0/+82
* st/mesa: account for texture views when doing CopyImageSubDataIlia Mirkin2015-11-051-0/+8
* i965/fs: Do not mark used surfaces in FS_OPCODE_GET_BUFFER_SIZEIago Toral Quiroga2015-11-052-4/+4
* i965/vec4: Do not mark used surfaces in VS_OPCODE_GET_BUFFER_SIZEIago Toral Quiroga2015-11-052-5/+5
* i965/vec4: Do not mark used direct surfaces in VS_OPCODE_PULL_CONSTANT_LOADIago Toral Quiroga2015-11-053-13/+8
* i965/fs: Do not mark used direct surfaces in UNIFORM_PULL_CONSTANT_LOADIago Toral Quiroga2015-11-052-11/+1
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