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* anv/image: Use aspects for computing full usageJason Ekstrand2016-05-171-4/+3
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* anv: Remove the anv_format member from anv_imageJason Ekstrand2016-05-173-4/+2
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* anv/wsi: Use vk_format_info for asserts rather than anv_formatJason Ekstrand2016-05-172-2/+4
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* anv/copy: Use the linear format from the image for the buffer block sizeJason Ekstrand2016-05-171-1/+4
| | | | | | Because the buffer is exposed to the user, the block size is defined to always exactly be the size of the actual vulkan format. This is the same size (it had better be) as the linaer image format.
* anv/image: Stop using anv_format for image create validationJason Ekstrand2016-05-171-6/+2
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* anv/image: Make heavier use of aspectsJason Ekstrand2016-05-171-50/+34
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* anv/copy: Use the color_surf from the image to get the block sizeJason Ekstrand2016-05-171-9/+20
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* anv: Change render_pass_attachment.format to a VkFormatJason Ekstrand2016-05-173-5/+8
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* anv: Add helpers to provide simple VkFormat introspectionJason Ekstrand2016-05-172-1/+67
| | | | | | | | As much as I hate adding yet more format introspection, there are times when the VkFormat is sufficient and we don't want to round-trip through isl_format. For these times, the new vk_format_info.c/h files provide some simple driver-agnostic VkFormat introspection. This intended to be specific to Vulkan but not to any driver whatsoever.
* anv/image: Use get_isl_format when creating buffer viewsJason Ekstrand2016-05-171-5/+6
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* anv/image: Add an aspects fieldJason Ekstrand2016-05-174-8/+10
| | | | | This makes several checks easier and allows us to avoid calling anv_format_for_vk_format in a number of cases.
* anv: Make format_for_descriptor return an isl_formatJason Ekstrand2016-05-173-13/+11
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* anv/wayland: Don't allow non-renderable formatsJason Ekstrand2016-05-171-4/+7
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* anv/wsi: Make WSI per-physical-device rather than per-instanceJason Ekstrand2016-05-176-66/+70
| | | | | This better maps to the Vulkan object model and also allows WSI to at least know the hardware generation which is useful for format checks.
* glapi/gen: Copy some GL 1.0 enum details into ARB_viewport_arrayAdam Jackson2016-05-171-4/+12
| | | | | | | | Otherwise the instances in the extension XML override the core definitions, and we stop knowing their sizes in indirect_size_get.c Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Adam Jackson <[email protected]>
* glapi: Define PURE for Sun Studio as wellAdam Jackson2016-05-171-1/+1
| | | | | Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Adam Jackson <[email protected]>
* glapi/glx: Mark byteswap functions as _X_UNUSED (v2)Adam Jackson2016-05-171-6/+6
| | | | | | | | | | Squashes the one remaining warning in the xserver build. v2: Also clean up some non-standard whitespace (Ian Romanick) Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Adam Jackson <[email protected]>
* glapi: Harden GLX request size processing (v2)Adam Jackson2016-05-175-19/+13
| | | | | | | v2: Use == not is for equality testing (Dylan Baker) Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Adam Jackson <[email protected]>
* glapi: Add the safe_{add,mul,pad} functions from xserverAdam Jackson2016-05-171-0/+24
| | | | | | | | We're about to update the generator scripts to use these, easier not to vary between client and server. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Adam Jackson <[email protected]>
* glapi: Fix whitespace droppings when printing the license headerAdam Jackson2016-05-171-1/+1
| | | | | Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Adam Jackson <[email protected]>
* mesa/st: add support for NIR as possible driver IRRob Clark2016-05-178-12/+632
| | | | | Signed-off-by: Rob Clark <[email protected]> Acked-by: Eric Anholt <[email protected]>
* mesa/st: move things around a bit in st_create_fp_variant()Rob Clark2016-05-171-12/+8
| | | | | | | Prep work for next patch. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* mesa/st: add nir pass for lowering builtin uniformsRob Clark2016-05-173-0/+278
| | | | | Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* scons: gallium: link against nir as neededEmil Velikov2016-05-175-1/+5
| | | | | | | | ... otherwise we'll produce uncomplete binaries with introduction of NIR as alternative IR with next commits. Signed-off-by: Emil Velikov <[email protected]> Acked-by: Jose Fonseca <[email protected]>
* i965/fs: Add an allow_spilling flag to brw_compile_fsJason Ekstrand2016-05-177-20/+28
| | | | | | | | | This allows us to disable spilling for blorp shaders since blorp state setup doesn't handle spilling. Without this, blorp fails hard if you run with INTEL_DEBUG=spill. Reviewed-by: Francisco Jerez <[email protected]> Tested-by: Francisco Jerez <[email protected]>
* nvc0/ir: fix shared atomic lowering to preserve shared memory locationIlia Mirkin2016-05-171-10/+8
| | | | | | | | | | We were always doing atomics on shared memory location 0 instead of the originally supplied location. Make sure to pass through the original symbol and any indirection. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Cc: [email protected] # note: expect minor conflict
* freedreno/ir3: fix compiler warningRob Clark2016-05-171-0/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* nir/validate: dump annotated shader with error msgsRob Clark2016-05-171-1/+62
| | | | | | | | | Log all the errors, and at the end dump the shader w/ error annotations to make it easier to see where the problems are. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Eduardo Lima Mitev <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* nir/validate: assert() -> validate_assert()Rob Clark2016-05-171-126/+128
| | | | | | | Prep work for next patch. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* nir/print: add support for print annotationsRob Clark2016-05-172-1/+35
| | | | | | | | | | | | | | | Caller can pass a hashtable mapping NIR object (currently instr or var, but I guess others could be added as needed) to annotation msg to print inline with the shader dump. As the annotation msg is printed, it is removed from the hashtable to give the caller a way to know about any unassociated msgs. This is used in the next patch, for nir_validate to try to associate error msgs to nir_print dump. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Eduardo Lima Mitev <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* i965: Expose OpenGL 4.2 for gen8+Alejandro Piñeiro2016-05-172-2/+2
| | | | | | | | ARB_vertex_attrib_64bit was the only feature missing. v2: we can expose 4.2 instead of 4.1 (Ian Romanick) Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Enable ARB_vertex_attrib_64bit for gen8+Alejandro Piñeiro2016-05-171-0/+1
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: take care of doubles when lowering VS inputsJuan A. Suarez Romero2016-05-173-1/+16
| | | | | | | Input attributes can require 2 vec4 or 1 vec4 depending on whether they are double-precision or not. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: calculate first non-payload GRF using attrib slotsJuan A. Suarez Romero2016-05-173-1/+3
| | | | | | | | | | When computing where the first non-payload GRF starts, we can't rely on the number of attributes, as each attribute can be using 1 or 2 slots depending on whether they are a dvec3/4 or other. Instead, we need to use the number of slots used by the attributes. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: use attribute slots to calculate URB read lengthJuan A. Suarez Romero2016-05-171-3/+9
| | | | | | | | | | Do not use total attributes because a dvec3/dvec4 attribute requires two slots. So rather use total attribute slots. v2: do not use loop to calculate required attribute slots (Kenneth Graunke) Reviewed-by: Kenneth Graunke <[email protected]>
* i965: take care of doubles when remapping VS attributesJuan A. Suarez Romero2016-05-171-15/+11
| | | | | | | Double-precision types require 1 slot in VUE for double and dvec2, and 2 slots for anything else. Reviewed-by: Kenneth Graunke <[email protected]>
* nir: add double input bitmapJuan A. Suarez Romero2016-05-172-0/+3
| | | | | | This bitmap tracks which input attributes are double-precision. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: shuffle 32bits into 64bits for doublesJuan A. Suarez Romero2016-05-171-0/+8
| | | | | | | | | | | | | | | | VS Thread Payload handles attributes in URB as vec4, no matter if they are actually single or double precision. So with double-precision types, value ends up in the registers split in 32bits chunks, in different positions. We need to shuffle the chunks to get the doubles correctly. v2: * Extra blank line. Add { } on if body (Ian Romanick) * Use dest directly (Kenneth Graunke) Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: half exec_size when dealing with 64 bits attributesAlejandro Piñeiro2016-05-171-2/+19
| | | | | | | | | | | | | The HW has a restriction that only vertical stride may cross register boundaries. Until now this was only handled on VGRFs at rw_reg_from_fs_reg, but it is also needed for attributes. v2: * Remove reference to commit id on commit message (Juan Suarez) * Simplify code that compute final exec_size (Ian Romanick) * Use REG_SIZE on that same code (Kenneth Graunke) Reviewed-by: Kenneth Graunke <[email protected]>
* i965: passthru formats cannot be used width edge flag enabledAlejandro Piñeiro2016-05-171-0/+20
| | | | | | Add an assertion to detect this case. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Configure how to store *64*PASSTHRU vertex componentsAntia Puentes2016-05-171-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | From the Broadwell specification, structure VERTEX_ELEMENT_STATE description: "When SourceElementFormat is set to one of the *64*_PASSTHRU formats, 64-bit components are stored in the URB without any conversion. In this case, vertex elements must be written as 128 or 256 bits, with VFCOMP_STORE_0 being used to pad the output as required. E.g., if R64_PASSTHRU is used to copy a 64-bit Red component into the URB, Component 1 must be specified as VFCOMP_STORE_0 (with Components 2,3 set to VFCOMP_NOSTORE) in order to output a 128-bit vertex element, or Components 1-3 must be specified as VFCOMP_STORE_0 in order to output a 256-bit vertex element. Likewise, use of R64G64B64_PASSTHRU requires Component 3 to be specified as VFCOMP_STORE_0 in order to output a 256-bit vertex element." Uses 128-bits to write double and dvec2 vertex elements, and 256-bits for dvec3 and dvec4 vertex elements. Signed-off-by: Juan A. Suarez Romero <[email protected]> Signed-off-by: Antia Puentes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: get the proper vertex surface type for doubles on gen8+Alejandro Piñeiro2016-05-171-3/+27
| | | | | | | | | | This commit adds support for PASSTHRU format when pushing double-precision attributes. Check glarray->Doubles in order to know if we should choose a format that does a conversion to float, or just passthru the 64-bit double. Reviewed-by: Kenneth Graunke <[email protected]>
* nvc0/ir: make sure out-of-bounds buffer loads/atomics get a 0 resultIlia Mirkin2016-05-171-1/+26
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* glsl: make reserved_varying_slot() staticTimothy Arceri2016-05-171-1/+1
| | | | Reviewed-by: Dave Airlie <[email protected]>
* glsl: include per-patch varyings when generating reserved slot bitfieldTimothy Arceri2016-05-171-3/+6
| | | | Reviewed-by: Dave Airlie <[email protected]>
* glsl: don't incorrectly eliminate patches with explicit locationsTimothy Arceri2016-05-171-1/+2
| | | | | | | These varying have a separate location domain from per-vertex varyings and need to be handled separately. Reviewed-by: Dave Airlie <[email protected]>
* glsl: remove remainings tabs in link_varyings.cppTimothy Arceri2016-05-171-2/+2
| | | | Reviewed-by: Dave Airlie <[email protected]>
* glsl: fix location and component packing validation on patchesTimothy Arceri2016-05-172-1/+3
| | | | | | | These varyings have a separate location domain from per-vertex varyings and need to be handled separately. Reviewed-by: Dave Airlie <[email protected]>
* i965: Enable ARB_shader_precision on Gen8+.Kenneth Graunke2016-05-161-0/+1
| | | | | | | | | | | | | I recently fixed a bug in the Piglit tests: https://lists.freedesktop.org/archives/piglit/2016-May/019802.html With that patch in place, we pass all the tests. So, turn it on. We could probably expose this earlier than Gen8, but the extension says that OpenGL 4.0 is required, and all of our tests are written against GLSL 4.00 (which is only supported on Gen8+). Signed-off-by: Kenneth Graunke <[email protected]>
* vl/dri: Move the DRI3 check out of sources include into C.Jose Fonseca2016-05-162-5/+5
| | | | | | Fixes SCons build. Trivial. Built locally with SCons and autotools.
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