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* GEM: Don't emit an extra MI_FLUSH in the batch since GEM handles it.Eric Anholt2008-05-071-13/+18
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* [intel-GEM] partial support for memory domains.Keith Packard2008-05-061-1/+23
| | | | | | | Doesn't deal with local modifications yet (need new kernel set_domain ioctl for that to work). Also, guesses what domains are affected based on the read/write bits set in the flags. Works for 915, probably not so much for 965.
* [intel-GEM] Add tiling support to swrast.Keith Packard2008-05-067-25/+350
| | | | | Accessing tiled surfaces without using the fence registers requires that software deal with the address swizzling itself.
* Dump buffer tiled status from intelPrintSAREAKeith Packard2008-05-051-6/+6
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* GEM: Allocate the right number of relocs, avoiding heap smashing.Eric Anholt2008-05-051-1/+1
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* GEM: Include target buffer handle in relocation debug.Eric Anholt2008-05-051-2/+2
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* GEM: Set validate index to keep the same buffer from being duped on the list.Eric Anholt2008-05-051-0/+1
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* Print GEM handles instead of BO pointers in debugging.Eric Anholt2008-05-051-15/+18
| | | | small integers are much prettier, and let me correlate to DRM debug output.
* Initialize bufmgr_gem->validate_array[i].offset.Eric Anholt2008-05-051-0/+1
| | | | | This is just cosmetic, to produce less scary values when the ioctl fails and doesn't return values there.
* Make intel_{batch,exec}_ioctl return an error code so we can recover better.Eric Anholt2008-05-053-26/+33
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* Add intel_bufmgr_gem.c to i915Keith Packard2008-05-051-0/+1
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* Temporarily disable intel pixel ops on i915 for GEMKeith Packard2008-05-053-5/+8
| | | | | Instead of attempting to fix these for GEM, just disable until GEM is working.
* Don't forget to set handle of shared buffers.Eric Anholt2008-05-021-1/+3
| | | | (And fix a nearby whitespace nit)
* Fix GEM execbuf ioctl argument.Eric Anholt2008-05-021-2/+3
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* Fix to use GEM execbuf instead of TTM.Eric Anholt2008-05-021-2/+2
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* Minor fixups to get GEM to the point of execbuf ioctl.Eric Anholt2008-05-022-10/+11
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* [intel] Fix build for GEM. TTM is now disabled, and fencing is gone.Eric Anholt2008-05-0215-301/+55
| | | | | | | Fencing was used in two places: ensuring that we didn't get too many frames ahead of ourselves, and glFinish. glFinish will be satisfied by waiting on buffers like we would do for CPU access on them. The "don't get too far ahead" is now the responsibility of the execution manager (kernel).
* Add intel_bufmgr_gem for new graphics execution manager.Eric Anholt2008-05-0210-40/+869
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* [intel] Warnings fixes.Eric Anholt2008-05-024-2/+2
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* [intel] Merge intel_ioctl.h. Not sure how this slipped by in the .c merge.Eric Anholt2008-05-022-44/+0
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* fix conversion of GLfloat display list IDsBrian Paul2008-05-011-21/+24
| | | | | | Use floor() to convert to int (per Mark Kildard and the SI). Also, change translate_id() to return a signed integer since we may be offsetting from GL_LIST_BASE.
* Add support for GL_REPLACE_EXT texture env mode.Brian Paul2008-04-301-1/+6
| | | | | | GL_REPLACE_EXT comes from the ancient GL_EXT_texture extension. Found an old demo that actually uses it. The values of the GL_REPLACE and GL_REPLACE_EXT tokens is different, unfortunately.
* intel: test cpp to ensure mipmap tree matches texture image.Xiang, Haihao2008-04-301-0/+5
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* mesa: adjust glBitmap coords by a small epsilonBrian Paul2008-04-291-2/+3
| | | | | | | | Fixes problem with bitmaps jumping around by one pixel depending on window size. The rasterpos is often X.9999 instead of X+1. Run progs/redbook/drawf and resize window to check. Cherry picked from gallium-0.1 branch
* r200: fix state submission issue causing bogus textures (bug 15730)Ove Kaaven2008-04-291-0/+6
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* Change default of driconf "allow_large_textures" to announce hardware limits.Michel Dänzer2008-04-292-3/+3
| | | | | | The previous default these days served mostly to cause artifical problems with GLX compositing managers like compiz (see e.g. http://bugs.freedesktop.org/show_bug.cgi?id=10501).
* build fix for xorg driverAlan Hourihane2008-04-281-3/+4
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* [i965] short immediate values must be replicated to both halves of the dwordKeith Packard2008-04-251-2/+2
| | | | | | The 32-bit immediate value in the i965 instruction word must contain two copies of any 16-bit constants. brw_imm_uw and brw_imm_w just needed to copy the value into both halves of the immediate value instruction field.
* glcore: Respect DESTDIRDan Nicholson2008-04-251-2/+2
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* silence warningAlan Hourihane2008-04-251-1/+1
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* enable GL_EXT_multi_draw_arrays (see bug 15670)Pierre Beyssac2008-04-242-0/+4
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* include <X11/Xlib.h>Alan Hourihane2008-04-232-0/+2
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* drop stray includes of glapiGeorge Sapountzis2008-04-232-2/+0
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* glx: nitpick renamesGeorge Sapountzis2008-04-234-2/+2
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* glx: split out current context codeGeorge Sapountzis2008-04-237-521/+538
| | | | also clean header inclusion after code movement
* glcore: drop outdated sources files intented for xorgGeorge Sapountzis2008-04-2311-374/+0
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* glcore: tree sharing for DRI and XMesaGeorge Sapountzis2008-04-232-1/+79
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* glcore: build from mesaGeorge Sapountzis2008-04-238-7/+126
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* revert part of the previous cleanup - it only appliesAlan Hourihane2008-04-221-1/+1
| | | | to the 7.0 branch
* Fix error stringAlan Hourihane2008-04-221-1/+2
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* correct the return valueAlan Hourihane2008-04-221-1/+1
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* small cleanupsAlan Hourihane2008-04-223-7/+7
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* i965: fix DEPTH_TEXTURE_MODE (bug #14220)Xiang, Haihao2008-04-222-7/+10
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* [i965] This is to fix random crash in some maps of Ut2004 demo.Zou Nan hai2008-04-221-1/+1
| | | | | | | e.g. bridge of fate. If vs output is big, driver may fall back to use 8 urb entries for vs, unfortunally, for some unknown reason, if vs is working at 4x2 mode, 8 entries is not enough, may lead to gpu hang.
* i965: save the offset of target buffer after last execution, not relocatee ↵Xiang, Haihao2008-04-221-1/+1
| | | | buffer.
* intel: fix an assertion failure. fix bug #15575Xiang, Haihao2008-04-211-2/+4
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* i965: clear the PRESUMED_OFFSET flag from bo_req.hint, not bo_req.flags. fix ↵Xiang, Haihao2008-04-211-1/+1
| | | | #15574
* i965: fixup depth buffer checkDave Airlie2008-04-181-1/+1
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* i965: fix vb aperture space checkDave Airlie2008-04-181-4/+8
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* 965: fix vb upload size checkDave Airlie2008-04-181-3/+5
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