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| * gallium/u_inlines: add util_copy_image_viewNicolai Hähnle2016-03-141-0/+10
| * st/mesa: set image access flags in st_bind_imagesNicolai Hähnle2016-03-141-0/+15
| * gallium: add access field to pipe_image_viewNicolai Hähnle2016-03-142-1/+10
| * st/glsl_to_tgsi: set FS_EARLY_DEPTH_STENCIL when requiredNicolai Hähnle2016-03-141-0/+3
| * tgsi: add TGSI_PROPERTY_FS_EARLY_DEPTH_STENCILNicolai Hähnle2016-03-143-1/+9
| * st/glsl_to_tgsi: set memory access type on image intrinsicsNicolai Hähnle2016-03-141-0/+7
| * st/glsl_to_tgsi: provide Texture and Format information for image opsNicolai Hähnle2016-03-143-14/+30
| * tgsi: add Texture and Format to tgsi_instruction_memoryNicolai Hähnle2016-03-142-1/+11
| * get: reconcile aliasing enums for MaxCombinedShaderOutputResourcesNicolai Hähnle2016-03-142-2/+11
| * i965/fs: Restrict inequality that can only hold equal in saturate propagation.Francisco Jerez2016-03-141-1/+1
| * i965/vec4: Consider removal of no-op MOVs as progress during register coalesce.Francisco Jerez2016-03-141-0/+1
| * i965/fs: Add missing analysis invalidation in fixup_3src_null_dest().Francisco Jerez2016-03-141-0/+6
| * i965/fs: Add missing analysis invalidation in opt_sampler_eot().Francisco Jerez2016-03-141-1/+4
| * clover: Fix pipe_grid_info.indirect not being initialized.Hans de Goede2016-03-141-1/+1
| * mesa: docs: Intel i965 hardware limits.Sarah Sharp2016-03-141-7/+48
| * mesa: docs: i965: Use correct doxygen groupings syntaxSarah Sharp2016-03-141-2/+2
| * gallium/swr: Resource managementBruce Cherniak2016-03-1410-143/+265
| * i965: Remove useless IR self-destruct backend_shader method.Francisco Jerez2016-03-132-8/+0
| * nv50,nvc0: Set only NEW_CP_GLOBALS upon bindingPierre Moreau2016-03-132-2/+2
| * freedreno/ir3: lower extract_byte/wordRob Clark2016-03-131-0/+2
| * nv50,nvc0: handle SQRT lowering inside the driverIlia Mirkin2016-03-136-23/+27
| * nv50/ir: avoid folding mul + add if the mul has a dnzIlia Mirkin2016-03-131-3/+2
| * nvc0: fix blit triangle size to fully cover FB's > 8192x8192Ilia Mirkin2016-03-131-4/+4
| * freedreno: OUT_RELOC vs OUT_RELOCW fixesRob Clark2016-03-133-7/+7
| * freedreno/a4xx: hw binningRob Clark2016-03-134-33/+210
| * freedreno/a4xx: use generated headers for draw initiatorRob Clark2016-03-131-3/+4
| * freedreno/a4xx: remove RB_RENDER_CONTROL patchingRob Clark2016-03-136-41/+8
| * freedreno: update generated headersRob Clark2016-03-135-11/+32
| * freedreno/a3xx: move where we deal w/ binning FSRob Clark2016-03-133-10/+10
| * freedreno/a4xx: move where we deal w/ binning FSRob Clark2016-03-133-10/+10
| * freedreno/a3xx: constify the shader variantsRob Clark2016-03-132-6/+6
| * freedreno/a4xx: constify the shader variantsRob Clark2016-03-134-13/+13
| * freedreno/a3xx: remove duplicate mark of end of binning cmdsRob Clark2016-03-131-3/+0
| * radeonsi: avoid crash when a sampler state is bound for a buffer textureNicolai Hähnle2016-03-131-0/+1
| * i965: Use foreach_in_list_reverse_safe() macro.Matt Turner2016-03-121-12/+2
| * nir/clone: Add support for cloning a single function_implJason Ekstrand2016-03-122-32/+81
| * nir/validate: Better function validationJason Ekstrand2016-03-121-7/+15
| * nir/print: Better function argument printingJason Ekstrand2016-03-121-2/+10
| * nir/print: Factor variable name lookup into a helperJason Ekstrand2016-03-121-30/+36
| * nir: Create function parameters in function_impl_createJason Ekstrand2016-03-121-0/+20
| * nir: Add a helper for creating a "bare" nir_function_implJason Ekstrand2016-03-122-10/+20
| * nir: Add a new "param" variable mode for parameters and return variablesJason Ekstrand2016-03-123-2/+13
| * nir/glsl: Remove dead function parameter handling codeJason Ekstrand2016-03-121-46/+5
| * st/va: add HEVC main 10 profileBoyuan Zhang2016-03-111-1/+4
| * radeon/video: enable HEVC main 10 decodeBoyuan Zhang2016-03-111-2/+6
| * radeon/uvd: handle HEVC main 10 decodeBoyuan Zhang2016-03-111-11/+58
| * i965/chv: Display proper brandingBen Widawsky2016-03-113-5/+31
| * i965/chv: Update lower min for CS threadsBen Widawsky2016-03-111-1/+1
| * i965/chv: Check that compute threads are above thresholdBen Widawsky2016-03-112-0/+9
| * i965/chv: Use kernel provided info for max_cs_threadsBen Widawsky2016-03-111-1/+8