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* gm107/ir: make sure that flagsDef is set when emitting setcondSamuel Pitoiset2016-06-281-1/+1
* radeonsi: set PA_SU_SMALL_PRIM_FILTER_CNTL register on PolarisMarek Olšák2016-06-282-0/+11
* radeon/vce: use vce structure for vce 52 firmwareBoyuan Zhang2016-06-285-98/+517
* radeon/vce: add vce structuresBoyuan Zhang2016-06-281-0/+297
* st/omx: fix decoder fillout for the OMX result bufferLeo Liu2016-06-281-4/+5
* pipe_loader_sw: Fix fd leak when instantiated via pipe_loader_sw_probe_kmsHans de Goede2016-06-281-0/+7
* clover: Fix kernel metadata retrieval after clang r273425Jan Vesely2016-06-271-4/+31
* clover/llvm: Fix copyright attribution of invocation.cpp.Francisco Jerez2016-06-271-1/+5
* i965: Print EOT in fs_visitor::dump_instruction().Kenneth Graunke2016-06-271-0/+4
* i965: Make emit_urb_writes() not produce an EOT message for GS.Kenneth Graunke2016-06-271-0/+7
* glsl: Ignore ir_texture in lower_const_arrays_to_uniforms.Kenneth Graunke2016-06-271-0/+7
* gm107/ir: add missing setcond flags for LOP variantsSamuel Pitoiset2016-06-281-0/+2
* gm107/ir: make use of LOP32I for all immediatesSamuel Pitoiset2016-06-281-1/+1
* virgl: reduce some limits for nowDave Airlie2016-06-281-3/+4
* st/omx: count number of slicesJulien Isorce2016-06-271-0/+3
* st/omx: add support for nouveau / interlacedJulien Isorce2016-06-271-25/+26
* st/omx: retrieve preferred interlaced and buffer_formatsJulien Isorce2016-06-271-2/+24
* radeonsi: use optimal WD settings for primitive restart on PolarisMarek Olšák2016-06-271-2/+10
* st/va: Check NULL pointerGurkirpal Singh2016-06-271-0/+4
* nir: Fix copy_prop_src when src is an indirect access on a reg.Eric Anholt2016-06-261-1/+1
* gm107/ir: make use of MOV32I for all immediatesSamuel Pitoiset2016-06-271-2/+1
* i965: Use miptree to decide format on multi-plane images for gen < 7Jordan Justen2016-06-261-1/+2
* nvc0: update "derived" state function namesIlia Mirkin2016-06-261-8/+8
* nvc0: provide support for unscaled poly offset unitsIlia Mirkin2016-06-263-3/+26
* gm107/ir: make use of IMUL32I for all immediatesSamuel Pitoiset2016-06-261-1/+1
* radeonsi: make si_is_format_supported staticMarek Olšák2016-06-253-11/+6
* radeonsi: boolean -> bool, TRUE -> true, FALSE -> falseMarek Olšák2016-06-254-15/+15
* gallium/radeon: boolean -> bool, TRUE -> true, FALSE -> falseMarek Olšák2016-06-259-75/+75
* gallium/radeon/winsyses: boolean -> bool, TRUE -> true, FALSE -> falseMarek Olšák2016-06-259-132/+134
* gallium/radeon: use r600_resource_referenceMarek Olšák2016-06-2512-40/+32
* nir: Add a NIR_VALIDATE environment variableJason Ekstrand2016-06-251-0/+6
* st/nine: Use offset_units_unscaledAxel Davy2016-06-255-11/+13
* r600g: Implement POLYGON_OFFSET_UNITS_UNSCALEDAxel Davy2016-06-255-36/+46
* radeonsi: Implement POLYGON_OFFSET_UNITS_UNSCALEDAxel Davy2016-06-252-15/+19
* radeon: Remove useless pa_su_poly_offset_db_fmt_cntlAxel Davy2016-06-251-1/+0
* r600g: move PA_SU_POLY_OFFSET_DB_FMT_CNTL to poly offset states for evergreenAxel Davy2016-06-251-25/+13
* r600g: move PA_SU_POLY_OFFSET_DB_FMT_CNTL to poly offset states for r600Axel Davy2016-06-251-24/+13
* radeonsi: move PA_SU_POLY_OFFSET_DB_FMT_CNTL to poly offset statesAxel Davy2016-06-251-23/+8
* gallium: Add a cap for offset_units_unscaledAxel Davy2016-06-2519-0/+31
* i965: Skip update_texture_surface when the plane doesn't existJordan Justen2016-06-243-29/+26
* i965: Validate a few SEND-from-GRF requirements.Kenneth Graunke2016-06-241-0/+18
* i965: Delete send-from-GRF only opcodes from implied_mrf_writes().Kenneth Graunke2016-06-241-19/+0
* i965: Drop unnecessary inst->base_mrf = -1 assignments.Kenneth Graunke2016-06-242-16/+0
* i965: Set fs_inst::base_mrf = -1 by default.Kenneth Graunke2016-06-241-0/+1
* i965: Drop unused return value from intel_finalize_mipmap_tree().Kenneth Graunke2016-06-242-7/+5
* i965: Move contents of brw_tex.c into intel_tex_validate.c.Kenneth Graunke2016-06-244-58/+20
* radeonsi: fix fractional odd tessellation spacing for PolarisMarek Olšák2016-06-244-1/+23
* radeonsi: set some VGT context registers on SI-CIMarek Olšák2016-06-241-0/+3
* radeonsi: optimize rendering to linear color buffersMarek Olšák2016-06-242-1/+12
* radeonsi: set almost optimal settings in SC_MODE_CNTL_1Marek Olšák2016-06-241-1/+10
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