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* intel: decoder: don't read qword outside instruction/struct limitLionel Landwerlin2017-11-012-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We used to print invalid data when the last field was being clamped to 32bits due to Dword Length of the whole instruction. Here is an example where the decoder read part of the next instruction instead of stopping at the 32bit limit: 0x000ce0b4: 0x10000002: MI_STORE_DATA_IMM 0x000ce0b4: 0x10000002 : Dword 0 DWord Length: 2 Store Qword: 0 Use Global GTT: false 0x000ce0b8: 0x00045010 : Dword 1 Core Mode Enable: 0 Address: 0x00045010 0x000ce0bc: 0x00000000 : Dword 2 0x000ce0c0: 0x00000000 : Dword 3 Immediate Data: 8791026489807077376 With this change we have the proper value : 0x000ce0b4: 0x10000002: MI_STORE_DATA_IMM (4 Dwords) 0x000ce0b4: 0x10000002 : Dword 0 DWord Length: 2 Store Qword: 0 Use Global GTT: false 0x000ce0b8: 0x00045010 : Dword 1 Core Mode Enable: 0 Address: 0x00045010 0x000ce0bc: 0x00000000 : Dword 2 0x000ce0c0: 0x00000000 : Dword 3 Immediate Data: 0 Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
* intel: decoder: split out getting the next field and decoding itLionel Landwerlin2017-11-011-10/+21
| | | | | | | | | Due to the new way we handle fields, we need *not* to forget the first field when decoding instructions. The issue was that the advance function was called first and skipped the first field. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
* intel: decoder: move field name copyLionel Landwerlin2017-11-011-2/+7
| | | | | | | This should be inside the function that actually decodes fields. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
* intel: decoder: reorder iterator init functionLionel Landwerlin2017-11-011-14/+14
| | | | | | | Making the next change more readable. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
* intel: common: print out all dword with field spanning multiple dwordsLionel Landwerlin2017-11-011-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For example, we were skipping Dword 3 in this PIPE_CONTROL : 0x000ce130: 0x7a000004: PIPE_CONTROL DWord Length: 4 0x000ce134: 0x00000010 : Dword 1 Flush LLC: false Destination Address Type: 0 (PPGTT) LRI Post Sync Operation: 0 (No LRI Operation) Store Data Index: 0 Command Streamer Stall Enable: false Global Snapshot Count Reset: false TLB Invalidate: false Generic Media State Clear: false Post Sync Operation: 0 (No Write) Depth Stall Enable: false Render Target Cache Flush Enable: false Instruction Cache Invalidate Enable: false Texture Cache Invalidation Enable: false Indirect State Pointers Disable: false Notify Enable: false Pipe Control Flush Enable: false DC Flush Enable: false VF Cache Invalidation Enable: true Constant Cache Invalidation Enable: false State Cache Invalidation Enable: false Stall At Pixel Scoreboard: false Depth Cache Flush Enable: false 0x000ce138: 0x00000000 : Dword 2 Address: 0x00000000 0x000ce140: 0x00000000 : Dword 4 Immediate Data: 0 Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
* intel: decoder: build sorted linked lists of fieldsLionel Landwerlin2017-11-012-25/+34
| | | | | | | | | | The xml files don't always have fields in order. This might confuse our parsing of the commands. Let's have the fields in order. To do this, the easiest way it to use a linked list. It also helps a bit with the iterator. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
* intel: common: expose gen_spec fieldsLionel Landwerlin2017-11-012-13/+13
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
* i965: Initialize disk shader cache if MESA_GLSL_CACHE_DISABLE is falseJordan Justen2017-10-313-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | (Apologies for the double negative.) For now, the shader cache is disabled by default on i965 to allow us to verify its stability. In other words, to enable the shader cache on i965, set MESA_GLSL_CACHE_DISABLE to false or 0. If the variable is unset, then the shader cache will be disabled. We use the build-id of i965_dri.so for the timestamp, and the pci device id for the device name. v2: * Simplify code by forcing link to include build id sha. (Matt) v3: * Don't use a for loop with snprintf for bin to hex. (Matt) * Assume fixed length render and timestamp string to further simplify code. Cc: Matt Turner <[email protected]> Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* dri drivers: Always add the sha1 build-idJordan Justen2017-10-314-1/+4
| | | | | | | | | | | v4: * Add Android build changes. (Emil) Cc: Dylan Baker <[email protected]> Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* disk_cache: Fix issue reading GLSL metadataJordan Justen2017-10-311-1/+1
| | | | | | | | | | | | | | This would cause the read of the metadata content to fail, which would prevent the linking from being skipped. Seen on Rocket League with i965 shader cache. Fixes: b86ecea3446e "util/disk_cache: write cache item metadata to disk" Cc: Timothy Arceri <[email protected]> Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl/shader_cache: Save fs (BlendSupport) metadataJordan Justen2017-10-311-0/+6
| | | | | | | | | | | | | | | | | | Fixes many GL 4.5 CTS blend tests, such as: * GL45-CTS.blend_equation_advanced.extension_directive_enable * GL45-CTS.blend_equation_advanced.extension_directive_warn * GL45-CTS.blend_equation_advanced.blend_all.GL_MULTIPLY_KHR_all_qualifier * GL45-CTS.blend_equation_advanced.blend_specific.GL_COLORBURN_KHR v2: * Directly save the BlendSupport field to avoid potentially including a pointer in the future in the structure is updated. (tarceri) Cc: Timothy Arceri <[email protected]> Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Initialize sha1 hash of dri config optionsJordan Justen2017-10-311-0/+4
| | | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Don't link when the program was found in the disk cacheJordan Justen2017-10-311-0/+3
| | | | | | Signed-off-by: Jordan Justen <[email protected]> Cc: Timothy Arceri <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: add cache fallback support using serialized nirJordan Justen2017-10-311-1/+26
| | | | | | | | | | | | | | | | If the i965 gen program cannot be loaded from the cache, then we fallback to using a serialized nir program. This is based on "i965: add cache fallback support" by Timothy Arceri <[email protected]>. Tim's version was written to fallback to compiling from source, and therefore had to be much more complex. After Connor and Jason implemented nir serialization, I was able to rewrite and greatly simplify this patch. Signed-off-by: Jordan Justen <[email protected]> Acked-by: Timothy Arceri <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: add support for cached shaders with xfb qualifiersTimothy Arceri2017-10-311-0/+8
| | | | | | | | | | For now this disables the shader cache when transform feedback is enabled via the GL API as we don't currently allow for it when generating the sha for the shader. Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* mesa/glsl: add api_enabled flag to gl_transform_feedback_infoTimothy Arceri2017-10-312-1/+7
| | | | | | | | | | This will be used to disable the shader cache when xfb is enabled via the api as we don't currently allow for it when generating the sha for the shader. Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add shader cache support for computeJordan Justen2017-10-315-12/+53
| | | | | | | | | | v2: * Use MAYBE_UNUSED. (Matt) Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: add shader cache support for tess stagesTimothy Arceri2017-10-313-16/+70
| | | | | | | | | | v2: * Use MAYBE_UNUSED. (Matt) [[email protected]: *_cached_program => brw_disk_cache_*_program] Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: add shader cache support for geometry shadersTimothy Arceri2017-10-312-8/+35
| | | | | | | | | | v2: * Use MAYBE_UNUSED. (Matt) [[email protected]: *_cached_program => brw_disk_cache_*_program] Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add shader cache support for vertex and fragment stagesTimothy Arceri2017-10-313-16/+30
| | | | | | | | | | | | | This enables the cache on vertex and fragment shaders only. v2: * Use MAYBE_UNUSED. (Matt) [[email protected]: reword subject] [[email protected]: *_cached_program => brw_disk_cache_*_program] Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: add initial implementation of on disk shader cacheTimothy Arceri2017-10-314-0/+297
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This uses the Mesa disk_cache support to write out the final linked binary for vertex and fragment shader programs. This is based off the initial implementation done by Carl Worth. It has been significantly reworked, first by Tim Arceri, and then by Jordan Justen. v2: * Squash 'i965: add image param shader cache support' * Squash 'i965: add shader cache support for pull param pointers' * Sustantially simplified by a rework on top of Jason's 2975e4c56a7a. * Rename load_program_data to read_program_data. (Jason) v3: * Simplify and align program read/write. (Jason) v4: * Don't save prog_data size since we know it from the stage. (Ken) * Don't save program size, since prog_data includes the size. (Ken) * Remove `assert` that potentially could be triggered by disk corruption of the cache entries. (Ken) * Fix compute shader scratch allocation. (Ken) * Remove special case mapping for non-LLC. (Ken) * Remove SET_UPLOAD_PARAMS macro [[email protected]: *_cached_program => brw_disk_cache_*_program] [[email protected]: brw_shader_cache.c => brw_disk_cache.c] [[email protected]: don't map to write program when LLC is present] [[email protected]: set program_written_to_cache on read from cache] [[email protected]: only try cache when status is linking_skipped] [[email protected]: all v2-v4 changes noted above] Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Calculate thread_count in brw_alloc_stage_scratchJordan Justen2017-10-318-45/+62
| | | | | | | | | | Previously, thread_count was sent in from the stage after some stage specific calculations. Those stage specific calculations were moved into brw_alloc_stage_scratch, which will allow the shader cache to also use the same calculations. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel/compiler: Add functions to get prog_data and prog_key sizes for a stageJordan Justen2017-10-312-0/+42
| | | | | | | | | v2: * Return unsigned instead of size_t. (Ken) Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel/compiler: Add union types for prog_data and prog_key stagesJordan Justen2017-10-311-0/+22
| | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* blob: Don't set overrun if reading 0 bytes at end of dataJordan Justen2017-10-311-1/+1
| | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/compiler: Remove final_program_size from brw_compile_*Jordan Justen2017-10-3117-92/+55
| | | | | | | | | The caller can now use brw_stage_prog_data::program_size which is set by the brw_compile_* functions. Cc: Jason Ekstrand <[email protected]> Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/compiler: add new field for storing program sizeCarl Worth2017-10-316-14/+35
| | | | | | | | | | | | This will be used by the on disk shader cache. v2: * Set in brw_compile_* rather than brw_codegen_*. (Jason) Signed-off-by: Timothy Arceri <[email protected]> [[email protected]: Only add to brw_stage_prog_data] Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Don't rely on nir for uses_texture_gatherJordan Justen2017-10-313-9/+9
| | | | | | | | | When a program is restored from the shader cache, prog->nir will be NULL, but prog->info will be restored. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/link: Serialize program to nir after linking for shader cacheJordan Justen2017-10-311-0/+10
| | | | | | | | | | | | | If the shader cache is enabled, after linking the program, we serialize the program to nir. This will be saved out by the glsl shader cache support. Later, if the same program is found in the cache, we can use the nir for a fallback in the unlikely case that the gen binary program is not found in the cache. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* glsl/shader_cache: Save and restore serialized nir in gl_programJordan Justen2017-10-311-0/+16
| | | | | | | | | v3: * Rename serialized_nir* to driver_cache_blob*. (Tim) Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* main: Add driver cache blob fields to gl_programJordan Justen2017-10-312-0/+8
| | | | | | | | | | | | | These fields can be used to optionally save off a driver blob with the program metadata. For example, serialized nir, or tgsi. v3: * Rename serialized_nir* to driver_cache_blob*. (Tim) * Free memory. (Jason) Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Add hooks for testing serializationJason Ekstrand2017-10-312-0/+36
| | | | | Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* nir: add serialization and deserializationConnor Abbott2017-10-314-0/+1248
| | | | | | | | | | | | | | | | | | | | v2 (Jason Ekstrand): - Various whitespace cleanups - Add helpers for reading/writing objects - Rework derefs - [de]serialize nir_shader::num_* - Fix uses of blob_reserve_bytes - Use a bitfield struct for packing tex_instr data v3: - Zero nir_variable struct on deserialization. (Jordan) - Allow nir_serialize.h to be included in C++. (Jordan) - Handle NULL info.name. (Jason) - Set info.name to NULL when name is NULL. (Jordan) Acked-by: Timothy Arceri <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Acked-by: Jason Ekstrand <[email protected]>
* mesa/st: implement max combined output resources limiting.Dave Airlie2017-11-011-0/+6
| | | | | | | if the driver sets the cap, then use the value it gives us. Reviewed-by: Ilia Mirkin <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* gallium: add cap for driver specified max combined shader resources.Dave Airlie2017-11-0118-1/+20
| | | | | | | | Some hw (evergreen) has a limit on how many combined (images/buffers/mrts) a fragment shader can access. Reviewed-by: Ilia Mirkin <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600/sb: bail out if prepare_alu_group() doesn't find a proper schedulingGert Wollny2017-11-012-20/+31
| | | | | | | | | | | | | | | It is possible that the optimizer ends up in an infinite loop in post_scheduler::schedule_alu(), because post_scheduler::prepare_alu_group() does not find a proper scheduling. This can be deducted from pending.count() being larger than zero and not getting smaller. This patch works around this problem by signalling this failure so that the optimizers bails out and the un-optimized shader is used. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103142 Cc: <[email protected]> Signed-off-by: Gert Wollny <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi: fix culldist_writemask in nir pathTimothy Arceri2017-11-011-2/+1
| | | | | | | | | | | | The shared si_create_shader_selector() code already offsets the mask. Fixes the following piglit tests: arb_cull_distance/clip-cull-3.shader_test arb_cull_distance/clip-cull-4.shader_test Fixes: 29d7bdd179bb (radeonsi: scan NIR shaders to obtain required info) Reviewed-by: Marek Olšák <[email protected]>
* nir/opt_intrinsics: Fix values for gl_SubGroupG{e,t}MaskARBNeil Roberts2017-10-311-2/+22
| | | | | | | | | | | | | | | | | | Previously the values were calculated by just shifting ~0 by the invocation ID. This would end up including bits that are higher than gl_SubGroupSizeARB. The corresponding CTS test effectively requires that these high bits be zero so it was failing. There is a Piglit test as well but this appears to checking the wrong values so it passes. For the two greater-than bitmasks, this patch adds an extra mask with (~0>>(64-gl_SubGroupSizeARB)) to force these bits to zero. Fixes: KHR-GL45.shader_ballot_tests.ShaderBallotBitmasks Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102680#c3 Reviewed-by: Jason Ekstrand <[email protected]> Cc: [email protected] Signed-off-by: Neil Roberts <[email protected]>
* i965: Check CCS_E compatibility for texture view renderingNanley Chery2017-10-311-2/+27
| | | | | | | | | | | | | | | | Only use CCS_E to render to a texture that is CCS_E-compatible with the original texture's miptree (linear) format. This prevents render operations from writing data that can't be decoded with the original miptree format. On Gen10, with the new CCS_E-enabled formats handled, this enables the driver to pass the arb_texture_view-rendering-formats piglit test. v2. Add a TODO for texturing. (Jason) Cc: <[email protected]> Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/isl: Disable some gen10 CCS_E formats for nowNanley Chery2017-10-311-0/+24
| | | | | | | | | CannonLake additionally supports R11G11B10_FLOAT and four 10-10-10-2 formats with CCS_E. None of these formats fit within the current blorp_copy framework so disable them until support is added. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* meson: pass correct args to gles2 ABI testEric Engestrom2017-10-311-1/+4
| | | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* meson: pass correct args to gles1 ABI testEric Engestrom2017-10-311-1/+4
| | | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* meson: pass correct args to gbm symbol testEric Engestrom2017-10-311-2/+4
| | | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* meson: pass correct args to wayland-egl symbol testEric Engestrom2017-10-311-1/+4
| | | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* automake+meson: don't run egl symbol check on libglvnd libEric Engestrom2017-10-312-6/+15
| | | | | | | | We might want to add a symbol check for the glvnd variant though. Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* meson: pass correct env/args to egl testsEric Engestrom2017-10-311-2/+8
| | | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* gles2: fail symbol check if lib is missingEric Engestrom2017-10-311-1/+9
| | | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* gles1: fail symbol check if lib is missingEric Engestrom2017-10-311-1/+9
| | | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* gbm: fail symbol check if lib is missingEric Engestrom2017-10-311-1/+10
| | | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* wayland-egl: fail symbol check if lib is missingEric Engestrom2017-10-311-1/+9
| | | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
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