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Age
Files
Lines
*
nvc0: Set winding order regardless of domain.
Kenneth Graunke
2015-12-30
1
-2
/
+4
*
glsl: Fix varying struct locations when varying packing is disabled.
Kenneth Graunke
2015-12-30
1
-13
/
+2
*
drirc: Disable ARB_blend_func_extended for Heaven 4.0/Valley 1.0.
Kenneth Graunke
2015-12-30
1
-0
/
+8
*
glsl: add GL_ARB_shader_draw_parameters define
Ilia Mirkin
2015-12-30
1
-0
/
+3
*
nvc0: add ARB_shader_draw_parameters support
Ilia Mirkin
2015-12-30
13
-15
/
+73
*
st/mesa: add GL_ARB_shader_draw_parameters support
Ilia Mirkin
2015-12-30
3
-2
/
+4
*
gallium: add a drawid to pipe_draw_info
Ilia Mirkin
2015-12-30
1
-0
/
+2
*
gallium: add PIPE_CAP_DRAW_PARAMETERS
Ilia Mirkin
2015-12-30
16
-2
/
+19
*
gallium: add baseinstance/drawid semantics
Ilia Mirkin
2015-12-30
3
-1
/
+18
*
nv50/ir: attempt to do more constant folding on mad -> add conversion
Ilia Mirkin
2015-12-30
1
-11
/
+10
*
i965/gen8: Always use BRW_REGISTER_TYPE_UW for MUL on GEN8+
Marta Lofstedt
2015-12-30
2
-29
/
+1
*
glsl: tidy up struct with a single member
Timothy Arceri
2015-12-30
8
-19
/
+15
*
glsl/linker: annotate static functions as such
Emil Velikov
2015-12-30
2
-3
/
+3
*
glsl: annotate ast_process_struct_or_iface_block_members() as static
Emil Velikov
2015-12-30
1
-1
/
+1
*
nir/builder: Add an init function that creates a simple shader for you
Jason Ekstrand
2015-12-29
4
-34
/
+28
*
mesa/st: Pad out _mesa_sysval_to_semantic for new SYSTEM_VALUE_* enums
Kristian Høgsberg Kristensen
2015-12-29
1
-0
/
+2
*
nv50/ir: float(s32 & 0xff) = float(u8), not s8
Ilia Mirkin
2015-12-29
1
-0
/
+3
*
i965: Reemit vertex state between indirect multi draws
Kristian Høgsberg Kristensen
2015-12-29
1
-2
/
+22
*
nir: Teach nir_opt_algebraic about adding and subtracting the same thing
Kristian Høgsberg Kristensen
2015-12-29
1
-0
/
+4
*
i965: Add support for gl_DrawIDARB and enable extension
Kristian Høgsberg Kristensen
2015-12-29
12
-5
/
+145
*
i965: Add support for gl_BaseVertexARB and gl_BaseInstanceARB
Kristian Høgsberg Kristensen
2015-12-29
11
-37
/
+88
*
i965: Assert that SYSTEM_VALUE_VERTEX_ID gets lowered
Kristian Høgsberg Kristensen
2015-12-29
1
-0
/
+1
*
mesa: Add core mesa support for GL_ARB_shader_draw_parameters
Kristian Høgsberg Kristensen
2015-12-29
9
-0
/
+41
*
mesa/vbo: Add draw_id field to struct _mesa_prim
Kristian Høgsberg Kristensen
2015-12-29
2
-0
/
+5
*
nir: Remove function overload in control flow test
Aaron Watry
2015-12-29
1
-2
/
+1
*
radeonsi: add RADEON_REPLACE_SHADERS debug option
Nicolai Hähnle
2015-12-29
3
-5
/
+105
*
radeonsi: count compilations in si_compile_llvm
Nicolai Hähnle
2015-12-29
2
-1
/
+2
*
gallium/util: add DEBUG_GET_ONCE_OPTION
Nicolai Hähnle
2015-12-29
1
-0
/
+13
*
r600: fix constant buffer size programming
Grazvydas Ignotas
2015-12-29
2
-2
/
+2
*
i965: Enable ARB_tessellation_shader on Gen7-7.5.
Kenneth Graunke
2015-12-28
2
-3
/
+3
*
i965: Don't set interleave or complete on TCS EOT message.
Kenneth Graunke
2015-12-28
5
-5
/
+41
*
i965: Relase input URB Handles on Gen7/7.5 when TCS threads finish.
Kenneth Graunke
2015-12-28
5
-1
/
+93
*
i965: Use proper TCS barrier ID bits for Ivybridge/Baytrail.
Kenneth Graunke
2015-12-28
1
-4
/
+6
*
i965: Use proper TCS Instance ID bits for Ivybridge/Baytrail.
Kenneth Graunke
2015-12-28
1
-2
/
+5
*
i965: Port tessellation evaluation shaders to vec4 mode.
Kenneth Graunke
2015-12-28
8
-2
/
+365
*
i965: Emit a real 3DSTATE_DS on Gen7.
Kenneth Graunke
2015-12-28
1
-11
/
+54
*
i965: Emit a real 3DSTATE_HS on Gen7.
Kenneth Graunke
2015-12-28
1
-11
/
+47
*
i965: Add the TCS/TES state upload atoms to the gen7_atoms list.
Kenneth Graunke
2015-12-28
3
-30
/
+14
*
nir: Get rid of function overloads
Jason Ekstrand
2015-12-28
59
-386
/
+313
*
nvc0: don't forget to reset VTX_TMP bufctx slot after blit completion
Ilia Mirkin
2015-12-27
1
-0
/
+2
*
nv50,nvc0: add a note when converting vertex elements using CPU
Ilia Mirkin
2015-12-27
2
-0
/
+6
*
gallium/auxiliary: don't build NIR sources with MSVC2008 flags
Connor Abbott
2015-12-23
2
-7
/
+15
*
i965: Add tr_mode and mip tail information in surface state dump
Anuj Phogat
2015-12-23
1
-2
/
+5
*
i965/gen8/cs: Gen8 requires 64 byte alignment for push constant data
Jordan Justen
2015-12-22
1
-3
/
+3
*
freedreno/ir3: spelling..
Rob Clark
2015-12-23
1
-6
/
+6
*
nir/print: print variable constant-initializers
Rob Clark
2015-12-23
1
-0
/
+53
*
i965: Enable ARB_tessellation_shader on Gen8+.
Kenneth Graunke
2015-12-22
1
-0
/
+1
*
i965: Handle mix-and-match TCS/TES with separate shader objects.
Kenneth Graunke
2015-12-22
8
-24
/
+87
*
i965: Defer input lowering for tessellation stages until specialization.
Kenneth Graunke
2015-12-22
4
-27
/
+22
*
i965: Automatically create a passthrough TCS when needed.
Kenneth Graunke
2015-12-22
3
-12
/
+113
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