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* gallium/radeon: Do not use u_upload_mgr for buffer downloadsNiels Ole Salscheider2014-08-191-12/+8
| | | | | | | | | | | | | | Instead create a staging texture with pipe_buffer_create and PIPE_USAGE_STAGING. u_upload_mgr sets the usage of its staging buffer to PIPE_USAGE_STREAM. But since 150ac07b855b5c5f879bf6ce9ca421ccd1a6c938 CPU -> GPU streaming buffers are created in VRAM. Therefore the staging texture (in VRAM) does not offer any performance improvements for buffer downloads. Signed-off-by: Niels Ole Salscheider <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* r600g: copy IA_MULTI_VGT_PARAM programming from radeonsi for CaymanMarek Olšák2014-08-194-3/+36
| | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: bump PRIMGROUP_SIZE for some casesMarek Olšák2014-08-191-1/+4
| | | | | | | Recommended by hw people. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: set PARTIAL_VS_WAVE(0) when appropriateMarek Olšák2014-08-191-1/+6
| | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: set IA_MULTI_VGT_PARAM on SI the same as on CIK (v2)Marek Olšák2014-08-192-46/+50
| | | | | | | Nothing's changed for CIK here. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: simplify si_num_banks functionMarek Olšák2014-08-193-15/+13
| | | | | | This makes it easier to use. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: use r600_draw_rectangle from r600gMarek Olšák2014-08-199-75/+77
| | | | | | Rectangles are easier than triangles for the rasterizer. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: save scissor state and sample mask for u_blitterMarek Olšák2014-08-193-8/+29
| | | | | Cc: [email protected] Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: don't set CB_SHADER_MASK=1 if there are no color outputsMarek Olšák2014-08-191-4/+0
| | | | | | This hack isn't needed anymore because of the previous u_blitter commit. Reviewed-by: Michel Dänzer <[email protected]>
* gallium/u_blitter: don't use an empty fragment shader if there's a colorbufferMarek Olšák2014-08-191-1/+1
| | | | | | This is custom code used by some drivers. Reviewed-by: Roland Scheidegger <[email protected]>
* gallium/util: handle PIPE_BUFFER in util_pipe_tex_to_tgsi_texMarek Olšák2014-08-191-0/+3
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* rbug: only add textures to the listMarek Olšák2014-08-191-2/+5
| | | | | | rbug-gui cannot display buffers, so it's pointless to add them. Reviewed-by: Roland Scheidegger <[email protected]>
* rbug: fix a crash in sampler_view_destroy caused by incorrect contextMarek Olšák2014-08-191-1/+1
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* rbug: send the actual number of layers to the clientMarek Olšák2014-08-191-1/+4
| | | | | | This sends the correct value for array textures. Reviewed-by: Roland Scheidegger <[email protected]>
* rbug: implement streamout context functionsMarek Olšák2014-08-191-0/+46
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* rbug: fix crash in set_vertex_buffersMarek Olšák2014-08-191-1/+1
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* rbug: remove contexts from the list properlyMarek Olšák2014-08-191-1/+3
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* ilo: fold drm_intel_get_aperture_sizes() within probe_winsys()Emil Velikov2014-08-194-15/+15
| | | | | | | | | ... and store the value in intel_winsys_info/ilo_dev_info. Suggested-by: Chia-I Wu <[email protected]> Signed-off-by: Emil Velikov <[email protected]> olv: check for errors and report raw values
* i965/cfg: Add a foreach_block_and_inst_safe macro.Matt Turner2014-08-181-0/+4
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/cfg: Add a foreach_inst_in_block_safe macro.Matt Turner2014-08-181-0/+8
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/cfg: Add a foreach_block_safe macro.Matt Turner2014-08-181-0/+3
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Pass a cfg pointer to generate_{code,assembly}.Matt Turner2014-08-1810-41/+39
| | | | | | | The loop over all instructions is now two-fold, over all of the blocks and all of the instructions in each block. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Add and use foreach_block macro.Matt Turner2014-08-1814-143/+119
| | | | | Use this as an opportunity to rename 'block_num' to 'num'. block->num is clear, and block->block_num has always been redundant.
* i965/cfg: Embed link in bblock_t for main block list.Matt Turner2014-08-182-5/+7
| | | | | | | | The next patch adds a foreach_block (block, cfg) macro, which works better if it provides a direct bblock_t pointer, rather than a bblock_link pointer that you have to use to find the actual block. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/fs: Optimize gl_FrontFacing calculation on Gen4/5.Matt Turner2014-08-181-5/+16
| | | | | | Doesn't use fewer instructions, but it does avoid writing the flag register and if we want to switch the representation of true for Gen4/5 in the future, we can just delete the AND instruction.
* i965/fs: Optimize gl_FrontFacing calculation on Gen6+.Matt Turner2014-08-181-6/+15
| | | | | | | total instructions in shared programs: 4288650 -> 4282838 (-0.14%) instructions in affected programs: 595018 -> 589206 (-0.98%) Reviewed-by: Anuj Phogat <[email protected]>
* i965: Use ~0 to represent true on Gen >= 6.Matt Turner2014-08-184-34/+102
| | | | | | | total instructions in shared programs: 4292303 -> 4288650 (-0.09%) instructions in affected programs: 299670 -> 296017 (-1.22%) Reviewed-by: Anuj Phogat <[email protected]>
* i965/fs: Optimize emit_bool_to_cond_code for logical exprs.Matt Turner2014-08-181-54/+87
| | | | | | | | | AND, OR, and XOR can generate the conditional code directly. total instructions in shared programs: 4293335 -> 4292303 (-0.02%) instructions in affected programs: 121408 -> 120376 (-0.85%) Reviewed-by: Anuj Phogat <[email protected]>
* i965: Use UniformBooleanTrue value for boolean literal true.Matt Turner2014-08-182-2/+6
| | | | Reviewed-by: Anuj Phogat <[email protected]>
* glsl: Use UniformBooleanTrue value for uniform initializers.Matt Turner2014-08-188-34/+52
| | | | Reviewed-by: Anuj Phogat <[email protected]>
* mesa: Upload boolean uniforms using UniformBooleanTrue.Matt Turner2014-08-181-2/+2
| | | | Reviewed-by: Anuj Phogat <[email protected]>
* i965: Remove dead call to _mesa_associate_uniform_storage().Matt Turner2014-08-181-6/+0
| | | | | | | | Dead since the call to _mesa_generate_parameters_list_for_uniforms was removed in commit 12751ef2. So this was why all of that code that was supposed to fix up the value of a uniform bool to wasn't happening. Reviewed-by: Anuj Phogat <[email protected]>
* mapi: Inline shared-glapi/tests/Makefile.Matt Turner2014-08-182-21/+11
| | | | Reviewed-by: Kristian Høgsberg <[email protected]>
* mapi: Inline glapi/tests/Makefile.Matt Turner2014-08-182-22/+13
| | | | Reviewed-by: Kristian Høgsberg <[email protected]>
* mapi: Inline glapi/Makefile.Matt Turner2014-08-183-76/+46
| | | | Reviewed-by: Kristian Høgsberg <[email protected]>
* mapi: Inline es2api/Makefile.Matt Turner2014-08-182-70/+41
| | | | Reviewed-by: Kristian Høgsberg <[email protected]>
* mapi: Inline es1api/Makefile.Matt Turner2014-08-182-65/+39
| | | | Reviewed-by: Kristian Høgsberg <[email protected]>
* mapi: Inline shared-glapi/Makefile.Matt Turner2014-08-182-37/+43
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* i965: Enable instruction compaction on Gen8+.Matt Turner2014-08-181-1/+1
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add support for compacting 3-src instructions on Gen8.Matt Turner2014-08-181-0/+185
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add support for compacting 1- and 2-src instructions on Gen8.Matt Turner2014-08-181-13/+35
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/gen8: Add 3-src instruction compaction tables.Matt Turner2014-08-181-0/+27
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/gen8: Add instruction compaction tables.Matt Turner2014-08-181-0/+150
| | | | Acked-by: Kenneth Graunke <[email protected]>
* i965: Update JIP/UIP compaction code to operate on bytes.Matt Turner2014-08-181-4/+8
| | | | | | | JIP/UIP were previously in units of compacted instructions. On Gen8 they're in units of bytes. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Reverse condition ordering to let us support other gens.Matt Turner2014-08-181-3/+3
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/disasm: Add CSEL.Matt Turner2014-08-181-0/+1
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* mesa: fix copy and paste errors in glBindVertexBuffersTimothy Arceri2014-08-191-2/+2
| | | | | Signed-off-by: Timothy Arceri <[email protected]> Reviewed-by: Fredrik Höglund <[email protected]>
* nv50/ir: (trivial) initialize pointer to silence warningTobias Klausmann2014-08-181-1/+1
| | | | | Reviewed-by: Ilia Mirkin <[email protected]> Signed-off-by: Tobias Klausmann <[email protected]>
* vc4: Add support for swizzling of texture colors.Eric Anholt2014-08-183-4/+39
| | | | | Fixes swapped colors on the copypix demo and some piglit tests like pbo-teximage-tiling .
* vc4: Fix handling of non-XYZW swizzles in color outputs.Eric Anholt2014-08-181-6/+6
| | | | | | | The SWIZZLE_1 of the winsys destination was dereffing off the end of the array, which surprisingly often worked out (since nobody reads the rendered value anyway, so whatever junk was referenced in the QIR didn't matter), but shader dumping would sometimes segfault.