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* anv: Take a single aspect in anv_layout_to_aux_usageJason Ekstrand2017-10-063-18/+15
* anv/cmd_buffer: Make get_fast_clear_state return an addressJason Ekstrand2017-10-061-22/+24
* anv/blorp: Add a concept of default aux usageJason Ekstrand2017-10-061-11/+16
* anv: add nir lowering pass for ycbcr texturesLionel Landwerlin2017-10-066-2/+496
* anv: prepare sampler emission code for multiplanar imagesLionel Landwerlin2017-10-063-41/+43
* anv/apply_pipeline_layout: Prepare for multi-planar imagesLionel Landwerlin2017-10-064-22/+116
* anv: add new formats KHR_sampler_ycbcr_conversionLionel Landwerlin2017-10-063-6/+189
* anv: modify the internal concept of format to express multiple planesLionel Landwerlin2017-10-064-256/+331
* anv: prepare formats to handle disjoints setsLionel Landwerlin2017-10-061-10/+27
* isl: fill out layout descriptions for yuv formatsLionel Landwerlin2017-10-061-4/+4
* isl: check whether a format is rgb if colorspace is yuvLionel Landwerlin2017-10-061-0/+2
* isl: make format layout channels accessible by indexLionel Landwerlin2017-10-061-9/+12
* vulkan: util: add macros to extract extension/offset number from enumsLionel Landwerlin2017-10-061-0/+6
* radv: convert all COMPUTE operations to the RADV_META_SAVE_XXX flagsSamuel Pitoiset2017-10-067-107/+62
* radv: add RADV_META_SAVE_COMPUTE_PIPELINE flagSamuel Pitoiset2017-10-062-2/+23
* radv: add radv_meta_save() helperSamuel Pitoiset2017-10-069-73/+58
* radv: merge radv_meta_{save,restore}_pass() with RADV_META_SAVE_PASSSamuel Pitoiset2017-10-064-39/+22
* radv: convert all GFX operations to the RADV_META_SAVE_XXX flagsSamuel Pitoiset2017-10-067-13/+46
* radv: introduce the concept of meta save flagsSamuel Pitoiset2017-10-069-52/+85
* radv: remove unused RADV_META_VERTEX_BINDING_COUNTSamuel Pitoiset2017-10-061-2/+0
* radv: select the pipeline outside of the loop when decompressing htileSamuel Pitoiset2017-10-061-12/+12
* radv: add radv_htile_enabled() helperSamuel Pitoiset2017-10-062-3/+8
* i965: pass wanted format to intel_miptree_create_for_dri_imageTapani Pälli2017-10-065-40/+7
* radeonsi: add a drirc workaround for HTILE corruption in ARK: Survival EvolvedMarek Olšák2017-10-066-0/+32
* radeonsi: inline struct si_sampler_viewsMarek Olšák2017-10-065-42/+37
* radeonsi: rename si_textures_info -> si_samplers, si_images_info -> si_imagesMarek Olšák2017-10-063-20/+20
* radeonsi: fold needs_*_decompress_mask update into si_set_sampler_viewMarek Olšák2017-10-061-54/+46
* radeonsi: simplify a loop in si_update_fb_dirtiness_after_renderingMarek Olšák2017-10-061-15/+11
* ac: properly document a buffer.store LLVM workaroundMarek Olšák2017-10-062-6/+9
* radeonsi: use f32_0 and f32_1Marek Olšák2017-10-064-26/+26
* radeonsi: fold *gallivmMarek Olšák2017-10-062-52/+31
* radeonsi: lp_type::length is always 1Marek Olšák2017-10-061-2/+2
* radeonsi: don't use bld.elem_typeMarek Olšák2017-10-061-4/+4
* radeonsi: don't use lp_build_const_*Marek Olšák2017-10-062-9/+5
* radeonsi: use ctx->ac.context and ctx->typesMarek Olšák2017-10-064-46/+34
* radeonsi: use ctx->ac.builderMarek Olšák2017-10-064-422/+342
* radeonsi: use ctx->i/f32 types moreMarek Olšák2017-10-061-6/+6
* radeonsi: use i32_0 and i32_1 moreMarek Olšák2017-10-062-11/+13
* radeonsi: use bitcast in a few placesMarek Olšák2017-10-061-5/+2
* radeonsi: use ac helpers for bitcastsMarek Olšák2017-10-064-128/+87
* glsl_to_tgsi: skip UARL for 1D registers if the driver doesn't need itMarek Olšák2017-10-062-9/+44
* glsl_to_tgsi: handle reladdr as TEMP in rename_temp_registers and dead_codeMarek Olšák2017-10-061-16/+44
* glsl_to_tgsi: each reladdr object should have only one parentMarek Olšák2017-10-062-5/+65
* glsl_to_tgsi: fix instruction order for bindless texturesMarek Olšák2017-10-061-4/+14
* glsl_to_tgsi: enable copy propagation for tessellation shadersMarek Olšák2017-10-061-4/+3
* radeonsi: implement PIPE_CAP_TGSI_ANY_REG_AS_ADDRESSMarek Olšák2017-10-062-5/+20
* radeonsi: use si_get_indirect_index for TEMP indexingMarek Olšák2017-10-061-18/+4
* radeonsi: use si_get_indirect_index for CONST indexingMarek Olšák2017-10-063-14/+14
* tgsi/ureg: allow any register file in address operandsMarek Olšák2017-10-061-6/+0
* gallium: add PIPE_CAP_TGSI_ANY_REG_AS_ADDRESSMarek Olšák2017-10-0617-0/+18