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* i965/gen6 depth surface: calculate more specific surface typeJordan Justen2014-08-152-0/+50
| | | | | | | | | | | | | (171e633 for gen6) This will be used in 3DSTATE_DEPTH_BUFFER in a later patch. Note: Cube maps are treated as 2D arrays with 6 times as many array elements as the cube map array would have. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/gen6_depth_state.c: Remove (gen != 6) code pathsJordan Justen2014-08-151-31/+14
| | | | | | | | | Since this code was branched from brw_misc_state.c, it had support for gen != 6. We can now remove this. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Split gen6 depth hiz state out from brwJordan Justen2014-08-154-1/+188
| | | | | | | | | | | | We will program the gen6 hiz depth state differently to enable layered rendering on gen6. v2: * Remove unneeded gen6_emit_depthbuffer as suggested by Topi Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/gen6: Adjust render height in errata case for MSAAJordan Justen2014-08-151-1/+17
| | | | | | | | | | | | | | | | | | | In the gen6 PRM Volume 1 Part 1: Graphics Core, Section 7.18.3.7.1 (Surface Arrays For all surfaces other than separate stencil buffer): "[DevSNB] Errata: Sampler MSAA Qpitch will be 4 greater than the value calculated in the equation above , for every other odd Surface Height starting from 1 i.e. 1,5,9,13" Since this Qpitch errata only impacts the sampler, we have to adjust the input for the rendering surface to achieve the same qpitch. For the affected heights, we increment the height by 1 for the rendering surface. Signed-off-by: Jordan Justen <[email protected]> Acked-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/gen6: Add support for layered renderbuffersJordan Justen2014-08-152-40/+43
| | | | | | | | | | | | | | | | | | | | | | Rather than pointing the surface_state directly at a single sub-image of the texture for rendering, we now point the surface_state at the top level of the texture, and configure the surface_state as needed based on this. v2: * Use SET_FIELD as suggested by Topi * Simplify min_array_element assignment as suggested by Topi v3: * Use irb->layer_count for depth instead of rb->Depth * Make gl_target const * depth - 1, not depth v4: * Merge in dd43900b & b875f39e fixes to prevent 3D texture piglit regressions Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/gen6_surface_state.c: Remove (gen < 6) code pathJordan Justen2014-08-151-22/+0
| | | | | | | | Since this code was branched from brw_wm_surface_state.c, it had support for gen < 6. We can now remove this. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Split gen6 renderbuffer surface state from gen5 and olderJordan Justen2014-08-154-0/+159
| | | | | | | | | We will program the gen6 renderbuffer surface state differently to enable layered rendering on gen6. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* meta: Use instanced rendering for layered clears.Kenneth Graunke2014-08-151-16/+5
| | | | | | | | | Layered rendering is part of OpenGL 3.2; GL_ARB_draw_instanced is part of OpenGL 3.1. As such, all drivers supporting layered rendering already support gl_InstanceID. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* mesa: Expose vbo_exec_DrawArraysInstanced as _mesa_DrawArraysInstanced.Kenneth Graunke2014-08-152-0/+10
| | | | | | | So we can use it in meta.c. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* Revert "hud: don't overrun malloced arrays"Dave Airlie2014-08-161-1/+0
| | | | | | | | | This reverts commit 1cfcd0164e1be7d7b05b693f60a262ad735b7565. This seems to cause r600g lockups, https://bugs.freedesktop.org/show_bug.cgi?id=82628 Signed-off-by: Dave Airlie <[email protected]>
* i965: Guard access to gl_Layer by extension #ifdefKristian Høgsberg2014-08-151-0/+2
| | | | | | | | | | | Only assign gl_Layer if we have GL_AMD_vertex_shader_layer. Gen6 doesn't (currently) have that extension, but it also doesn't support layered rendering. Signed-off-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Tested-by: Jordan Justen <[email protected]>
* gallium/vc4: PIPE_CAP_VIDEO_MEMORY return the amount of system ramEmil Velikov2014-08-151-3/+9
| | | | | | Suggested-by: Eric Anholt <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* vc4: Add support for blending.Eric Anholt2014-08-155-12/+199
| | | | | | | | Passes blendminmax and blendsquare. glean's more serious blendFunc fails in simulation due to binner memory overflow (I really need to work around that), and fbo-blending-formats fails due to Mesa refusing one of the getter requests, even before it could fail due to the driver not actually supporting different formats yet.
* vc4: Drop incorrect attempt to incorrectly invert the primconvert hw_mask.Eric Anholt2014-08-151-1/+1
| | | | | | | | The hw_mask is the set of primitives you actually support, so this attempt to provide the set of formats that's unsupported was wrong in two ways (it was intended to be '~' not '!'). However, we only call this code when prim isn't one of the actually supported hw_mask bits, so missing out on the memcpy didn't matter anyway.
* vc4: Use cl_f() instead of cl_u32(fui())Eric Anholt2014-08-151-6/+6
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* vc4: Consistently use qir_uniform_f().Eric Anholt2014-08-151-7/+6
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* vc4: Consume the implicit varyings for points and lines.Eric Anholt2014-08-153-12/+33
| | | | | | | | | | We were triggering simulator assertion failures for not consuming these, and presumably we want to actually make use of them some day (for things like point/line antialiasing) Note that this has the qreg index as 0, which is the same index as the first GL varyings read. This doesn't matter currently, since that number isn't used for anything except dumping.
* vc4: Move the deref of the color buffer for simulator into the simulator.Eric Anholt2014-08-153-8/+4
| | | | | | | At some point I'm going to want to move the information necessary for the host buffer upload/download into the BO so that it's independent of the current vc4->framebuffer, but for now this fixes pointless derefs on non-simulator in vc4_context.c since the dump_fbo() removal
* i965: Implement fast color clears using meta operationsKristian Høgsberg2014-08-1510-642/+744
| | | | | | | | | | | | | | | This patch uses the infrastructure put in place by previous patches to implement fast color clears and replicated color clears in terms of meta operations. This works all the way back to gen7 where fast clear was introduced and adds support for fast clear on gen8. It replaces the blorp path completely and improves on a few cases. Layered clears are now done using instanced rendering and multiple render-target clears use a MRT shader with rep16 writes. Signed-off-by: Kristian Høgsberg <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* i965: Add optimization pass to let us use the replicate data messageKristian Høgsberg2014-08-155-1/+106
| | | | | | | | | | | | | | | | The data port has a SIMD16 'replicate data' message, which lets us write the same color for all 16 pixels by sending the four floats in the lower half of a register instead of sending 4 times 16 identical component values in 8 registers. The message comes with a lot of restrictions and could be made generally useful by recognizing when those restriction are satisfied. For now, this lets us enable the optimization when we know it's safe, but we don't enable it by default. The optimization works for simple color clear shaders only, but does recognized and support multiple render targets. Signed-off-by: Kristian Høgsberg <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* meta: Export _mesa_meta_drawbuffers_from_bitfield()Kristian Høgsberg2014-08-152-3/+6
| | | | | | | We'll use this in the i965 fast clear implementation. Signed-off-by: Kristian Høgsberg <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* mesa: Use _mesa_lock_context_textures in _mesa_GetTexParameterfv()Kristian Høgsberg2014-08-151-3/+3
| | | | | | | | | | | | | | | | | | | GetTexParamterfv() doesnt change texture state, so instead of _mesa_lock_texture() we can use _mesa_lock_context_textures(), which doesn't increase the texture stamp. With this change, _mesa_update_state_locked() is now only called from under _mesa_lock_context_textures(), which is right thing to do. Right now it's the same mutex, but if we made texture locking more fine grained locking one day, just locking one texture here would be wrong. This all ignores the fact that texture locking seem a bit flaky and broken, but we're trying to not blatantly make it worse. This change allows us to reliably unlock the context textures in the dd::UpdateState callback as is necessary for meta color resolves. Signed-off-by: Kristian Høgsberg <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* i965: Move pre-draw resolve buffers to dd::UpdateStateKristian Høgsberg2014-08-152-40/+25
| | | | | | | | | | | No functional change except for glBegin/glEnd style rendering, where we now do the resolves at glBegin time instead of FLUSH_VERTICES time. This is also the reason for this change, so that when we later switch fast clear resolve to use meta, we won't be doing meta operations in the middle of a begin/end sequence. Signed-off-by: Kristian Høgsberg <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* i965: Provide a context flag to let us enable fast clearKristian Høgsberg2014-08-153-0/+5
| | | | | | | | | GEN7+ has the fast clear functionality, which lets us clear the color buffers using the MCS and a scaled down rectangle. To enable this we have to set the appropriate bits in the 3DSTATE_PS package. Signed-off-by: Kristian Høgsberg <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* i965: Disable clipping when rendering 3DPRIM_RECTLIST primitivesKristian Høgsberg2014-08-151-1/+7
| | | | | | | | The clipper doesn't support clipping 3DPRIM_RECTLIST primitives and must be turned off when we use them. Signed-off-by: Kristian Høgsberg <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* i965: Add a mechanism for sending native primitives into the driverKristian Høgsberg2014-08-154-5/+22
| | | | | | | | | | | The brw_draw_prims() function is the draw entry point into the driver, and takes struct _mesa_prim for input. We want to be able to feed native primitives into the driver, and to that end we introduce BRW_PRIM_OFFSET, which lets use describe geometry using the native GEN primitive types. Signed-off-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add context flag to disable the viewport transformKristian Høgsberg2014-08-155-5/+13
| | | | | | | | This lets us disable the viewport transform, which will be useful for emitting 3DPRIM_RECTLIST. Signed-off-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add an option to not generate the SIMD8 fragment shaderKristian Høgsberg2014-08-156-5/+19
| | | | | | | | | For now, this can only be triggered with a new 'no8' INTEL_DEBUG option and a new context flag. We'll use the context flag later, but introducing it now lets us bisect to this commit if it breaks something. Signed-off-by: Kristian Høgsberg <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* st/dri: Add __DRI2rendererQueryExtension supportEmil Velikov2014-08-155-0/+88
| | | | | | | | | | | The final step to get GLX_MESA_query_renderer working with gallium drivers. v2: Remove __DRI2_RENDERER_PREFERRED_PROFILE handling. It's already handled in dri/common. Spotted by Marek. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/softpipe/llvmpipe: handle query_renderer capsEmil Velikov2014-08-152-0/+38
| | | | | | | | | | Both report 0xffffffff as both vendor and device id, and the maximum amount of system memory as video memory. v2: Use aux helper os_get_total_physical_memory(). Cc: Brian Paul <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* gallium/svga: handle query_rendered capsEmil Velikov2014-08-151-0/+12
| | | | | | | | | | | | All the values are are currently hardcoded. One could use some heuristics to determine the amount of video memory if a callback to the host is not available. Do we what to advertise the driver as hardwar accelerated ? Cc: Brian Paul <[email protected]> Cc: José Fonseca <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* gallium/nouveau: handle query_renderer capsEmil Velikov2014-08-153-9/+61
| | | | Signed-off-by: Emil Velikov <[email protected]>
* gallium/vc4: handle query_renderer capsEmil Velikov2014-08-151-0/+12
| | | | | Cc: Eric Anholt <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* gallium/r300/r600/radeonsi: handle query_renderer capsEmil Velikov2014-08-153-0/+33
| | | | | Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/ilo: handle query_renderer capsEmil Velikov2014-08-154-1/+38
| | | | | | | | | | | Implementation based on the classic driver with the following changes: - Use auxiliarry function os_get_total_physical_memory to get the total amount of memory. - Move the libdrm_intel specific get_aperture_size to the winsys. Cc: Chia-I Wu <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* gallium/i915: handle query_renderer capsEmil Velikov2014-08-153-0/+40
| | | | | | | | | | | Implementation based on the classic driver with the following changes: - Use auxiliarry function os_get_total_physical_memory to get the total amount of memory. - Move the libdrm_intel specific get_aperture_size to the winsys. Cc: Stephane Marchesin <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* gallium/freedreno: handle query_renderer capsEmil Velikov2014-08-151-0/+12
| | | | | | | | | | Provide the real vendor and and hardcode the device id as 0xffffffff as the devices currently using freedreno are non-pci. The device features UMA. Cc: Rob Clark <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Rob Clark <[email protected]>
* auxiliary/os: introduce os_get_total_physical_memory helper functionEmil Velikov2014-08-152-0/+71
| | | | | Cc: Alexander von Gluck IV <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* gallium: add GLX_MESA_query_renderer capsEmil Velikov2014-08-152-0/+13
| | | | | | | | Namely vendor/device id, accelerated and UMA, which will be used to describe the underlying renderer. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* dri/swrast: add GLX_MESA_query_renderer supportEmil Velikov2014-08-151-2/+71
| | | | | | | | | v2: - Drop __DRI2_RENDERER_PREFERRED_PROFILE case. - Cleanup return statements. Cc: Brian Paul <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* dri/radeon: add GLX_MESA_query_renderer supportEmil Velikov2014-08-154-21/+103
| | | | | | | | | | - Create radeon{Vendor,GetRenderer}String helpers. - Drop __DRI2_RENDERER_PREFERRED_PROFILE case. - Cleanup return statements. To be used by the upcomming GLX_MESA_query_renderer implementation. Signed-off-by: Emil Velikov <[email protected]>
* dri/radeon: don't print TCL status on glGetString(GL_RENDERER)Emil Velikov2014-08-151-7/+2
| | | | | | | | | | Printing the TCL involves that context is available at the time of query. The GLX_MESA_query_renderer states that glGetString(GL_RENDERER) and glXQueryRendererStringMESA(GLX_RENDERER_DEVICE_ID_MESA) will have the same format, thus removing the context dependenicy will help us achieve that. Signed-off-by: Emil Velikov <[email protected]>
* dri/nouveau: add GLX_MESA_query_renderer supportEmil Velikov2014-08-153-19/+92
| | | | | | | | - Create nouveau_{vendor,get_renderer}_string helpers. - Set correct max_gl*version. - Query the device PCIID via libdrm_nouveau/nouveau_getparam. Signed-off-by: Emil Velikov <[email protected]>
* dri/common: Move __DRI2_RENDERER_PREFFERED_PROFILE handling to ↵Emil Velikov2014-08-153-7/+4
| | | | | | | | | | | | driQueryRendererIntegerCommon Essentially all drivers would like to use to opengl core profile if available, so avoid duplication by moving the code to a common fallback within driQueryRendererIntegerCommon. If a driver uses different approach they can handle it separately. Signed-off-by: Emil Velikov <[email protected]>
* glx/drisw: add support for DRI2rendererQueryExtensionEmil Velikov2014-08-153-2/+58
| | | | | | | | | | The extension is used by GLX_MESA_query_renderer, which can be provided for by hardware and software drivers. v2: Use designated initializers. v3: Move drisw_query_renderer_*() to dri2_query_renderer.c Signed-off-by: Emil Velikov <[email protected]>
* glx/dri2: use mapping table for dri2_convert_glx_query_renderer_attribs()Emil Velikov2014-08-151-26/+28
| | | | Signed-off-by: Emil Velikov <[email protected]>
* glx/drisw: Move private structure declarations to a header fileEmil Velikov2014-08-152-40/+65
| | | | | | v2: Reff the correct file wrt copyright, spotted by Chia-I Signed-off-by: Emil Velikov <[email protected]>
* mesa: check if GL_ARB_copy_image is enabled in _mesa_CopyImageSubData()Brian Paul2014-08-151-1/+7
| | | | | | | | | | Generate a GL error and return rather than crashing on a null ctx->Driver.CopyImageSubData pointer (gallium). This allows apitraces with glCopyImageSubData() calls to continue rather than crash. Plus, fix a comment typo. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/blorp_clear: Use memcpy instead of assignment to copy clear valueNeil Roberts2014-08-151-7/+2
| | | | | | | | | | | | | | Similar to the problem described in 2c50212b14da27de4e3, if we copy the clear value through a regular assignment via a floating point value, then if an integer clear value is being used that happens to contain a signalling NaN value then it would get converted to a quiet NaN when stored via the x87 floating-point registers. This would corrupt the integer value. Instead we should use a memcpy to ensure the exact bit representation is preserved. This bug can be triggered on 32-bit builds with optimisations by using an integer clear color with a value like 0x7f817f81. Reviewed-by: Matt Turner <[email protected]>
* r600g: Implement ARB_derivative_controlGlenn Kennard2014-08-152-10/+12
| | | | | | | | | Requires Evergreen/Cayman marek: update release notes Signed-off-by: Glenn Kennard <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
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