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* i965: Warn about preliminary support for Gen11Matt Turner2018-02-281-0/+7
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* intel: Add a preliminary device for Ice LakeAnuj Phogat2018-02-281-1/+56
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Anuj Phogat <[email protected]>
* anv: remove anv_gem_set_context_priority helperTapani Pälli2018-02-283-12/+3
| | | | | | | | anv_gem_set_context_param is to be used directly instead! Fixes: 6d8ab53303 "anv: implement VK_EXT_global_priority extension" Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* swr/rast: revert clip distance precisionGeorge Kyriazis2018-02-282-4/+17
| | | | | | Fixes piglit tests that broke with 8a64593bde Reviewed-By: Bruce Cherniak <[email protected]>
* swr/rast: Faster frustum prim cullingGeorge Kyriazis2018-02-281-3/+7
| | | | | | | | | Fix clipper validMask setting. We don't need to run frustum rejected primitives through the clipper. Perform frustum culling with only frustum clip codes. Guardband clip codes cannot be used because they overlap frustum codes. Reviewed-By: Bruce Cherniak <[email protected]>
* swr/rast: Consolidate TRANSLATE_ADDRESSGeorge Kyriazis2018-02-284-6/+28
| | | | | | | | Translate is now part of an overloaded LOAD call which required a change to the code gen to skip the load functions in order to handle them manually to make them virtual. Reviewed-By: Bruce Cherniak <[email protected]>
* swr/rast: Code generation cleanupGeorge Kyriazis2018-02-281-15/+21
| | | | | | Generate more compact code from gen_llvm.hpp. Reviewed-By: Bruce Cherniak <[email protected]>
* swr/rast: Remove draw type from event definitionsGeorge Kyriazis2018-02-283-12/+8
| | | | | | | | | | | - Have the draw type sent to DrawInfoEvent in handlers created in archrast.cpp. The draw type no longer needs to be sent during during AR_API_EVENT() call in api.cpp. - Remove draw type from event defintions in events_private.proto, no longer needed Reviewed-By: Bruce Cherniak <[email protected]>
* swr/rast: whitespace changeGeorge Kyriazis2018-02-281-1/+1
| | | | Reviewed-By: Bruce Cherniak <[email protected]>
* swr/rast: Fix index buffer overfetch issue for non-indexed drawsGeorge Kyriazis2018-02-281-0/+15
| | | | | | | | Populate pLastIndex, even for the non-indexed case. An zero pLastIndex can cause the index offsets inside the fetcher to have non-sensical values that can be either very large positive or very large negative numbers. Reviewed-By: Bruce Cherniak <[email protected]>
* softpipe: don't iterate through PIPE_MAX_SHADER_SAMPLER_VIEWSRoland Scheidegger2018-02-281-2/+2
| | | | | | | | We were setting view to NULL if the iteration was larger than i. But in fact if the view is NULL the code did nothing anyway... Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* cso: don't cycle through PIPE_MAX_SHADER_SAMPLER_VIEWS on context destroyRoland Scheidegger2018-02-281-1/+3
| | | | | | | There's no point, we know the highest non-null one. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* draw: don't needlessly iterate through all sampler view slotsRoland Scheidegger2018-02-281-1/+1
| | | | | | | We already stored the highest (potentially) used number. Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* anv: implement VK_EXT_global_priority extensionTapani Pälli2018-02-285-0/+95
| | | | | | | | | | | | | | | | v2: add ANV_CONTEXT_REALTIME_PRIORITY (Chris) use unreachable with unknown priority (Samuel) v3: add stubs in gem_stubs.c (Emil) use priority defines from gen_defines.h v4: cleanup, add anv_gem_set_context_param (Jason) Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> (v2) Reviewed-by: Chris Wilson <[email protected]> (v2) Reviewed-by: Emil Velikov <[email protected]> (v3) Reviewed-by: Jason Ekstrand <[email protected]>
* i965: use context priority definitions from gen_defines.hTapani Pälli2018-02-283-10/+10
| | | | | | Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* intel: add new common header gen_defines.hTapani Pälli2018-02-282-0/+55
| | | | | | Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* winsys/amdgpu: request high addressesChristian König2018-02-281-4/+12
| | | | | | | | | We now have hopefully fixed all bugs regarding high addresses on Vega10 and Raven. Start to use the high range to make room for SVM in the low range. Signed-off-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac/shader: move scanning some info about input PS declarationsSamuel Pitoiset2018-02-285-15/+26
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* glsl/linker: fix bug when checking precision qualifierSamuel Iglesias Gonsálvez2018-02-281-8/+3
| | | | | | | | | | | | | | | According to GLSL ES 3.2 spec, see table in 9.2.1 "Linked Shaders" section, the precision qualifier should match for uniform variables. This also applies to previous GLSL ES 3.x specs. This 'if' checks the condition for uniform variables, while for UBOs it is checked in link_interface_blocks.cpp. Fixes: b50b82b8a553 ("glsl/es31: precision qualifier doesn't need to match in shader interface block members") Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* anv: set maxResourceSize to the respective value for each generationSamuel Iglesias Gonsálvez2018-02-281-1/+14
| | | | | | | | v2: - Add the proper values to gen9+ (Jason) Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* r600: partly revert disabling tiling for 1d texture.Dave Airlie2018-02-281-0/+5
| | | | | | | | | | | | Previously we had a check for 1d of narrow 2D textures, however narrow 2d textures caused gpu hangs, but it was correct for 1d textures. This fixes a bunch of 1D image piglits for me. Fixes: 7b8e1c089d (r600/texture: drop lowering 1d/2d images to linear.) Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* nir: fix interger divide by zero crash during constant foldingTimothy Arceri2018-02-281-2/+2
| | | | | | | | | | | | From the GLSL 4.60 spec Section 5.9 (Expressions): "Dividing by zero does not cause an exception but does result in an unspecified value." Fixes: 89285e4d47a6 "nir: add new constant folding infrastructure" Reviewed-by: Jason Ekstrand <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105271
* st/mesa: ensure that images don't try to reference non-existent levelsIlia Mirkin2018-02-271-0/+1
| | | | | | | | | Ideally the st_finalize_texture call would take care of that, but it doesn't seem to with KHR-GL45.shader_image_size.advanced-nonMS-*. This assertion makes sure that no such values are passed to the driver. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac/radv: move load base vertex abi setup to vertex shader.Dave Airlie2018-02-281-1/+1
| | | | | | | | | This was segfaulting: dEQP-VK.memory.pipeline_barrier.host_write_index_buffer.1024 Fixes: 8de6f797070 (ac/radeonsi: add load_base_vertex() to the abi) Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* ac/shader: fix vertex input with components.Dave Airlie2018-02-281-1/+1
| | | | | | | | | | This fixes: dEQP-VK.glsl.440.linkage.varying.component.* Fixes: 1c57a6da5e3 (ac/shader: scan vertex inputs usage mask) Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: remove device pointer from buffer.Dave Airlie2018-02-281-1/+0
| | | | | | | | This is never used. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* nir: add lower_ldexp to nir compiler optionsTimothy Arceri2018-02-286-2/+8
| | | | Reviewed-by: Marek Olšák <[email protected]>
* ac: implement nir_op_ldexpTimothy Arceri2018-02-281-0/+7
| | | | Reviewed-by: Marek Olšák <[email protected]>
* ac: fix nir_op_fdd{x,y} handlingTimothy Arceri2018-02-281-2/+2
| | | | | | | | | | | | | | | radeonsi, i965 and anv all treat fdd{x,y} opcodes the same as fdd{x,y}_coarse by default. The SPIR-V spec lets the implementation decide how it should be handled and radv was previously going for the higher quality option. Here we change the shared amd code to match how nir_op_fdd{x,y} is expected to be handled by the other NIR drivers. Fixes piglit test: ./bin/arb_shader_texture_lod-texgrad -auto Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac/radeonsi: add load_base_vertex() to the abiTimothy Arceri2018-02-283-1/+10
| | | | | | | | | | Fixes the following piglit tests: ./bin/arb_shader_draw_parameters-basevertex basevertex -auto -fbo ./bin/arb_shader_draw_parameters-basevertex basevertex-baseinstance -auto -fbo Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: create get_base_vertex() helperTimothy Arceri2018-02-281-14/+20
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: disable vertex_id_zero_based loweringTimothy Arceri2018-02-281-1/+0
| | | | | | | | | | The lowering is incompatible with how the radeonsi backend works. Fixes piglit test: ./bin/arb_shader_draw_parameters-basevertex vertexid-zerobased -auto Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac: add support for handling nir_intrinsic_load_vertex_idTimothy Arceri2018-02-281-0/+4
| | | | | | | This will be used by radeonsi. Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac: fix f2b and i2b for doublesTimothy Arceri2018-02-281-2/+4
| | | | | | | | Without this llvm was asserting in debug builds. V2: use LLVMConstNull() Reviewed-by: Samuel Pitoiset <[email protected]>
* intel/ir: Fix invalid type aliasing with undefined behavior in test_eu_compact.Francisco Jerez2018-02-271-3/+3
| | | | | | | | | | | | | | | | | test_fuzz_compact_instruction() was attempting to modify the uint64_t data array of a brw_inst through a pointer to uint32_t, which has undefined behavior. This was causing the test_eu_compact unit test to fail mysteriously for me on GCC 7 with some additional harmless-looking changes I had applied to my tree, which happened to affect the order instructions are emitted by GCC causing the bit twiddling to be done after the clear_pad_bits() call which is supposed to overwrite the same data through a pointer of different type, leading to data corruption. A similar failure has been reported by Vinson Lee on the master branch built with GCC 8. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105052 Tested-by: Vinson Lee <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* util/bitset: Make C++ wrapper trivially constructible.Francisco Jerez2018-02-273-20/+20
| | | | | | | | | | | | | | | In order to fix a build failure on compilers not implementing unrestricted unions, which is a C++11 feature. v2: Provide signed integer comparison and assignment operators instead of BITSET_WORD ones to avoid spurious ambiguity warnings on comparisons with a signed integer literal. Fixes: ba79a90fb52e1e81fb "glsl: Switch ast_type_qualifier to a 128-bit bitset." Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105238 Tested-by: Roland Scheidegger <[email protected]> Tested-By: George Kyriazis <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* intel/tools: Use gen_device_name_to_pci_device_id in aubinatorJordan Justen2018-02-271-24/+6
| | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
* intel/common: Add gen_device_name_to_pci_device_idJordan Justen2018-02-272-6/+14
| | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
* intel/vulkan: Support INTEL_DEVID_OVERRIDE environment variableJordan Justen2018-02-271-4/+10
| | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
* i965: Use gen_get_pci_device_id_overrideJordan Justen2018-02-271-52/+5
| | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
* intel/common: Add gen_get_pci_device_id_overrideJordan Justen2018-02-272-0/+52
| | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
* intel/vulkan: Support INTEL_NO_HW environment variableJordan Justen2018-02-273-1/+6
| | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
* android: fix source files path for libmesa_anv_gen11Harish Krupo2018-02-271-1/+1
| | | | | Signed-off-by: Harish Krupo <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* ac/nir: clean up a hack about rounding 2nd coord componentSamuel Pitoiset2018-02-271-3/+5
| | | | | | | | It's basically just the opposite, and it only makes sense to round the layer for 2D texture arrays. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* nvc0: collapse output slots to have adjacent registersIlia Mirkin2018-02-271-2/+12
| | | | | | | | | | The hardware skips over unallocated slots, so we have to make sure those registers are packed together. Fixes KHR-GL45.enhanced_layouts.fragment_data_location_api Signed-off-by: Ilia Mirkin <[email protected]> Tested-by: Karol Herbst <[email protected]>
* radv: expose async compute on SIDave Airlie2018-02-271-2/+0
| | | | | | | | | | | It looks like we had all the pieces in place for this, just never tested it and turned it on. I don't see any CTS regressions and the computeshader demo runs. Acked-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: merge tess rings into a single boDave Airlie2018-02-272-56/+39
| | | | | | | Inspired by a passing commit to radeonsi. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* meson: fix building without GLDylan Baker2018-02-261-9/+10
| | | | | | | | | | | | | | | | libgl will be undefined _glx, so move that check inside the `if with_glx != 'disabled'` block. v2: - Simplify commit message (Eric, Emil) Fixes: 5c460337fd9c109 ("meson: Fix GL and EGL pkg-config files with glvnd") Reported-by: Jason Ekstrand <[email protected]> Signed-off-by: Dylan Baker <[email protected]> CC: Daniel Stone <[email protected]> Acked-by: Jason Ekstrand <[email protected]> Untested-by: Jason Ekstrand <[email protected]> Acked-by: Eric Engestrom <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* intel: aubinator_error_decode: fix segfault on missing registerLionel Landwerlin2018-02-261-1/+2
| | | | | | | | Some register might be missing in our genxmls. Don't try to decode them. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* *-symbol-check: use correct `nm` path when cross-compilingEric Engestrom2018-02-2610-6/+10
| | | | | | Inspired-by: a similar patch for libdrm by Heiko Becker Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
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