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* tgsi: finish declaration parsing for arrays.Dave Airlie2013-08-271-1/+31
* svga: replace 0 with PIPE_OK in a few placesBrian Paul2013-08-263-5/+5
* swrast: init i0, i1 values to silence warningsBrian Paul2013-08-261-0/+1
* mesa: init dst values in COPY_CLEAN_4V_TYPE_AS_FLOAT()Brian Paul2013-08-261-1/+2
* glsl: init limit=0 to silence uninitialized var warningBrian Paul2013-08-261-1/+1
* i965/vs: Allocate register set once at context creation.Kenneth Graunke2013-08-263-4/+6
* i965/vs: Move base_reg_count computation to brw_alloc_reg_set().Kenneth Graunke2013-08-261-3/+4
* i965/vs: Expose the payload registers to the register allocator.Kenneth Graunke2013-08-262-6/+36
* i965/vs: Use a fixed set of register classes.Kenneth Graunke2013-08-261-37/+13
* i965: Allow C++ type safety in the use of enum brw_urb_write_flags.Paul Berry2013-08-267-11/+30
* i965: Remove redundant (and uninitialized) field vec4_generator::ctx.Paul Berry2013-08-262-3/+2
* i965: Don't try to fall back when creating unrecognized program targets.Paul Berry2013-08-261-1/+2
* radeonsi: Also set the depth component mask bit for stencil-only exportsMichel Dänzer2013-08-261-1/+4
* glsl: Add built-in function prototypes for GLSL 3.30Kenneth Graunke2013-08-252-0/+1169
* glsl: Bump standalone compiler versions to 3.30.Kenneth Graunke2013-08-252-3/+3
* mesa: Set query->EverBound in glQueryCounter().Kenneth Graunke2013-08-251-0/+1
* r600g: Implement the new float comparison instructions for Cayman as well.Henri Verbeet2013-08-251-4/+4
* nv30: add forgotten PIPE_CAP_CUBE_MAP_ARRAY cap to listIlia Mirkin2013-08-251-0/+1
* nouveau/video: avoid overwriting base codec init with templateIlia Mirkin2013-08-252-2/+2
* freedreno/a3xx: don't leak so muchRob Clark2013-08-241-0/+11
* freedreno/a3xx/compiler: fix SGT/SLT/etcRob Clark2013-08-241-29/+125
* freedreno/a3xx/compiler: bit of re-arrange/cleanupRob Clark2013-08-241-61/+71
* freedreno/a3xx/compiler: make compiler errors more usefulRob Clark2013-08-242-17/+33
* freedreno: fix segfault when no color buffer boundRob Clark2013-08-247-18/+40
* freedreno/a3xx/compiler: cat4 cannot use const reg as srcRob Clark2013-08-241-10/+27
* freedreno/a3xx/compiler: use max_reg rather than file_countRob Clark2013-08-241-7/+7
* freedreno/a3xx/compiler: handle saturate on dstRob Clark2013-08-241-0/+49
* freedreno/a3xx/compiler: fix CMPRob Clark2013-08-241-2/+2
* freedreno/a3xx: some texture fixesRob Clark2013-08-241-1/+24
* freedreno: update register headersRob Clark2013-08-248-111/+758
* freedreno: add debug option to disable scissor optimizationRob Clark2013-08-243-14/+22
* freedreno/a3xx: fix viewport on gmem->mem resolveRob Clark2013-08-241-0/+8
* freedreno/a3xx: fix color inversion on mem->gmem restoreRob Clark2013-08-241-3/+3
* radeonsi: Handle additional PIPE_COMPUTE_CAP_*Niels Ole Salscheider2013-08-231-1/+14
* radeonsi: copy r600_get_timestampNiels Ole Salscheider2013-08-231-0/+9
* radeonsi: Implement PIPE_QUERY_TIMESTAMPNiels Ole Salscheider2013-08-234-2/+46
* gallivm: fix min/mag switchover point for nearest/none mip filterRoland Scheidegger2013-08-235-66/+81
* gallium/osmesa: Link, not copy, the shared library to the LIB_DIR.Jon Severinsson2013-08-231-1/+1
* gallium/osmesa: Always link with the c++ linker.Jon Severinsson2013-08-231-9/+2
* gallium/osmesa: Make and install an osmesa.pc.Jon Severinsson2013-08-232-3/+14
* i965/gs: Add a data structure for tracking VS output VUE map.Paul Berry2013-08-232-1/+16
* i965/vec4: Make a function for setting up vec4 program key clip info.Paul Berry2013-08-232-6/+24
* i965: Make prim_to_hw_prim accessible outside brw_draw.c.Paul Berry2013-08-232-1/+3
* i965/gs: add GS visitors.Paul Berry2013-08-233-0/+351
* i965/gs: Add GS_OPCODE_SET_DWORD_2_IMMED.Paul Berry2013-08-234-0/+28
* i965/gs: Add GS_OPCODE_SET_VERTEX_COUNT.Paul Berry2013-08-234-0/+45
* i965/gs: Add GS_OPCODE_SET_WRITE_OFFSET.Paul Berry2013-08-234-0/+57
* i965/gs: Add GS_OPCODE_THREAD_END.Paul Berry2013-08-235-0/+32
* i965/gs: Add GS_OPCODE_URB_WRITE.Paul Berry2013-08-235-4/+38
* i965/gs: Add a flag allowing URB write messages to use a per-slot offset.Paul Berry2013-08-232-2/+8