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* i965: Move intel_context::max_gtt_map_object_size to brw_context.Kenneth Graunke2013-07-094-5/+5
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::perf_debug to brw_context.Kenneth Graunke2013-07-0923-39/+20
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::no_batch_wrap to brw_context.Kenneth Graunke2013-07-094-6/+4
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context's framerate throttling fields to brw_context.Kenneth Graunke2013-07-095-15/+17
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::stats_wm to brw_context.Kenneth Graunke2013-07-096-8/+7
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::batch to brw_context.Kenneth Graunke2013-07-0933-206/+170
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::hw_ctx to brw_context.Kenneth Graunke2013-07-097-13/+11
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::bufmgr to brw_context.Kenneth Graunke2013-07-0914-38/+29
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context's driconf flags to brw_context.Kenneth Graunke2013-07-095-18/+21
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::reduced_primitive to brw_context.Kenneth Graunke2013-07-096-8/+8
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move front buffer rendering fields from intel_context to brw.Kenneth Graunke2013-07-098-53/+52
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::vtbl to brw_context.Kenneth Graunke2013-07-099-85/+79
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::optionCache to brw_context.Kenneth Graunke2013-07-095-17/+17
| | | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Pass brw_context to functions rather than intel_context.Kenneth Graunke2013-07-0977-777/+782
| | | | | | | | | | | | | | This makes brw_context available in every function that used intel_context. This makes it possible to start migrating fields from intel_context to brw_context. Surprisingly, this actually removes some code, as functions that use OUT_BATCH don't need to declare "intel"; they just use "brw." Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Remove pointless intel_context parameter from try_copy_propagate.Kenneth Graunke2013-07-092-5/+3
| | | | | | | | | It's already part of the visitor class. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Add forward declarations of brw_context to a few places.Kenneth Graunke2013-07-092-0/+2
| | | | | | | | | | | These files have forward declarations for intel_context. This makes brw_context available in the same places without further #include monkeying. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Replace #include "intel_context.h" with brw_context.h.Kenneth Graunke2013-07-0929-29/+23
| | | | | | | | | | | brw_context.h includes intel_context.h, but additionally makes the brw_context structure available. Switching this allows us to start using brw_context in more places. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move ctx->Const setup from intelInitContext to the new helper.Kenneth Graunke2013-07-092-25/+21
| | | | | | | | | | This also requires moving _mesa_init_point() to after the ctx->Const initialization. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Split code to set ctx->Const values into a helper function.Kenneth Graunke2013-07-091-110/+120
| | | | | | | | | | | brwCreateContext() has a lot of random things to do. Factoring out the part that initializes ctx->Const values and shader compiler options makes the main function a bit easier to read. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i915: Remove i965+ chip names.Kenneth Graunke2013-07-091-1/+0
| | | | | | | | | i965+ chipsets shouldn't ever hit this driver. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Remove i915 chip names.Kenneth Graunke2013-07-091-1/+0
| | | | | | | | | i915 chipsets shouldn't ever hit this driver. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Replace intel_context:needs_ff_sync with intel->gen == 5.Kenneth Graunke2013-07-096-14/+8
| | | | | | | | | | | | | Technically, needs_ff_sync was set on Gen5+, but it was only consulted in the clipper threads and quad/lineloop decomposition code, which are both Gen4-5 only. So in reality it only identified Ironlake. The named flag doesn't really clarify things, and seems like overkill. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Add missing newline to blorp color clear perf_debug message.Kenneth Graunke2013-07-091-1/+1
| | | | | | | perf_debug() doesn't add a newline for you; without this, all the INTEL_DEBUG=perf output was jumbled together. Signed-off-by: Kenneth Graunke <[email protected]>
* glsl: Silence unused variable warning in the release buildEmil Velikov2013-07-081-0/+2
| | | | | | | | | | | | Resolves the following gcc warning opt_flip_matrices.cpp:84:32: warning: unused variable 'deref' v2: keep the variable, but wrap it in a ifndef NDEBUG block (suggested by Ian) Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl/ast: Silence uninitialized variable warnings in the release buildEmil Velikov2013-07-081-0/+2
| | | | | | | | | | | | Resolves the following gcc warnings warning: 'iface_type_name' may be used uninitialized in this function warning: 'var_mode' may be used uninitialized in this function Note: The variables are initialised to UNKNOWN and ir_var_auto Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Add an assertion to brwProgramStringNotify.Paul Berry2013-07-081-2/+16
| | | | | | | | | | | | driver->ProgramStringNotify is only called for ARB programs, fixed function vertex programs, and ir_to_mesa (which isn't used by the i965 back-end). Therefore, even after geometry shaders are added, brwProgramStringNotify should only ever be called with a target of GL_VERTEX_PROGRAM_ARB or GL_FRAGMENT_PROGRAM_ARB. This patch adds an assertion to clarify that. Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: Allow non-constant expression initializers of const-qualified vars.Matt Turner2013-07-081-11/+19
| | | | | | Required by ARB_shading_language_420pack. Reviewed-by: Kenneth Graunke <[email protected]>
* r600g: improve the mechanism for recognizing an empty CSMarek Olšák2013-07-083-3/+8
| | | | Reviewed-by: Alex Deucher <[email protected]>
* r600g: explicitly flush caches for streamout-based buffer copying & clearingMarek Olšák2013-07-081-0/+13
| | | | | | | It's done automatically for vertex buffers, but not for constant buffers, textures, and colorbuffers. Reviewed-by: Alex Deucher <[email protected]>
* r600g: only flush the caches that need to be flushed during CP DMA operationsMarek Olšák2013-07-083-32/+117
| | | | | | | This should increase performance if constant uploads are done with the CP DMA, because only the cache that needs to be flushed is flushed. Reviewed-by: Alex Deucher <[email protected]>
* r600g: split INVAL_READ_CACHES into vertex, tex, and const cache flagsMarek Olšák2013-07-085-27/+52
| | | | | | | also flushing any cache in evergreen_emit_cs_shader seems to be superfluous (we don't flush caches when changing the other shaders either) Reviewed-by: Alex Deucher <[email protected]>
* r600g: adjust flush flags (v3)Alex Deucher2013-07-086-7/+42
| | | | | | | | | | | | | 1. flush SH with read caches 2. add flag for DB flushes 3. add flag for CB flushes v2: flush all CBs, remove redundant emit_state variable. v3: Marek: also set the new flags in r600_context_flush, the CP dma functions, and texture_barrier, and rename them Signed-off-by: Marek Olšák <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: don't call buffer_wait in buffer_mmap_sync_with_ringsMarek Olšák2013-07-081-2/+1
| | | | | | | | The winsys should do this, because it measures how much time we spend in buffer_map doing synchronization, which can be viewed with the gallium HUD. Reviewed-by: Alex Deucher <[email protected]>
* r600g: don't read back the MSAA depth buffer if the read flag is not setMarek Olšák2013-07-081-8/+8
| | | | Reviewed-by: Alex Deucher <[email protected]>
* r600g: don't flush the context in texture_transfer_mapMarek Olšák2013-07-081-5/+0
| | | | | | the winsys does this automatically Reviewed-by: Alex Deucher <[email protected]>
* r600g: fix texture offset computation for mapped MSAA depth buffersMarek Olšák2013-07-082-16/+14
| | | | | | | | | It was wrong, because the offset shouldn't be applied to MSAA depth buffers. This small cleanup should prevent such issues in the future. This fixes a lockup in "piglit/fbo-depthstencil default_fb -samples=n". Reviewed-by: Alex Deucher <[email protected]>
* r600g: fix color resolve for RGBX8 and RGBX16 integer formatsMarek Olšák2013-07-081-2/+2
| | | | Reviewed-by: Alex Deucher <[email protected]>
* r600g: enable fast MSAA color clear for array/3D/cube texturesMarek Olšák2013-07-081-4/+3
| | | | Reviewed-by: Alex Deucher <[email protected]>
* r600g: implement fast MSAA color clear for integer texturesMarek Olšák2013-07-081-9/+12
| | | | | | | this also fixes the fast clear with multiple colorbuffers and each having a different format Reviewed-by: Alex Deucher <[email protected]>
* r600/uvd: fix check for UVD 2.xChristian König2013-07-081-1/+1
| | | | Signed-off-by: Christian König <[email protected]>
* i965: fix alpha test for MRTChris Forbes2013-07-064-10/+9
| | | | | | | | | | | | | | | | | Include src0 alpha in the RT write message when using MRT, so it is used for the alpha test instead of the normal per-RT alpha value. Fixes broken rendering in Dota2 under Wine [FDO #62647]. No Piglit regressions on Ivybridge. V2: reuse (and simplify) existing sample_alpha_to_coverage flag in the FS key, rather than adding another redundant one. Signed-off-by: Chris Forbes <[email protected]> Reviewd-by: Paul Berry <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=62647 NOTE: This is a candidate for the stable branches.
* gallivm: (trivial) fix using one lod instead of per-quad lod for texel fetchRoland Scheidegger2013-07-051-1/+2
| | | | | | The logic for choosing number of lods was bogus. (The code should ultimately handle the case of only one lod even with multiple quads but currently can't.)
* gallivm: Remove bogus assert.José Fonseca2013-07-051-4/+1
| | | | | | | | | | | It is perfectly valid for the swizzle to be bigger than 2. For example the texel offsets could be SAMPLE ..., IMM[0].zzz What is not correct is for chan_index to be bigger than 2. Trivial.
* nvc0: enable very initial support for nvf0 (GK110)Ben Skeggs2013-07-055-5/+76
| | | | | | | Shaders need a lot of work still. Basic stuff generally works, so this is basically just fine for gnome-shell, OA etc at this point. Signed-off-by: Ben Skeggs <[email protected]>
* gallivm: (trivial) fix bogus assertion for per-element lod with 1d resourcesRoland Scheidegger2013-07-052-2/+1
| | | | | | The assertion was always broken but the code unused until enabling the per-element lod code. Fixes piglit texelFetch vs isampler1D and similar tests (only run with GL 3.0 version override).
* gallivm: do per-pixel lod calculations for explicit lodRoland Scheidegger2013-07-0410-126/+195
| | | | | | | | | | | | | | | | | | | | | d3d10 requires per-pixel lod calculations for explicit lod, lod bias and explicit derivatives, and we should probably do it for OpenGL too - at least if they are used from vertex or geometry shaders (so doesn't apply to lod bias) this doesn't just affect neighboring pixels. Some code was already there to handle this so fix it up and enable it. There will no doubt be a performance hit unfortunately, we could do better if we'd knew we had a real vector shift instruction (with variable shift count) but this requires AVX2 on x86 (or a AMD Bulldozer family cpu). Don't do anything for lod bias and explicit derivatives yet, though no special magic should be needed for them neither. Likewise, the size query is still broken just the same. v2: Use information if lod is a (broadcast) scalar or not. The idea would be to base this on the actual value, for now just pretend it's a scalar in fs and not a scalar otherwise (so, per-pixel lod is only used in gs/vs but same code is generated for fs as before). Reviewed-by: Jose Fonseca <[email protected]>
* draw: fix overflows in the indexed rendering pathsZack Rusin2013-07-034-43/+159
| | | | | | | | | | | | | The semantics for overflow detection are a bit tricky with indexed rendering. If the base index in the elements array overflows, then the index of the first element should be used, if the index with bias overflows then it should be treated like a normal overflow. Also overflows need to be checked for in all paths that either the bias, or the starting index location. Signed-off-by: Zack Rusin <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* draw/llvm: index overflows if it's greater than elt maxZack Rusin2013-07-031-1/+1
| | | | | | | | | The comparison, incorrectly, was greater-than-or-equal to elt max. Signed-off-by: Zack Rusin <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* i965: Move the rest of intel_tex_layout.c into brw_tex_layout.c.Kenneth Graunke2013-07-036-191/+102
| | | | | | | | | | | The texture alignment unit functions are called from brw_tex_layout.c, so it makes sense to put them there. Since the only caller of intel_get_texture_alignment_unit() is in brw_tex_layout.c, it could be made into a static function. However, this patch instead simply folds it into the caller, as it's only two lines anyway. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Push intel_get_texture_alignment_unit call into brw_miptree_layoutKenneth Graunke2013-07-032-3/+3
| | | | | | | | | | | | | | intel_miptree_create_layout() calls intel_get_texture_alignment_unit() and then immediately calls brw_miptree_layout(). There are no other callers. intel_get_texture_alignment_unit() populates the miptree's alignment unit fields, which are used by brw_miptree_layout() to determine where to place each miplevel. Since brw_miptree_layout() needs those to be present, it makes sense to have it initialize them as the first step. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chad Versace <[email protected]>
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