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* swr: Remove stall waiting for core query counters.Bruce Cherniak2016-05-054-124/+81
* mesa/ubo: add missing compute cases for ubo/atomic buffersDave Airlie2016-05-051-0/+6
* mesa/compute: drop pointless casts.Dave Airlie2016-05-051-3/+3
* mesa: remove null check before freeThomas Hindoe Paaboel Andersen2016-05-052-4/+2
* freedreno: remove null check before freeThomas Hindoe Paaboel Andersen2016-05-051-2/+1
* nir: fix assert for wildcard pairsThomas Hindoe Paaboel Andersen2016-05-051-1/+1
* glapi: fix parameter type for GetSamplerParameterIuivEXT() in es_EXT.xmlBrian Paul2016-05-041-2/+2
* mesa: include texture format in glGenerateMipmap error messageBrian Paul2016-05-041-1/+2
* main: uses casts to silence some _mesa_debug() format warningsBrian Paul2016-05-041-4/+6
* i965: Implement ARB_query_buffer_object for HSW+Jordan Justen2016-05-048-3/+501
* i965/gen6+: Add load register immediate helper functionsJordan Justen2016-05-042-0/+36
* i965/hsw+: Add support for copying a registerJordan Justen2016-05-043-0/+18
* i965/gen6+: Add support for storing immediate data into a bufferJordan Justen2016-05-043-0/+50
* i965: Add MI_MATH reg defs for HSW+Jordan Justen2016-05-041-0/+38
* i965: Add brw_store_register_mem32Jordan Justen2016-05-042-0/+28
* i965: Use offset instead of index in brw_store_register_mem64Jordan Justen2016-05-045-54/+52
* r600,compute: create vtx buffer for text + rodataJan Vesely2016-05-041-2/+10
* freedreno: allow ctx->draw_vbo to failRob Clark2016-05-045-30/+37
* freedreno: move shader-stage dirty bits to global dirty flagRob Clark2016-05-048-59/+41
* freedreno/a4xx: fix bogus offset for f32x24s8 stencil restoreRob Clark2016-05-041-4/+5
* freedreno: add some debug_asserts() to catch insane offsetsRob Clark2016-05-041-0/+2
* freedreno/a4xx: deal with VS which do not write positionRob Clark2016-05-041-0/+7
* freedreno/ir3: remove a couple redundant is_flow()sRob Clark2016-05-042-2/+2
* freedreno/ir3: cp small negative integers tooRob Clark2016-05-041-1/+2
* freedreno/ir3: fix # of registersRob Clark2016-05-041-1/+1
* freedreno/ir3: lower immeds to constRob Clark2016-05-043-4/+80
* freedreno/ir3: add ir3_cp_ctxRob Clark2016-05-043-12/+22
* nouveau/video: properly detect the decoder class for availability checksIlia Mirkin2016-05-041-8/+17
* i965: Delete stale perf_debug().Kenneth Graunke2016-05-041-2/+0
* i965: Silence unused variable warningKenneth Graunke2016-05-041-2/+0
* mesa/main: handle double uniform matrices properlyJuan A. Suarez Romero2016-05-041-1/+1
* nir: Separate 32 and 64-bit fmod loweringSamuel Iglesias Gonsálvez2016-05-043-4/+6
* nir/lower_double_ops: lower mod()Samuel Iglesias Gonsálvez2016-05-042-1/+31
* i965: Define GEN_GE/GEN_LE macros in terms of GEN_LT.Matt Turner2016-05-031-2/+3
* i965: Add disassembler support for remaining opcodes.Matt Turner2016-05-032-18/+92
* i965: Make opcode_descs and gen_from_devinfo() static.Matt Turner2016-05-032-6/+2
* i965: Actually check whether the opcode is supported.Matt Turner2016-05-032-4/+3
* i965: Merge inst_info and opcode_desc tables.Matt Turner2016-05-035-149/+73
* i965: Move inst_info from brw_eu_validate.c to brw_eu.c.Matt Turner2016-05-033-245/+249
* i965/disasm: Wrap opcode_desc look-up in a function.Francisco Jerez2016-05-035-14/+42
* i965: Pass devinfo pointer to is_3src() helpers.Francisco Jerez2016-05-038-10/+11
* i965: Pass devinfo pointer to brw_instruction_name().Francisco Jerez2016-05-034-4/+5
* i965: Write a scalar TCS backend that runs in SINGLE_PATCH mode.Kenneth Graunke2016-05-037-15/+510
* i965: Rework the TCS passthrough shader to use NIR.Kenneth Graunke2016-05-033-56/+85
* gallium/util: change assertion to conditional in util_bitmask_destroy()Brian Paul2016-05-031-4/+4
* cso: null-out previously bound sampler statesBrian Paul2016-05-031-1/+3
* svga: try to flag surfaces for sampling, in addition to renderingBrian Paul2016-05-031-0/+11
* svga: fix copying non-zero layers of 1D array texturesBrian Paul2016-05-031-10/+12
* svga: clean up svga_pipe_blit.cBrian Paul2016-05-031-68/+13
* rbug: s/Elements/ARRAY_SIZE/Brian Paul2016-05-031-1/+1
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