summaryrefslogtreecommitdiffstats
path: root/src
Commit message (Collapse)AuthorAgeFilesLines
* glsl: Only include mtypes from glsl_types.h for the C++ code that needs it.Eric Anholt2015-02-201-1/+1
| | | | | | It's used in one of the methods, not in the structure definitions. Reviewed-by: Jose Fonseca <[email protected]>
* util: Move Mesa's bitset.h to util/.Eric Anholt2015-02-2012-10/+10
| | | | Reviewed-by: Jose Fonseca <[email protected]>
* mesa: Make bitset.h not rely on Mesa-specific types and functions.Eric Anholt2015-02-201-4/+3
| | | | | | | | | | Note that we can't use u_math.h's align() because it's a function instead of a macro, while BITSET_DECLARE needs a constant expression for nouveau's usage in global declarations. v2: Stick some parens around the bits macro argument usage (review by Jose). Reviewed-by: Jose Fonseca <[email protected]>
* mesa: Use u_math.h from macros.hEric Anholt2015-02-205-33/+1
| | | | | | | | | | This avoids duplication of some macros and other definitions across the tree. Note that COPY_4FV switches from a memcpy-based implementation to an assignment of 4 floats. Reviewed-by: Jose Fonseca <[email protected]>
* gallium/util: Don't include unused debug functions from u_math.hEric Anholt2015-02-201-1/+0
| | | | | | | It introduces references to gallium util/ symbols which means we don't get to include it from outside-of-gallium code. Reviewed-by: Jose Fonseca <[email protected]>
* mesa: Add gallium include dirs to more parts of the tree.Eric Anholt2015-02-2012-0/+24
| | | | | | v2: Try to patch up the scons bits. Reviewed-by: Jose Fonseca <[email protected]>
* gallium/radeon: fix an uninitialized-variable warningMarek Olšák2015-02-201-1/+1
|
* gallium: add new double-related shader caps to all the gettersIlia Mirkin2015-02-205-0/+20
| | | | | | | | Missed a few drivers in the earlier changes, this should fix up all the ones that print unknown caps or don't have a default statement. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* svga: add missing _DROUND,DFRACEXP_DLDEXP_SUPPORTED switch casesBrian Paul2015-02-201-0/+2
| | | | To silence unhandled switch case warnings.
* radeonsi: don't use SQC_CACHES to flush ICACHE and KCACHE on SIMarek Olšák2015-02-201-18/+11
| | | | | | | | | | | | | | | This reverts 73c2b0d18c51459697d8ec194ecfc4438c98c139. It doesn't seem to be reliable. It's probably missing a wait packet or something, because it's just a register write and doesn't wait for anything. SURFACE_SYNC at least seems to wait until the flush is done. Just guessing. Let's not complicate things and revert this. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88561 Cc: 10.5 <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* i965/gen6: Fix GL_GEOMETRY_SHADER_PRIMITIVES_EMITTED_ARBIago Toral Quiroga2015-02-201-0/+5
| | | | | | | | | | | | | | | | | | | In gen6 we need to compute the primitive count in the generated GS program. The current implementation only counts full primitives, that is, if the output primitive type is a triangle strip, it won't count individual triangles in the strip, only complete strips. If we want to count basic primitives instead we have two options: rework the assembly code we generate for strip primitives or simply use CL_INVOCATION_COUNT to resolve the query and let the hardware do that work for us. This patch implements the latter approach. Fixes the following piglit test: bin/arb_pipeline_statistics_query-geom -auto Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89210 Tested-by: Mark Janes <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* mesa: Check that draw buffers are valid for glDrawBuffers on GLES3Eduardo Lima Mitev2015-02-201-0/+14
| | | | | | | | | | | | | Section 4.2 (Whole Framebuffer Operations) of the OpenGL 3.0 specification says: "Each buffer listed in bufs must be BACK, NONE, or one of the values from table 4.3 (NONE, COLOR_ATTACHMENTi)". Fixes 1 dEQP test: * dEQP-GLES3.functional.negative_api.buffer.draw_buffers Reviewed-by: Matt Turner <[email protected]>
* glsl: don't allow invariant qualifiers for interface blocksSamuel Iglesias Gonsalvez2015-02-201-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GLSL 1.50 and GLSL 4.40 specs, they both say the same in "Interface Blocks" section: "If optional qualifiers are used, they can include interpolation qualifiers, auxiliary storage qualifiers, and storage qualifiers and they must declare an input, output, or uniform member consistent with the interface qualifier of the block" From GLSL ES 3.0, chapter 4.3.7 "Interface Blocks", page 38: "GLSL ES 3.0 does not support interface blocks for shader inputs or outputs." and from GLSL ES 3.0, chapter 4.6.1 "The invariant qualifier", page 52. "Only variables output from a shader can be candidates for invariance." This patch fixes the following dEQP tests: dEQP-GLES3.functional.shaders.declarations.invalid_declarations.invariant_uniform_block_2_vertex dEQP-GLES3.functional.shaders.declarations.invalid_declarations.invariant_uniform_block_2_fragment No piglit regressions. Signed-off-by: Samuel Iglesias Gonsalvez <[email protected]> v2: - Enable this check for GLSL. Signed-off-by: Samuel Iglesias Gonsalvez <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* vc4: Keep an array of pointers to instructions defining the temps around.Eric Anholt2015-02-198-68/+67
| | | | | The optimization passes are always regenerating it and throwing it away, but it's not hard to keep track of.
* vc4: Move qir_uniform() and the constant-value versions to vc4_qir.c/h.Eric Anholt2015-02-193-45/+49
| | | | | I may want them in optimization passes, and they're not really particular to the program translation stage.
* vc4: Enforce one-uniform-per-instruction after optimization.Eric Anholt2015-02-196-50/+209
| | | | | | | | | | | | | | | This lets us more intelligently decide which uniform values should be put into temporaries, by choosing the most reused values to push to temps first. total uniforms in shared programs: 13457 -> 13433 (-0.18%) uniforms in affected programs: 1524 -> 1500 (-1.57%) total instructions in shared programs: 40198 -> 40019 (-0.45%) instructions in affected programs: 6027 -> 5848 (-2.97%) I noticed this opportunity because with the NIR work, some programs were happening to make different uniform copy propagation choices that significantly increased instruction counts.
* vc4: Rename add_uniform() to qir_uniform().Eric Anholt2015-02-191-15/+15
|
* vc4: Shut up runtime warnings about new pipe caps.Eric Anholt2015-02-191-0/+2
|
* i965/vec4: Add and use byte-MOV instruction for unpack 4x8.Matt Turner2015-02-194-2/+21
| | | | | | | | | Previously we were using a B/UB source in an Align16 instruction, which is illegal. It for some reason works on all platforms, except Broadwell. Cc: "10.5" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86811 Reviewed-by: Ian Romanick <[email protected]>
* i965/blorp: Emit MADs.Matt Turner2015-02-192-4/+11
| | | | | | Low hanging fruit: cuts a couple of instructions. Reviewed-by: Ian Romanick <[email protected]>
* i965/blorp: Optimize clamping tex coords.Matt Turner2015-02-192-4/+22
| | | | | | | | | | | Each emit_cond_mov() emits a CMP of its first to arguments using the specified conditional mod, followed by a predicated MOV of the fifth argument into the fourth. In all four cases here, it was just implementing MIN/MAX which we can do in a single SEL instruction. Also reorder the instructions for a slightly better schedule. Reviewed-by: Ian Romanick <[email protected]>
* i965: Use greater-equal cmod to implement maximum.Matt Turner2015-02-194-7/+10
| | | | | | | | The docs specifically call out SEL with .l and .ge as the implementations of MIN and MAX respectively. Among other things, SEL with these conditional mods are commutative. Reviewed-by: Ian Romanick <[email protected]>
* i965: Don't emit saturates for instructions without destinations.Matt Turner2015-02-192-2/+2
| | | | | | | | | | | | We were special casing OPCODE_END but no other instructions that have no destination, like OPCODE_KIL, leading us to emitting MOVs with null destinations. total instructions in shared programs: 5705243 -> 5701539 (-0.06%) instructions in affected programs: 124104 -> 120400 (-2.98%) helped: 904 Reviewed-by: Ian Romanick <[email protected]>
* i965/fs: Consider MOV.SAT to interfere if it has a source modifier.Matt Turner2015-02-192-4/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | The saturate propagation pass recognizes that the second instruction below does not interfere with an attempt to propagate the saturate modifier from instruction 3 to 1. 1: add(8) dst0 src0 src1 2: mov.sat(8) dst1 dst0 3: mov.sat(8) dst2 dst0 Unfortunately, we did not consider the case of instruction 2 having a source modifier on dst0. Take for instance: 1: add(8) dst0 src0 src1 2: mov.sat(8) dst1 -dst0 3: mov.sat(8) dst2 dst0 Consider such an instruction to interfere. Increase instruction counts in Anomaly 2, which could be a bug fix depending on the values the first instruction produces. instructions in affected programs: 53228 -> 53934 (1.33%) HURT: 360 Cc: <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/fs: Use fs_inst::overwrites_reg() in saturate propagation.Matt Turner2015-02-192-4/+44
| | | | | | | This is safer and matches the conditional_mod propagation pass. Cc: <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/fs: Add unit tests for saturate propagation pass.Matt Turner2015-02-192-0/+362
| | | | | Cc: <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* glsl: Use the without_array predicateTimothy Arceri2015-02-201-5/+2
| | | | Reviewed-by: Matt Turner <[email protected]>
* nv50: add PIPELINE_STATISTICS query support, based on nvc0Ilia Mirkin2015-02-192-2/+27
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Tested-by: Nick Tenney <[email protected]>
* svga: add missing :Ilia Mirkin2015-02-191-1/+1
| | | | | Fixes: 924ee3f408 ("gallium: add shader cap for dldexp/dfracexp support") Signed-off-by: Ilia Mirkin <[email protected]>
* nir/GCM: Pull unpinned instructions out of blocks while pinningJason Ekstrand2015-02-191-37/+25
| | | | | | | | This lets us be slightly more efficient by not walking the CFG extra times. Also, it may make it easier to ensure that GVN happens on only unpinned instructions. Reviewed-by: Reviewed-by: Connor Abbott <[email protected]>
* nir/GCM: Use pass_flags instead of bitsets for tracking visited/pinnedJason Ekstrand2015-02-191-46/+49
| | | | Reviewed-by: Reviewed-by: Connor Abbott <[email protected]>
* nir: Add a global code motion (GCM) passJason Ekstrand2015-02-193-0/+504
| | | | | | | | | v2 Jason Ekstrand <[email protected]>: - Use nir_dominance_lca for computing least common anscestors - Use the block index for comparing dominance tree depths - Pin things that do partial derivatives Reviewed-by: Reviewed-by: Connor Abbott <[email protected]>
* nir/instr: Change "live" to a more generic "pass_flags" fieldJason Ekstrand2015-02-192-7/+13
| | | | Reviewed-by: Connor Abbott <[email protected]>
* nir: Make nir_[cf_node/instr]_[prev/next] return null if at the endJason Ekstrand2015-02-191-6/+22
| | | | Reviewed-by: Connor Abbott <[email protected]>
* nir/from_ssa: Don't try to read an invalid instructionJason Ekstrand2015-02-191-1/+1
| | | | | | | | | | | | Right now, the nir_instr_prev function function blindly looks up the previous element in the exec list and casts it to an instruction even if it's the tail sentinel. The next commit will change this to return null if it's the first instruction. Making this change first avoids getting a segfault between commits. The only reason we never noticed is that, thanks to the way things are laid out in nir_block, the casted instruction's type was never parallal_copy. Reviewed-by: Connor Abbott <[email protected]>
* nir/validate: Validate SSA defs the same way we do for registersJason Ekstrand2015-02-191-8/+79
| | | | Reviewed-by: Connor Abbott <[email protected]>
* nir/validate: Validate if_uses on registersJason Ekstrand2015-02-191-18/+44
| | | | Reviewed-by: Connor Abbott <[email protected]>
* nir: Properly clean up CF nodes when we remove themJason Ekstrand2015-02-191-0/+54
| | | | | | | | | | Previously, if you remved a CF node that still had instructions in it, none of the use/def information from those instructions would get cleaned up. Also, we weren't removing if statements from the if_uses of the corresponding register or SSA def. This commit fixes both of these problems Reviewed-by: Connor Abbott <[email protected]>
* nir: use nir_foreach_ssa_def for indexing ssa defsJason Ekstrand2015-02-191-23/+5
| | | | | | | This is both simpler and more correct. The old code didn't properly index load_const instructions. Reviewed-by: Connor Abbott <[email protected]>
* nir/from_ssa: Use the nir_block_dominance function instead of our ownJason Ekstrand2015-02-191-7/+2
| | | | Reviewed-by: Connor Abbott <[email protected]>
* nir/dominance: Add a constant-time mechanism for comparing blocksJason Ekstrand2015-02-192-0/+39
| | | | | | | | | This is mostly thanks to Connor. The idea is to do a depth-first search that computes pre and post indices for all the blocks. We can then figure out if one block dominates another in constant time by two simple comparison operations. Reviewed-by: Connor Abbott <[email protected]>
* nir/dominance: Expose the dominance intersection functionJason Ekstrand2015-02-192-0/+24
| | | | | | | | | | Being able to find the least common anscestor in the dominance tree is a useful thing that we may want to do in other passes. In particular, we need it for GCM. v2: Handle NULL inputs by returning the other block Reviewed-by: Connor Abbott <[email protected]>
* st/mesa: lower DFRACEXP/DLDEXP when they are not supportedIlia Mirkin2015-02-191-0/+3
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* st/mesa: disable lowering of dops to dfrac when dround is availableIlia Mirkin2015-02-191-7/+6
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* st/mesa: add support for new double opcodesIlia Mirkin2015-02-191-1/+5
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* gallium: add shader cap for dldexp/dfracexp supportIlia Mirkin2015-02-198-0/+10
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* gallium: add a cap to enable double rounding opcodesIlia Mirkin2015-02-198-1/+15
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* gallium: add some more double opcodes to avoid unnecessary loweringIlia Mirkin2015-02-193-1/+50
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* st/mesa: add st fp64 support (v7.1)Dave Airlie2015-02-202-125/+460
| | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support to the state tracker for ARB_gpu_shader_fp64. The details are explained in comments within the code. v2 : add double to int/unsigned conversion v3: handle fp64 consts better v4: use DRSQ v4.1: add d2b v4.2: drop DDIV v5: split out some prep patches. v5.1: add some comments. v5.2: more comments v6: simplify down the double instruction generation loop. v7: Merge Ilia's two cleanup patches. v7.1: minor fixups for Ilia patch + cleanups Reviewed-by: Ilia Mirkin <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* mesa/st_tgsi_to_glsl: prepare add_constant for fp64Dave Airlie2015-02-201-20/+21
| | | | | | | | This just moves stuff around a little to make the next patch cleaner. Reviewed-by: Ilia Mirkin <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-22 04:24:06 +0000