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* intel/tools: Refactor gen_disasm_disassemble() to use annotationsMatt Turner2017-05-151-28/+43
* intel/decoder: Fix indentationMatt Turner2017-05-151-4/+4
* genxml: Remove brackets from kernel start pointer namesMatt Turner2017-05-152-7/+7
* i965: Add a weak no-op nir_print_instr() symbolMatt Turner2017-05-151-0/+2
* i965: Allow brw_eu_validate to handle compact instructionsMatt Turner2017-05-151-2/+15
* i965: Pass pointer and end of assembly to brw_validate_instructionsMatt Turner2017-05-155-11/+22
* i965: Mark shader programs for capture in the error state.Matt Turner2017-05-156-1/+26
* egl: fix android logger compilationTapani Pälli2017-05-151-5/+5
* i965: perf: fix pointer to integer castLionel Landwerlin2017-05-151-1/+1
* intel: gen-decoder: fix xml parser leakLionel Landwerlin2017-05-151-6/+7
* radeonsi: enable threaded_contextMarek Olšák2017-05-151-3/+34
* gallium/u_threaded: drop and ignore all non-async debug callbacksMarek Olšák2017-05-152-3/+8
* gallium/radeon: add threaded context counter monitoring for HUDMarek Olšák2017-05-153-0/+25
* radeonsi: implement replace_buffer_storage for the threaded contextMarek Olšák2017-05-153-13/+55
* gallium/radeon: subclass and handle threaded_queryMarek Olšák2017-05-152-7/+12
* gallium/radeon: subclass threaded_transferMarek Olšák2017-05-153-25/+25
* gallium/radeon: subclass threaded_resourceMarek Olšák2017-05-153-18/+22
* gallium/radeon: handle other map buffer flags from the threaded contextMarek Olšák2017-05-151-2/+4
* gallium/radeon: handle TC_TRANSFER_MAP_THREADED_UNSYNCMarek Olšák2017-05-153-1/+14
* gallium/radeon: unwrap a context if we get a wrapped oneMarek Olšák2017-05-153-5/+9
* gallium/radeon: require both WRITE and FLUSH_EXPLICIT in buffer_flush_regionMarek Olšák2017-05-151-2/+4
* gallium/util: add threaded_context as a pipe_context wrapperMarek Olšák2017-05-154-0/+2723
* gallium/u_upload: add u_upload_cloneMarek Olšák2017-05-152-0/+14
* gallium: add flag PIPE_CONTEXT_PREFER_THREADEDMarek Olšák2017-05-152-1/+9
* radeonsi/gfx9: add support for RavenMarek Olšák2017-05-155-2/+15
* amd/addrlib: import Raven supportMarek Olšák2017-05-153-3/+72
* renderonly: Initialize fields of struct winsys_handle.Eric Anholt2017-05-151-0/+1
* Revert "freedreno: use bypass if only clears"Rob Clark2017-05-141-4/+1
* freedreno: fix crash when flush() but no renderingRob Clark2017-05-141-0/+6
* freedreno: fix indexbuffer uploadRob Clark2017-05-146-15/+26
* radv: Save descriptor set even if vertex buffers are not saved.Bas Nieuwenhuizen2017-05-131-2/+3
* freedreno/a5xx: hw binning supportRob Clark2017-05-139-51/+185
* freedreno: update generated headersRob Clark2017-05-136-29/+297
* freedreno: use bypass if only clearsRob Clark2017-05-131-1/+4
* nv50/ir: Report wrong prog types using proper varPierre Moreau2017-05-131-1/+1
* mesa: fix KHR_no_error SSO supportTimothy Arceri2017-05-131-1/+1
* glsl: include image qualifiers when printing IRNicolai Hähnle2017-05-121-3/+17
* radeonsi: get rid of secondary input/output wordNicolai Hähnle2017-05-123-47/+13
* radeonsi: reduce the number of generics for shader IO unique indicesNicolai Hähnle2017-05-121-1/+1
* radeonsi: at most 8 sets of texture coordinates are supportedNicolai Hähnle2017-05-121-0/+1
* radeonsi: skip generic out/in indices without a shader IO indexNicolai Hähnle2017-05-122-1/+9
* radeonsi: use SI_MAX_IO_GENERIC instead of magic valuesNicolai Hähnle2017-05-123-3/+8
* glsl: order indices for images inside a struct arraySamuel Pitoiset2017-05-121-11/+17
* glsl: add parcel_out_uniform_storage::set_opaque_indices() helperSamuel Pitoiset2017-05-121-54/+65
* i965: Port 3DSTATE_VF_TOPOLOGY on gen8+ to genxml.Rafael Antognolli2017-05-114-56/+21
* i965: Port 3DSTATE_INDEX_BUFFER to genxml.Rafael Antognolli2017-05-115-74/+40
* i965: Port brw_cs_state tracked state to genxml.Rafael Antognolli2017-05-113-164/+145
* genxml: Add alias for MOCS.Rafael Antognolli2017-05-115-0/+5
* i965/genxml: Mostly style fixes for emit_vertices code.Rafael Antognolli2017-05-111-25/+17
* r600g: Add defines for per-shader engine settingsGlenn Kennard2017-05-121-0/+6