| Commit message (Collapse) | Author | Age | Files | Lines |
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If you e.g. only need alpha, it ends up in the first reg,
not the last, as it would when reading rgb too.
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Until now, only primitives wholly outside the view volume
were not drawn.
This was only visibile when using a viewport smaller than
the window size, naturally.
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Separated the integer rounding mode flag for cvt.
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There's a good chance a loop won't execute correctly
though since our TEMP allocation assumes programs to
be executed linearly. Will fix later.
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As shown in mfeatures.h, this allows users of convolve.h to work without
knowing if the feature is available.
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As shown in mfeatures.h, this allows users of colortab.h to work
without knowing if the feature is available.
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As shown in mfeatures.h, this allows users of pixel.h to work without
knowing if the feature is available.
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The comments document the conventions that a feature may follow.
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Handles GL_TEXTURE_1D, GL_TEXTURE_2D, GL_TEXTURE_CUBE_MAP.
But GL_TEXTURE_3D and texture borders not supported yet.
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Conflicts:
src/mesa/vbo/vbo_exec_array.c
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At the time of the enable there may not be a Z buffer, but one
may be attached to the FBO later.
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If the currently bound FBO isn't yet validated it's possible for
rgbMode to be zero so we'll lose the texture enable.
This could fix some FBO rendering glitches, but I don't know of
any specific instances.
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This is similar to what r300 does inside the driver, but I've added it as
a generic option since it seems most hardware will want it.
Fixes piglit nv-init-zero-reg.vpfp and nv-init-zero-addr.vpfp.
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This helps let drivers treat NV_vp like ARB_vp.
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If there happened to be a bound VBO when intel_generate_mipmap() was
called we blew up because of a bad vertex array pointer.
Fixes regnumonline, bug 23859.
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Otherwise some apps will emit tons of warnings.
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Radeon generic scissors code had problem that some of code was using exclusive
and some inclusive bottom right corner. Only r600 driver is using exclusive
coordinate so changed generic code to pass inclusive coordinate and r600 driver
changes BR coordinate to be exclusive.
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Conflicts:
src/mesa/drivers/dri/r600/r700_assembler.c
src/mesa/drivers/dri/r600/r700_chip.c
src/mesa/drivers/dri/r600/r700_render.c
src/mesa/drivers/dri/r600/r700_vertprog.c
src/mesa/drivers/dri/r600/r700_vertprog.h
src/mesa/drivers/dri/radeon/radeon_span.c
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Mostly fixes progs/demos/lodbias when MESA_TEX_PROG=1. But the LOD still
seems off by -1 or so.
May be an issue with the params passed to _swrast_compute_lambda()
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In get_array_bounds we were previously defining a user buffer sized as
(nr_vertices * stride). The trouble is that if the vertex data
occupies less than stride bytes, the extra tailing (stride - size)
bytes may extend outside the memory actually allocated by the app and
caused a segfault.
To fix this, define a the buffer bounds to be:
ptr .. ptr + (nr-1)*stride + element_size
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This fixes the glean/glsl1 "texture2D(), with bias" test when using SSE.
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seems to work here ...
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128 gprs, 256 reg-based consts
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- max texture size is 8k, but mesa doesn't support
that at the moment.
- attempt to set shader limits to what the hw actually
supports
- clean up some old r300 cruft
- no need to explicitly disable irqs. This is fixed
in the drm now.
Signed-off-by: Alex Deucher <[email protected]>
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- MUL_LIT is ALU.Trans instruction
- some Trans instructions can take 3 arguments
- don't clobber dst.x, use dst.z as temp, it'll get written correct
value in last insn
- respect source swizzles
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registers takes radius
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