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* i965: add CS stall on VF invalidation workaroundLionel Landwerlin2019-01-042-2/+2
* i965: include draw_params/derived_draw_params for VF cache workaroundLionel Landwerlin2019-01-041-5/+18
* intel/blorp: emit VF caching workaround before 3DSTATE_VERTEX_BUFFERSLionel Landwerlin2019-01-041-2/+2
* i965: limit VF caching workaround to gen8/9/10Lionel Landwerlin2019-01-042-2/+4
* glsl/linker: complete documentation for assign_attribute_or_color_locationsAndres Gomez2019-01-041-9/+13
* virgl: remove empty fileGurchetan Singh2019-01-031-0/+0
* virgl: don't flush an empty rangeGurchetan Singh2019-01-031-0/+4
* virgl/vtest: Use default socket name from protocol headerJakob Bornecrantz2019-01-031-3/+1
* freedreno: fix staging resource size for arraysRob Clark2019-01-031-2/+10
* freedreno: remove blit_via_copy_region()Rob Clark2019-01-031-4/+0
* freedreno/a6xx: rework blitter APIRob Clark2019-01-031-54/+8
* freedreno: try blitter for fd_resource_copy_region()Rob Clark2019-01-031-0/+27
* freedreno: rework blit APIRob Clark2019-01-038-27/+29
* freedreno: skip depth resolve if not writtenRob Clark2019-01-033-4/+14
* nir: merge some basic consecutive ifsTimothy Arceri2019-01-031-0/+93
* nir: add rewrite_phi_predecessor_blocks() helperTimothy Arceri2019-01-031-20/+31
* nir: simplify does_varying_match()Timothy Arceri2019-01-031-5/+2
* nir: make use of does_varying_match() helperTimothy Arceri2019-01-031-2/+1
* nir: make nir_opt_remove_phis_impl() staticTimothy Arceri2019-01-032-2/+1
* v3d: Refactor compiler entrypoints.Eric Anholt2019-01-023-189/+170
* v3d: Handle dynamically uniform IF statements with uniform control flow.Eric Anholt2019-01-021-1/+65
* v3d: Fold comparisons for IF conditions into the flags for the IF.Eric Anholt2019-01-025-12/+57
* v3d: Don't try to fold non-SSA-src comparisons into bcsels.Eric Anholt2019-01-021-1/+17
* v3d: Move the "Find the ALU instruction generating our bool" out of bcsel.Eric Anholt2019-01-021-6/+9
* v3d: Simplify the emission of comparisons for the bcsel optimization.Eric Anholt2019-01-021-37/+24
* v3d: Don't forget to include RT writes in precompiles.Eric Anholt2019-01-021-0/+10
* v3d: Fix segfault when failing to compile a program.Eric Anholt2019-01-021-2/+4
* radeonsi: always unmap texture CPU mappings on 32-bit CPU architecturesMarek Olšák2019-01-021-0/+16
* radeonsi: remove unused variables in si_insert_input_ptrMarek Olšák2019-01-021-3/+1
* radeonsi: use u_decomposed_prims_for_vertices instead of u_prims_for_verticesMarek Olšák2019-01-021-1/+3
* radeonsi: make si_cp_wait_mem more configurableMarek Olšák2019-01-025-8/+8
* radeonsi: call si_fix_resource_usage for the GS copy shader as wellMarek Olšák2019-01-021-0/+4
* radeonsi: don't emit redundant PKT3_NUM_INSTANCES packetsMarek Olšák2019-01-022-2/+10
* nir: add a way to print the deref chainCaio Marcelo de Oliveira Filho2019-01-022-4/+14
* egl/haiku: Fix reference to disp vs dpyAlexander von Gluck IV2019-01-021-1/+2
* compiler/spirv: use 32-bit polynomial approximation for 16-bit asin()Iago Toral Quiroga2019-01-021-0/+14
* compiler/spirv: implement 16-bit frexpIago Toral Quiroga2019-01-021-2/+46
* compiler/spirv: implement 16-bit hyperbolic trigonometric functionsIago Toral Quiroga2019-01-021-18/+26
* compiler/spirv: implement 16-bit exp and logIago Toral Quiroga2019-01-021-2/+2
* compiler/spirv: implement 16-bit atan2Iago Toral Quiroga2019-01-021-7/+11
* compiler/spirv: implement 16-bit atanIago Toral Quiroga2019-01-021-12/+11
* compiler/spirv: implement 16-bit acosIago Toral Quiroga2019-01-021-2/+3
* compiler/spirv: implement 16-bit asinIago Toral Quiroga2019-01-021-9/+14
* compiler/spirv: handle 16-bit float in radians() and degrees()Iago Toral Quiroga2019-01-021-2/+2
* compiler/nir: add nir_fadd_imm() and nir_fmul_imm() helpersIago Toral Quiroga2019-01-021-0/+12
* compiler/nir: add a nir_b2f() helperIago Toral Quiroga2019-01-021-0/+12
* nir: link time opt duplicate varyingsTimothy Arceri2019-01-021-0/+88
* nir: rework nir_link_opt_varyings()Timothy Arceri2019-01-021-16/+12
* nir: add can_replace_varying() helperTimothy Arceri2019-01-021-2/+14
* nir: rename nir_link_constant_varyings() nir_link_opt_varyings()Timothy Arceri2019-01-025-6/+6
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