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| * | mesa: need to set all stencil bits to 0 before setting the 1 bitsBrian Paul2009-09-101-0/+9
| * | Merge branch 'mesa_7_5_branch' into mesa_7_6_branchIan Romanick2009-09-102-1/+6
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| | * intel: add B43 chipset supportZhenyu Wang2009-09-102-1/+6
| * | i965: Fix relocation delta for WM surfaces.Eric Anholt2009-09-101-1/+1
| * | mesa: in texenvprogram code, only do saturation when really needed.Brian Paul2009-09-101-8/+53
| * | gallium: Add PIPE_OS_APPLE back to auxiliary/util/u_time.h.Vinson Lee2009-09-101-1/+1
| * | radeon: Change debugging code to use macros instead of inline functions.Pauli Nieminen2009-09-102-43/+27
| * | radeon: Add more verbose error message for failed command buffer.Pauli Nieminen2009-09-091-1/+3
* | | st/xorg: rename ctx to pipe to match every other gallium state trackerZack Rusin2009-09-104-35/+35
* | | st/xorg: temporarily disablie copiesZack Rusin2009-09-101-1/+2
* | | st/xorg: implement pipelines surface/texture copiesZack Rusin2009-09-102-7/+329
* | | st/xorg: unite finalization and stub out pipelined copiesZack Rusin2009-09-104-20/+50
* | | st/xorg: abstract flushing and syncing for the exa codeZack Rusin2009-09-102-5/+23
* | | st/xorg: disable solid fills until copies are accelerated as wellZack Rusin2009-09-102-1/+3
* | | st/xorg: implement exasolids with full pipeliningZack Rusin2009-09-104-32/+135
* | | st/xorg: start adding support for surface fillsZack Rusin2009-09-105-26/+66
* | | nv50: Fix tiling mode for lower mipmap levels.Marcin Kościelnicki2009-09-103-5/+8
* | | intel: Don't forget to map the depth read buffer in spans.Eric Anholt2009-09-101-22/+28
* | | r300: enable rb3d_discard_src_pixel_lte_threshold for more chips on dri2Alex Deucher2009-09-101-5/+1
* | | r300: add full support for two sided stencil on r5xx for dri2Alex Deucher2009-09-104-4/+46
* | | mesa: fix cut&paste typosMathias Frohlich2009-09-101-4/+4
* | | util: Add PIPE_OS_APPLE back to auxiliary/util/u_time.h.Vinson Lee2009-09-101-1/+1
* | | llvmpipe: Fix alpha test.José Fonseca2009-09-101-26/+13
* | | llvmpipe: Mask out color channels not present in the color buffer.José Fonseca2009-09-101-5/+23
* | | llvmpipe: Fix sampling from depth textures. Respect texture compare func.José Fonseca2009-09-102-49/+122
* | | llvmpipe: Skip blending when mask is zero.José Fonseca2009-09-102-13/+30
* | | llvmpipe: Proper control flow builders.José Fonseca2009-09-103-60/+426
* | | llvmpipe: Copy the texture target into the sampler static state.José Fonseca2009-09-101-0/+1
* | | llvmpipe: Quick hack for 1D textures.José Fonseca2009-09-092-0/+4
* | | llvmpipe: Fix depth mask computation.José Fonseca2009-09-091-4/+5
* | | llvmpipe: Include zsbuf's format in the fragment shader key.José Fonseca2009-09-092-14/+17
* | | util: Fix depth/stencil format description.José Fonseca2009-09-091-4/+4
* | | llvmpipe: Debug function to check stack alignment.José Fonseca2009-09-093-4/+28
* | | i965: Fix relocation delta for WM surfaces.Eric Anholt2009-09-091-1/+1
* | | i965: fix an overlooked merge conflictBrian Paul2009-09-091-13/+0
* | | r600: check if textures are actually enabled before submissionAlex Deucher2009-09-092-56/+64
* | | Merge branch 'mesa_7_6_branch'Brian Paul2009-09-0916-23/+59
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| * | Merge branch 'mesa_7_5_branch' into mesa_7_6_branchBrian Paul2009-09-096-3/+24
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| | * mesa: bump version to 7.5.2Brian Paul2009-09-081-3/+3
| | * i965: fix incorrect test for vertex position attributeBrian Paul2009-09-083-1/+4
| | * i965: Fix warnings in intel_pixel_read.c.Eric Anholt2009-09-041-0/+4
| | * intel: Also get the DRI2 front buffer when doing front buffer reading.Eric Anholt2009-09-044-1/+29
| | * intel: Update Mesa state before span setup in glReadPixels.Eric Anholt2009-09-043-3/+13
| | * intel: Move intel_pixel_read.c to shared for use with i965.Eric Anholt2009-09-042-306/+307
| | * i965: Add missing state dependency of sf_unit on _NEW_BUFFERS.Eric Anholt2009-09-041-2/+4
| | * intel: Align cubemap texture height to its padding requirements.Eric Anholt2009-09-041-0/+10
| | * intel: Align untiled region height to 2 according to 965 docs.Eric Anholt2009-09-041-0/+7
| | * i965: Fix source depth reg setting for FSes reading and writing to depth.Eric Anholt2009-09-043-1/+5
| | * i965: Respect CondSwizzle in OPCODE_IF.Eric Anholt2009-09-041-1/+21
| | * i965: asst clean-ups, etc in brw_vs_emit()Brian Paul2009-09-041-11/+10
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