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* radeonsi: rename r600_texture -> si_texture, rxxx -> xxx or sxxxMarek Olšák2018-06-1916-892/+886
| | | | Acked-by: Bas Nieuwenhuizen <[email protected]>
* amd,radeonsi: rename radeon_winsys_cs -> radeon_cmdbufMarek Olšák2018-06-1969-417/+417
| | | | Acked-by: Bas Nieuwenhuizen <[email protected]>
* freedreno/a5xx: move emit_marker5() into a5xx backendRob Clark2018-06-195-21/+24
| | | | | | | | | The scratch registers move again in a6xx.. so for post-a4xx let's just move this into the backend, and move the one place it used to be needed in core into fd5_emit_ib(). For a6xx we will do similar, calling emit_marker6() from fd6_emit_ib(). Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: fix crash in ↵Rob Clark2018-06-193-1/+24
| | | | | | | | | | | dEQP-GLES31.stress.vertex_attribute_binding.buffer_bounds.bind_vertex_buffer_offset_near_wrap_10 This is kind of a hack, but really the only problem is the debug_assert() in OUT_RELOC(). But the debug_assert() is useful to catch real issues. So just add some #ifdef DEBUG code to filter things out before we hit the assert. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: don't crash if compute shader compile failsRob Clark2018-06-191-0/+2
| | | | | | | It is impolite, and a bit annoying with dEQP (all tests running in single process). Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: fix missing recursion into block conditionRob Clark2018-06-191-0/+4
| | | | | | Fixes a problem seen with dEQP-GLES31.functional.ssbo.layout.single_basic_array.shared.row_major_mat4 Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: better FOUR_QUAD/TWO_QUAD decision for computeRob Clark2018-06-191-4/+12
| | | | | | If we aren't going to get full occupancy, then use TWO_QUAD. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: bordercolor fixesRob Clark2018-06-191-4/+27
| | | | | | | Need a bit of hand-holding for stencil bordercolor, and add border color values for sRGB. Signed-off-by: Rob Clark <[email protected]>
* freedreno: remove per-stateobj dirty_mask'sRob Clark2018-06-195-37/+16
| | | | | | | | These never got updated in fd_context_all_dirty() so actually trying to rely on them (in the case of fd5_emit_images()) ends up in some cases where state is not emitted but should be. Best to just rip this out. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: remove one image stateblockRob Clark2018-06-191-13/+0
| | | | | | | | I think this ends up just setting uniform/const memory. But we upload x/y/z stride differently. At best this is unneeded, at worst it could possibly clobber other uniform/const memory. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: cubemap image fixesRob Clark2018-06-192-2/+7
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: handle image bufferRob Clark2018-06-191-1/+8
| | | | | | Similar to txf case, we need to insert a 2nd coordinate (zero). Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: handle arrays of imagesRob Clark2018-06-191-6/+30
| | | | | | | | Unlike textures, this doesn't get lowered for us. (Would be nice if they were.. at least until we are ready to deal w/ indirect indexing..) Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: images can be arrays tooRob Clark2018-06-192-22/+83
| | | | | | Seems I previously toally forgot about 2d-arrays, etc.. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: use move_load_const passRob Clark2018-06-191-0/+3
| | | | Signed-off-by: Rob Clark <[email protected]>
* nir: add pass to move load_constRob Clark2018-06-194-0/+144
| | | | | | | | | | | | Run this pass late (after opt loop) to move load_const instructions back into the basic blocks which use the result, in cases where a load_const is only consumed in a single block. This helps reduce register usage in cases where the backend driver cannot lower the load_const to a uniform. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa/st/nir: fix driver_location for arrays of image/samplerRob Clark2018-06-191-7/+9
| | | | | | | | We can have arrays of images or samplers. But I forgot to handle that case long ago. Suprised no one complained yet. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* nir: add comment for loop_unroll passRob Clark2018-06-191-0/+4
| | | | | | | | Save the next person from digging through the code to figure out what the indirect_mask parameter actually does. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* glsl: fix random typoRob Clark2018-06-191-1/+1
| | | | | | | Just something I stumbled across. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: ignore PIPE_RESOURCE_FLAG_MAP_COHERENTMarek Olšák2018-06-192-5/+4
| | | | | | | | We treat coherent and non-coherent buffers the same. And move external_usage for better packing. Tested-by: Dieter Nützel <[email protected]>
* radeonsi: always put persistent buffers into GTT on radeonMarek Olšák2018-06-191-1/+5
| | | | | | | This improves performance for certain games. Cc: 18.1 <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* radeonsi: fix si_get_num_queries for radeonMarek Olšák2018-06-191-5/+16
| | | | Tested-by: Dieter Nützel <[email protected]>
* radeonsi: don't expose performance counters for non-existent blocksMarek Olšák2018-06-191-13/+16
| | | | Tested-by: Dieter Nützel <[email protected]>
* ac/gpu_info: add radeon_info::num_tcc_blocksMarek Olšák2018-06-193-0/+37
| | | | | | The values for the radeon winsys were copied from the kernel driver. Tested-by: Dieter Nützel <[email protected]>
* radeonsi: set a better NUM_PATCHES hard limitMarek Olšák2018-06-191-3/+10
| | | | | | | | | | AMDVLK uses 64 (distributed) and 16 (non-distributed). radeonsi will use 63 and 16. * This might improve tessellation performance on Hawaii, Bonaire, Tahiti, Pitcairn. (they will use 16) * I'm not sure if this matters for 1 SE configs. Tested-by: Dieter Nützel <[email protected]>
* radeonsi: make sure LS-HS vector lanes are reasonably occupiedMarek Olšák2018-06-191-0/+8
| | | | Tested-by: Dieter Nützel <[email protected]>
* radeonsi: properly compute an LS-HS thread group size limitMarek Olšák2018-06-191-2/+3
| | | | | | "64 / max * 4" is less than "64 * 4 / max". Tested-by: Dieter Nützel <[email protected]>
* v3d: Fix blitting from a linear winsys BO.Eric Anholt2018-06-191-0/+36
| | | | | | | | | | | | This is the case for the simulator environment, and broke many blitter tests by trying to texture from linear while the HW can only actually do UIF/UBLINEAR/LT. Just make a temporary and copy into it with the CPU, then blit from that. This is the kind of path that should use the TFU, but I haven't exposed that hardware yet. Fixes dEQP-GLES3.functional.fbo.blit.default_framebuffer.*
* v3d: Add missing always_flush debug flag.Eric Anholt2018-06-191-0/+1
| | | | The #define existed and was checked in the driver.
* virgl: Remove debugging left-oversTomeu Vizoso2018-06-191-2/+0
| | | | | | | | | | | Some fprintfs were probably left unintentionally a few years ago and are a bit of a nuisance. Fixes: 2d3301e4d513 ("virgl: fix reference counting of prime handles") Cc: Rob Herring <[email protected]> Signed-off-by: Tomeu Vizoso <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* glsl: fix desktop glsl linking regressionTimothy Arceri2018-06-191-1/+2
| | | | | | | The prog->Shaders[i]->IsES check was accidentally removed causing ES linking rules to be applied to desktop GLSL. Fixes: 725b1a406dbe ("mesa/util: add allow_glsl_relaxed_es driconfig override")
* util: add allow_glsl_relaxed_es to drirc for Google Earth VRTimothy Arceri2018-06-191-0/+1
| | | | Reviewed-by: Dave Airlie <[email protected]>
* mesa/util: add allow_glsl_relaxed_es driconfig overrideTimothy Arceri2018-06-198-10/+33
| | | | | | | | | | | | | | | This relaxes a number of ES shader restrictions allowing shaders to follow more desktop GLSL like rules. This initial implementation relaxes the following: - allows linking ES shaders with desktop shaders - allows mismatching precision qualifiers - always enables standard derivative builtins These relaxations allow Google Earth VR shaders to compile. Reviewed-by: Dave Airlie <[email protected]>
* util: add allow_glsl_builtin_const_expression to drirc for Google Earth VRTimothy Arceri2018-06-191-0/+4
| | | | Reviewed-by: Dave Airlie <[email protected]>
* mesa/util: add allow_glsl_builtin_const_expression driconf overrideTimothy Arceri2018-06-197-1/+20
| | | | | | | Google Earth VR shaders uses builtins in constant expressions with GLSL 1.10. That feature wasn't allowed until GLSL 1.20. Reviewed-by: Dave Airlie <[email protected]>
* util: manually extract the program name from program_invocation_nameTimothy Arceri2018-06-191-1/+10
| | | | | | | | | | | | | | | Glibc has the same code to get program_invocation_short_name. However for some reason the short name gets mangled for some wine apps. For example with Google Earth VR I get: program_invocation_name: "/home/tarceri/.local/share/Steam/steamapps/common/EarthVR/Earth.exe" program_invocation_short_name: "e" Acked-by: Eric Engestrom <[email protected]>
* ac/surface: Set compressZ for stencil-only surfaces.Bas Nieuwenhuizen2018-06-191-1/+1
| | | | | | | We HTILE compress stencil-only surfaces too. CC: 18.1 <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* anv: Use a single global API patch versionJason Ekstrand2018-06-182-8/+11
| | | | | | | | | The Vulkan API has only one patch version shared among all of the major.minor versions. We should also advertise the same patch version regardless of major.minor. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106941 Reviewed-by: Lionel Landwerlin <[email protected]>
* radeonsi: enable OpenGL 3.3 compat profileTimothy Arceri2018-06-191-1/+1
| | | | Reviewed-by: Marek Olšák <[email protected]>
* mesa: add ff fragment shader support for geom and tess shadersTimothy Arceri2018-06-191-1/+5
| | | | | | | This is required for compatibility profile support. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* v3d: Set the SO offsets correctly if we have to re-emit.Eric Anholt2018-06-185-4/+24
| | | | | | This should fix TF across a glFlush() or TF pause/restart. Fixes dEQP-GLES3.functional.transform_feedback.array.interleaved.lines.highp_float and many, many others.
* gallium/hud: = should rename the last added data sourceMarek Olšák2018-06-181-1/+4
| | | | Tested-by: Dieter Nützel <[email protected]>
* anv: Disable constant buffer 0 being relative.Rafael Antognolli2018-06-182-1/+29
| | | | | | | | | If we are on gen8+ and have context isolation support, just make that constant buffer address be absolute, so we can use it for push UBOs too. v2: Do not duplicate constant_buffer_0_is_relative flag (Jason) Reviewed-by: Jason Ekstrand <[email protected]>
* anv/device: Check for kernel support of context isolation.Rafael Antognolli2018-06-182-0/+4
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/genxml: Add bitmasks for CS_DEBUG_MODE2/INSTPM.Rafael Antognolli2018-06-187-0/+32
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* swr/rast: Clang-Format most rasterizer source codeAlok Hota2018-06-18114-22174/+27802
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* radv: fix reported number of available VGPRsEric Engestrom2018-06-181-1/+1
| | | | | | | | It's a bit late to round up after an integer division. Fixes: de889794134e6245e08a2 "radv: Implement VK_AMD_shader_info" Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Alex Smith <[email protected]>
* mesa: add missing return in error pathEric Engestrom2018-06-181-1/+3
| | | | | | | | Fixes: 67f40dadaa6666dacd90 "mesa: add support for ARB_sample_locations" Cc: Rhys Perry <[email protected]> Cc: Brian Paul <[email protected]> Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* radv: Use less conservative approximation for context rolls.Bas Nieuwenhuizen2018-06-181-3/+6
| | | | | | | Drops the number of time we set the scissor by 4x for F1 2017, which results in a consistent performance improvement of about 4%. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: fix bitwise checkEric Engestrom2018-06-181-1/+1
| | | | | | Fixes: 922cd38172b8a2bc286bd "radv: implement out-of-order rasterization when it's safe on VI+" Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
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