summaryrefslogtreecommitdiffstats
path: root/src
Commit message (Expand)AuthorAgeFilesLines
* freedreno/a5xx: align height to GMEMRob Clark2017-10-021-1/+5
* radeonsi: adjust clip discard based on line width / point sizeNicolai Hähnle2017-10-023-11/+27
* radeonsi: remove si_context::{scissor_enabled,clip_halfz}Nicolai Hähnle2017-10-023-26/+24
* radeonsi: simplify the signature of si_update_vs_writes_viewport_indexNicolai Hähnle2017-10-023-7/+6
* radeonsi: move current_rast_prim into si_contextNicolai Hähnle2017-10-026-15/+11
* radeonsi: move and rename scissor and viewport state and functionsNicolai Hähnle2017-10-0210-182/+184
* radeonsi: remove si_apply_scissor_bug_workaroundNicolai Hähnle2017-10-022-19/+0
* radeonsi: move r600_viewport.c to si_viewport.cNicolai Hähnle2017-10-023-2/+2
* radeonsi: fix maximum advertised point size / line widthNicolai Hähnle2017-10-022-8/+3
* radeonsi: deduce rast_prim correctly for tessellation point modeNicolai Hähnle2017-10-021-3/+6
* radeonsi: don't discard points and linesNicolai Hähnle2017-10-022-2/+26
* radeonsi: move current_rast_prim to r600_common_contextNicolai Hähnle2017-10-025-9/+13
* st/mesa: use R10G10B10X2 format where applicableNicolai Hähnle2017-10-021-3/+8
* gallium: add PIPE_FORMAT_R10G10B10X2_UNORMNicolai Hähnle2017-10-024-0/+10
* mesa/main: R10G10B10_(A2) formats are not color renderable in ESNicolai Hähnle2017-10-021-2/+5
* mesa/main: select the R10G10B10X2_UNORM internal format based on data typeNicolai Hähnle2017-10-021-1/+3
* glsl: do not set the 'smooth' qualifier by default on ES shadersNicolai Hähnle2017-10-023-13/+23
* freedreno: fix PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVERob Clark2017-10-022-4/+5
* egl/wayland: simplify LIBGL_ALWAYS_SOFTWARE logicEric Engestrom2017-10-021-8/+4
* radeonsi: fix a regression in integer cube map handlingNicolai Hähnle2017-10-021-8/+26
* amd/common: move ac_build_phi from radeonsiNicolai Hähnle2017-10-023-17/+22
* radv: remove unused radv_meta_state::btoi::render_pass handleSamuel Pitoiset2017-10-021-1/+0
* radv: do not check the number of levels when doing fast htileSamuel Pitoiset2017-10-021-3/+0
* radv: cleanup radv_device_finish_meta_XXX() helpersSamuel Pitoiset2017-10-028-219/+136
* radv: select the pipeline outside of emit_fast_clear_flush()Samuel Pitoiset2017-10-021-12/+11
* radv: drop useless param in emit_depth_decomp()Samuel Pitoiset2017-10-021-5/+4
* radv: drop useless check in depth_view_can_fast_clear()Samuel Pitoiset2017-10-021-2/+1
* radv: add radv_subpass_clear_attachment() helperSamuel Pitoiset2017-10-021-20/+32
* radv: add radv_attachment_needs_clear() helperSamuel Pitoiset2017-10-021-39/+31
* radv: remove unused param in radv_handle_{cmask,dcc}_image_transition()Samuel Pitoiset2017-10-021-8/+4
* radv: add radv_vi_dcc_enabled() helperSamuel Pitoiset2017-10-023-2/+7
* radv: do not need to double zero-init the meta state structuresSamuel Pitoiset2017-10-0212-28/+0
* radv: inline destroy_render_pass()Samuel Pitoiset2017-10-021-9/+6
* radv: use pipeline handles instead of objects for meta clear operationsSamuel Pitoiset2017-10-022-44/+36
* radv: inline blit2d_unbind_dst()Samuel Pitoiset2017-10-021-9/+3
* radv: rework DCC/CMASK/FMASK/HTILE allocationsSamuel Pitoiset2017-10-021-27/+56
* i965: skip reading unused slots at the begining of the URB for the FSIago Toral Quiroga2017-10-023-14/+38
* i965: Normalize types for FBL, FBH, etcMatt Turner2017-09-302-15/+11
* radeonsi: don't use the template keywordMarek Olšák2017-09-301-7/+7
* glx: don't use the template keywordMarek Olšák2017-09-301-3/+3
* gallium/vl: don't use the template keywordMarek Olšák2017-09-301-14/+14
* egl/dri2: don't use the template keywordMarek Olšák2017-09-301-3/+3
* radeonsi/uvd: clean up si_video_buffer_createBenedikt Schemmer2017-09-301-30/+17
* radeonsi/uvd: fix planar formats broken since f70f6baaa3bb0f8b280ac2eaea69bbMarek Olšák2017-09-301-3/+8
* gallium: add new LOD opcodeRoland Scheidegger2017-09-305-5/+74
* drirc: whitelist glthread for OutlastKamil Páral2017-09-291-0/+3
* st/va: add dst rect to avoid scale on deintLeo Liu2017-09-291-6/+6
* radeonsi: emit DLDEXP and DFRACEXP TGSI opcodesNicolai Hähnle2017-09-292-1/+26
* radeonsi: emit LDEXP opcodeNicolai Hähnle2017-09-292-1/+3
* st/glsl_to_tgsi: use LDEXP when availableNicolai Hähnle2017-09-291-3/+7
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-24 17:52:51 +0000