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* i915g: Treat primary textures as scanout buffersJakob Bornecrantz2009-08-054-14/+58
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* i915g: Link with trace on EGL and XorgJakob Bornecrantz2009-08-052-0/+2
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* trace: Use correct texture in drm_api wrapperJakob Bornecrantz2009-08-051-1/+1
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* softpipe: Also defere primary textures to backendJakob Bornecrantz2009-08-051-1/+2
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* r200: emit colorpitchDave Airlie2009-08-051-2/+2
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* i965: Fix dangerous warning I let slip in.Eric Anholt2009-08-041-1/+1
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* i965: Respect CondSwizzle in OPCODE_IF.Eric Anholt2009-08-041-1/+21
| | | | | | | Fixes piglit glsl-vs-if-bool and progs/glsl/twoside, and will likely be useful for the looping code. Bug #18992
* i965: Emit conditional code updates as required for GLSL VS if statements.Eric Anholt2009-08-041-0/+13
| | | | | Previously, we'd be branching based on whatever condition code happened to be laying around.
* i965: Don't set pop_count in the reserved MBZ area of IF statements.Eric Anholt2009-08-041-1/+1
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* i965: Print out ELSE and ENDIF src1 arguments like IF does.Eric Anholt2009-08-041-2/+2
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* r200: fix off-by-one errors causing 6th texture unit to not workRoland Scheidegger2009-08-051-2/+2
| | | | | both for normal and cube textures, this fixes demos/multiarb (with 6 enabled texture units) and fixes #23142.
* r200: fix compiler warning (unused var)Roland Scheidegger2009-08-051-2/+0
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* radeon: fix miptree comparison breakageRoland Scheidegger2009-08-051-1/+2
| | | | another case of image never matching miptree in case of compressed textures
* intel: implement intelCompressedTexSubImage2DRoland Scheidegger2009-08-051-21/+44
| | | | | similar to the radeon code. passes tests/texcompsub
* intel: Add support for EXT_provoking_vertex.Eric Anholt2009-08-0411-24/+131
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* i965: Spell "conditional" correctly.Eric Anholt2009-08-043-16/+16
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* i965: Hook up the disassembler for INTEL_DEBUG={wm,vs}.Eric Anholt2009-08-048-12/+47
| | | | | I was getting tired of doing the dance of INTEL_DEBUG=batch, copying it out, and running intel-gen4disasm on it.
* i965: Initial import of disasm code from intel-gen4asm.Eric Anholt2009-08-041-0/+901
| | | | | There's a bunch of stuff from gen4asm and gpu-tools that we probably want to make into a library instead of cargo-culting it around.
* i965: warning fixEric Anholt2009-08-041-1/+1
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* mesa: log the shader checksumBrian Paul2009-08-041-1/+1
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* mesa: compute, print shader checksumBrian Paul2009-08-041-2/+6
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* mesa: added gl_shader::SourceChecksum field (for debug purposes)Brian Paul2009-08-041-0/+1
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* mesa: added _mesa_str_checksum()Brian Paul2009-08-042-0/+17
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* mesa: clean-up error debug/count codeBrian Paul2009-08-041-30/+41
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* mesa: reset ErrorDebugCount to zero in glGetString()Brian Paul2009-08-041-0/+1
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* mesa: better texture dump/debug codeBrian Paul2009-08-041-52/+45
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* mesa: more error message info for vertex pointer functionsBrian Paul2009-08-041-6/+12
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* mesa: more glGetTexImage() error checking consolidation, new assertionBrian Paul2009-08-041-8/+12
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* i965: Fix RECT shadow sampling by not losing the other texcoords.Eric Anholt2009-08-041-1/+5
| | | | Bug #20821
* r300g: Slightly saner initialization of some texture / transfer fields.Michel Dänzer2009-08-042-6/+5
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* i965: Assert that the offset in the VBO is below the VBO size.Eric Anholt2009-08-031-0/+14
| | | | | | | | | | This avoids sending a bad buffer address to the GPU due to programmer error, and is permitted by the ARB_vbo spec. Note that we still have the opportunity to dereference past the end of the GPU, because we aren't clipping to a correct _MaxElement, but that appears to be harder than it should be. This gets us the 90% solution. Bug #19911.
* i965: Even if no VS inputs are set, still load some amount of URB as required.Eric Anholt2009-08-031-0/+11
| | | | | | See comment on Vertex URB Entry Read Length for VS_STATE. This, combined with the previous three commits, fixes #22945.
* i965: Make sure the VS URB size is big enough to fit a VF VUE.Eric Anholt2009-08-031-2/+8
| | | | | This fix is just from code and docs inspection, but it may fix hangs on some applications.
* i965: Don't emit bad packets when no VBs are referenced.Eric Anholt2009-08-031-0/+22
| | | | | | | | | It appears that sometimes Mesa (and I suppose a VS could as well) emits a program which references no vertex data, and thus we end up with nr_enabled == 0 even though some VBs are enabled. We'd end up emitting VB/VE packet headers of 0xffffffff in that case, leading to GPU hangs. Bug #22945 (wine with an uncompiled VS)
* i965: Calculate enabled[] and nr_enabled once and re-use the values.Eric Anholt2009-08-032-29/+18
| | | | The code duplication bothered me.
* typo fixRobert Ellison2009-08-031-1/+1
| | | | somehow, this change was missed on the last checkin
* mesa: fix up some GLAPI XMLRobert Ellison2009-08-033-38/+100
| | | | | | | | | | - Added specifications for the extensions GL_APPLE_flush_buffer_range and GL_APPLE_texture_range - EXT_framebuffer_object.xml strangely held specifications for both the GL_EXT_framebuffer_object extension and the GL_EXT_texture_array extension. Split out the GL_EXT_texture_array data into its own file.
* radeon: more fixes for compressed texturesRoland Scheidegger2009-08-042-11/+30
| | | | | | | | | | | | | | | | - fix not respecting required hardware stride with compressedTexImage - this fixes #22615. - make sure correct stride is used in various places - fix stored miptree never matching with a TexImage call with compressed texture - don't always store data with compressedtexsubimage at offset 0, and actually use the supplied pixel data... (untested) - make sure rows for compressed texture handling are rounded up not down Note that trying to access stored compressed textures in hardware miptrees from core mesa (get_compressed_teximage, swrast fallbacks) can't work correctly, since RowStride isn't really set to anything useful, plus some places (at least get_compressed_teximage) assume this data has native stride and no padding.
* radeon: Fix inverted test for disabling flushing of front buffer output.Eric Anholt2009-08-031-1/+1
| | | | (corresponding fix to the intel driver one)
* intel: Fix inverted test for disabling flushing of front buffer output.Eric Anholt2009-08-031-1/+1
| | | | | | | | The comment disagreed with the code, and nicely drew my eyes to what was going wrong. Bug #21774 (blender) Bug #21788 (readpix)
* intel: Wait on the last swapbuffers to complete before queuing a new one.Eric Anholt2009-08-033-0/+28
| | | | | | | | | | | This fixes jerkiness in doom3 and other apps since the kernel change to throttle less absurdly, which led to a thundering herd of frames. Because this is a rather minimal fix, there is at least one downside: If the whole scene completes in one batchbuffer, we'll end up stalling the GPU. Thanks to Michel Dänzer for suggesting using glFlush to signal frame end instead of going to all the effort of adding a new DRI2 extension.
* r600: add some new r7xx pci idsAlex Deucher2009-08-032-0/+10
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* texenv: Use VP->Current, since _Current isn't updated at this point.Eric Anholt2009-08-031-1/+1
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* texenv: Match state.c in deciding whether we'll be using a vertex shader.Eric Anholt2009-08-031-0/+1
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* texenv: Add missing dependency on VP changes.Eric Anholt2009-08-031-1/+2
| | | | | Funny thing is I annotated this dependency in e5f63c403b767f9974e8eb5d412c012b8a69287f, but didn't actually use it.
* egl_softpipe: Add support for pbuffer surface.Chia-I Wu2009-08-031-7/+96
| | | | Signed-off-by: Chia-I Wu <[email protected]>
* egl: Correct the default values of surface attributes.Chia-I Wu2009-08-031-1/+2
| | | | | | | EGL_TEXTURE_FORMAT and EGL_TEXTURE_TARGET should default to EGL_NO_TEXTURE. Signed-off-by: Chia-I Wu <[email protected]>
* egl: Make eglMakeCurrent more robust.Chia-I Wu2009-08-031-52/+46
| | | | | | | | | | Now that a current surface points back to its binding context, and a current context points back to its binding thread, make sure there is no dangling pointers. This commit reworks eglMakeCurrent, adds more checks to avoid stealing context or surfaces from another thread, and correctly destroys unlinked context and surfaces. Signed-off-by: Chia-I Wu <[email protected]>
* egl: Replace IsBound by a pointer to the binding.Chia-I Wu2009-08-0312-27/+49
| | | | | | | | | IsBound tells if a context or surface is current. What it does not tell is, to which thread a context is current, or to which context a surface is current. This commit replaces IsBound by a pointer to the binding thread or context. Signed-off-by: Chia-I Wu <[email protected]>
* tgsi: report opcode name in addition to the number when translation failsBrian Paul2009-08-032-3/+9
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