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* vk/0.210.0: Switch to the new VKAPI function decorationsJason Ekstrand2015-11-306-59/+27
| | | | While we're at it, we do a bunch of the VkResult -> void updates
* vk/0.210.0: Rename CmdBuffer to CommandBufferJason Ekstrand2015-11-3011-165/+165
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* vk/0.210.0: A pile of minor enum updatesJason Ekstrand2015-11-309-40/+26
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* vk/0.210.0: Switch to the new-style handle declarationsJason Ekstrand2015-11-305-8/+8
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* vk: Fix 3DSTATE_WM_DEPTH_STENCIL for gen8Kristian Høgsberg Kristensen2015-11-263-6/+14
| | | | | | | | | This packet is a different size on gen8 and we hit an assertion when we try to merge a gen9 size dword array from the pipeline with the gen8 sized array we create from dynamic state. Use a static assert in the merge macro and fix this issue by using different wm_depth_stencil arrays on gen8 and gen9.
* vk: Add SKL supportKristian Høgsberg Kristensen2015-11-2510-172/+366
| | | | Signed-off-by: Kristian Høgsberg Kristensen <[email protected]>
* vk: Make entrypoint generator output gen9 entry pointsKristian Høgsberg Kristensen2015-11-251-1/+6
| | | | Signed-off-by: Kristian Høgsberg Kristensen <[email protected]>
* vk: Add GEN9 pack headerKristian Høgsberg Kristensen2015-11-251-0/+9767
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* vk: Move all gen8 files to gen8 libKristian Høgsberg Kristensen2015-11-251-5/+5
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* Merge remote-tracking branch 'mesa-public/master' into vulkanJason Ekstrand2015-11-23319-6167/+13179
|\ | | | | | | This pulls in nir cloning and some much-needed upstream refactors.
| * i965: Use NIR for lowering texture swizzleJason Ekstrand2015-11-236-196/+44
| | | | | | | | | | | | | | | | | | | | Now that nir_lower_tex can do texture swizzle lowering, we can use that instead of repeating more-or-less the same code in both backends. This both allows us to share code and means that things like the tg4 work-arounds are somewhat simpler because they don't have to take the swizzle into account. Reviewed-by: Connor Abbott <[email protected]>
| * nir/lower_tex: Add support for lowering texture swizzleJason Ekstrand2015-11-232-0/+80
| | | | | | | | Reviewed-by: Connor Abbott <[email protected]>
| * nir: Add a tex_instr_is_query helperJason Ekstrand2015-11-231-0/+25
| | | | | | | | Reviewed-by: Connor Abbott <[email protected]>
| * nir: Add a ssa_def_rewrite_uses_after helperJason Ekstrand2015-11-232-0/+51
| | | | | | | | Reviewed-by: Connor Abbott <[email protected]>
| * nir: Use instr/if_rewrite in nir_ssa_def_rewrite_usesJason Ekstrand2015-11-231-12/+4
| | | | | | | | | | | | | | nir_ssa_def_rewrite_uses is one of the older helpers in NIR and predated both of those. Now it can be substantially simplified. Reviewed-by: Connor Abbott <[email protected]>
| * nir/validate: Validated dests after sourcesJason Ekstrand2015-11-231-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | Previously, if someone accidentally made an instruction that refers to its own SSA destination, the validator wouldn't catch it. The reason for this is that it validated the destination too early and, by the time it got to the source, the destination SSA value was already added to the set of seen SSA values so it would assume that it came from some previous instruction. By moving destination validation to be after source validation, the SSA value is not in the list of seen values and the validator will catch self-referential instructions. Reviewed-by: Connor Abbott <[email protected]>
| * i965: Use nir_lower_tex for texture coordinate loweringJason Ekstrand2015-11-238-131/+42
| | | | | | | | | | | | | | | | | | | | Previously, we had a rescale_texcoords helper in the FS backend for handling rescaling of texture coordinates. Now that we can do variants in NIR, we can use nir_lower_tex to do the rescaling for us. This allows us to delete the i965-specific code and gives us proper TEXTURE_RECTANGLE and GL_CLAMP handling in vertex and geometry shaders. Reviewed-by: Kenneth Graunke <[email protected]>
| * i965/fs: Stomp the texture return type to UINT32 for resinfo messagesJason Ekstrand2015-11-231-0/+11
| | | | | | | | Reviewed-by: Kenneth Graunke <[email protected]>
| * nir/lower_tex: Set the dest_type for txs instructionsJason Ekstrand2015-11-231-0/+1
| | | | | | | | Reviewed-by: Iago Toral Quiroga <[email protected]>
| * nir/lower_tex: Report progressJason Ekstrand2015-11-233-6/+17
| | | | | | | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
| * i965: Move postprocess_nir to codegen timeJason Ekstrand2015-11-234-5/+20
| | | | | | | | | | | | | | | | | | This allows us to insert NIR passes between initial NIR compilation and optimization (link time) and actual backend code-gen. In particular, it will allow us to do shader variants in NIR and share some of that shader variant code between backends. Reviewed-by: Iago Toral Quiroga <[email protected]>
| * i965/nir: Split shader optimization and lowering into three stagesJason Ekstrand2015-11-232-38/+104
| | | | | | | | | | | | | | | | | | At the moment, brw_create_nir just calls the three stages in sequence so there's not much difference. Soon, however, we will want to start doing variants in NIR at which point the postprocessing step will have to move from shader create time to codegen time. Reviewed-by: Iago Toral Quiroga <[email protected]>
| * i965: Use ull immediates in brw_inst_bitsJason Ekstrand2015-11-231-2/+2
| | | | | | | | | | | | | | | | This fixes a regression introduced in b1a83b5d1 that caused basically all shaders to fail to compile on 32-bit platforms. Reported-by: Mark Janes <[email protected]> Reviewed-by: Matt Turner <[email protected]>
| * svga: Add ASTC formats to format table.Jose Fonseca2015-11-231-0/+28
| | | | | | | | | | | | Fixes build. Otherwise untested. Trivial.
| * freedreno/ir3: add support for a few gs5 opsIlia Mirkin2015-11-231-0/+27
| | | | | | | | | | | | | | Tested on a4xx. This is part of the builtins added by ARB_gpu_shader5 and GLSL ES 3.10. Signed-off-by: Ilia Mirkin <[email protected]>
| * ttn: fix UMSB conversionIlia Mirkin2015-11-231-1/+1
| | | | | | | | Signed-off-by: Ilia Mirkin <[email protected]>
| * freedreno/a4xx: add ARB_texture_query_lod supportIlia Mirkin2015-11-232-6/+20
| | | | | | | | Signed-off-by: Ilia Mirkin <[email protected]>
| * ttn: add LODQ supportIlia Mirkin2015-11-231-2/+9
| | | | | | | | Signed-off-by: Ilia Mirkin <[email protected]>
| * freedreno/a4xx: re-emit program on dirty framebufferIlia Mirkin2015-11-231-1/+1
| | | | | | | | | | | | | | The program emit depends on certain fb details. Make sure those get updated when the fb changes. Signed-off-by: Ilia Mirkin <[email protected]>
| * freedreno/a4xx: use a factor of 32767 for snorm8 blendingIlia Mirkin2015-11-231-5/+34
| | | | | | | | | | | | | | | | | | | | | | | | It appears that the hardware wants the integer to be scaled the same way that the hardware representation is. snorm16 uses one of the float factors, so this is only relevant for snorm8. This fixes a number of subcases of bin/fbo-blending-formats GL_EXT_texture_snorm Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
| * freedreno/a4xx: only compute texture offset once for the viewIlia Mirkin2015-11-233-13/+6
| | | | | | | | Signed-off-by: Ilia Mirkin <[email protected]>
| * freedreno/a4xx: add ARB_texture_view supportIlia Mirkin2015-11-233-8/+10
| | | | | | | | Signed-off-by: Ilia Mirkin <[email protected]>
| * freedreno/a4xx: add formats for ARB_texture_buffer_object_rgb32 supportIlia Mirkin2015-11-233-3/+9
| | | | | | | | Signed-off-by: Ilia Mirkin <[email protected]>
| * freedreno/a4xx: add ARB_texture_rgb10_a2ui supportIlia Mirkin2015-11-232-2/+3
| | | | | | | | Signed-off-by: Ilia Mirkin <[email protected]>
| * freedreno/a4xx: add astc formatsIlia Mirkin2015-11-232-1/+39
| | | | | | | | Signed-off-by: Ilia Mirkin <[email protected]>
| * st/mesa: add astc supportIlia Mirkin2015-11-232-1/+262
| | | | | | | | | | | | | | | | | | | | This doesn't account for the ldr/hdr distinction... that will probably have to be exposed via a separate cap. When relevant hardware appears, this can be worked out. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
| * gallium: add ASTC formatsIlia Mirkin2015-11-235-3/+126
| | | | | | | | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
| * gallium/util: remove the fake format helpers for bptc and etc2Ilia Mirkin2015-11-234-108/+7
| | | | | | | | | | | | | | | | | | | | This was a silly hack that kept growing and growing. Instead, just write NULLs for those functions. No need to have helpers that just assert(0) when you call them. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
| * freedreno/a4xx: support 16384 texels in buffer textureIlia Mirkin2015-11-232-5/+4
| | | | | | | | | | | | Looks like the width field's bitmask was off-by-one. Signed-off-by: Ilia Mirkin <[email protected]>
| * freedreno/a4xx: add ARB_texture_buffer_range supportIlia Mirkin2015-11-233-15/+41
| | | | | | | | Signed-off-by: Ilia Mirkin <[email protected]>
| * freedreno/a4xx: add polygon mode supportIlia Mirkin2015-11-234-4/+26
| | | | | | | | Signed-off-by: Ilia Mirkin <[email protected]>
| * loader: unconditionally add AM_CPPFLAGS to libloader_la_CPPFLAGSEmil Velikov2015-11-231-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | It seems that due to the conditional autotools is getting confused and forgetting to add AM_CPPFLAGS when building libloader (when HAVE_DRICOMMON is not set). Cc: [email protected] Fixes: 5a79e0a8e37 "automake: loader: rework the CPPFLAGS" Reported-by: Pali Rohár <[email protected]> Tested-by: Pali Rohár <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Matt Turner <[email protected]>
| * pipe-loader: link against libloader regardless of libdrm presenceEmil Velikov2015-11-231-2/+2
| | | | | | | | | | | | | | | | | | | | | | Whether or not the loader has libdrm support is up-to it. Anyone using the loader should just include it whenever they depend on it. Cc: [email protected] Fixes: 0f39f9cb7ad "pipe-loader: add a dummy 'static' pipe-loader" Reported-by: Jon TURNEY <[email protected]> Tested-by: Jon TURNEY <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
| * i965: Handle lum, intensity and missing components in the fast clearNeil Roberts2015-11-231-2/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It looks like the sampler hardware doesn't take into account the surface format when sampling a cleared color after a fast clear has been done. So for example if you clear a GL_RED surface to 1,1,1,1 then the sampling instructions will return 1,1,1,1 instead of 1,0,0,1. This patch makes it override the color that is programmed in the surface state in order to swizzle for luminance and intensity as well as overriding the missing components. Fixes the ext_framebuffer_multisample-fast-clear Piglit test. v2: Handle luminance and intensity formats Reviewed-by: Ben Widawsky <[email protected]>
| * nir: s/nir_type_unsigned/nir_type_uintJason Ekstrand2015-11-239-49/+49
| | | | | | | | | | | | | | | | | | | | | | v2: do the same in tgsi_to_nir (Samuel) v3: added missing cases after rebase (Iago) v4: Add a blank space after '#' in one of the comments (Matt) Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Matt Turner <[email protected]>
| * nir/builder: only read meaningful channels in nir_swizzle()Connor Abbott2015-11-231-1/+1
| | | | | | | | | | | | | | | | | | | | This way the caller doesn't have to initialize all 4 channels when they aren't using them. v2: Fix signed/unsigned comparison warning (Iago) Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Matt Turner <[email protected]>
| * i965/fs: add stride restrictions for copy propagationConnor Abbott2015-11-231-1/+55
| | | | | | | | | | | | | | | | | | | | There are various restrictions on what the hstride can be that depend on the Gen, and now that we're using hstride == 2 for packing/unpacking doubles, we're going to run into these restrictions a lot more often. Pull them out into a separate function, and move the one restriction we checked previously into it. Reviewed-by: Matt Turner <[email protected]>
| * i965/fs: don't propagate cmod when the exec sizes differConnor Abbott2015-11-231-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | This can happen when the source of the compare was split by the SIMD lowering pass. Potentially, we could allow the case where the exec size of scan_inst is larger, and scan_inst has the right quarter selected, but doing that seems a little more risky. v2: Merge the bail condition into the the previous if/break block (Matt) Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Matt Turner <[email protected]>
| * i965/fs: respect force_sechalf/force_writemask_all in CSEConnor Abbott2015-11-231-0/+2
| | | | | | | | | | | | Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
| * i965: fix 64-bit immediates in brw_inst(_set)_bitsConnor Abbott2015-11-231-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If we tried to get/set something that was exactly 64 bits, we would try to do (1 << 64) - 1 to calculate the mask which doesn't give us all 1's like we want. v2 (Iago) - Replace ~0 by ~0ull - Removed unnecessary parenthesis v3 (Kristian) - Avoid the conditional Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
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