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* gallium: expose ARB_map_buffer_alignment on RadeonMarek Olšák2012-10-3114-3/+32
* mesa: implement ARB_map_buffer_alignmentMarek Olšák2012-10-315-1/+16
* st/mesa: don't use _NEW_PROGRAM where ST_NEW_xxx_PROGRAM is sufficientMarek Olšák2012-10-313-6/+6
* r600g: use better sample positions for 8x MSAAMarek Olšák2012-10-312-12/+12
* gallium: add start_slot parameter to set_vertex_buffersMarek Olšák2012-10-3178-435/+612
* st/xorg: Remove superfluous miInitializeBackingStore() callMarvin Schmidt2012-10-301-1/+0
* xlib: Do not undefine _R, _G, and _B.Vinson Lee2012-10-291-3/+0
* mesa: remove array size so the static assert can workBrian Paul2012-10-291-1/+1
* mesa: use GLuint for more gl_constants fieldsBrian Paul2012-10-291-6/+6
* vbo: silence MSVC double/float conversion warningsBrian Paul2012-10-291-2/+2
* mesa: silence some MSVC conversion warnings in get.cBrian Paul2012-10-291-3/+3
* mesa: silence MSVC signed/unsigned comparision warnings in hash_table.cBrian Paul2012-10-291-1/+1
* mesa: silence MSVC signed/unsigned comparision warnings in transformfeedback.cBrian Paul2012-10-291-3/+3
* mesa: silence MSVC signed/unsigned comparision warnings in accum.cBrian Paul2012-10-291-2/+2
* mesa: silence MSVC signed/unsigned comparison warning in texstorage.cBrian Paul2012-10-291-1/+1
* mesa: silence MSVC double/float assignment warnings in pixel unpack codeBrian Paul2012-10-291-4/+4
* r600g: tgsi-to-llvm emits right input intrinsicsVincent Lejeune2012-10-302-20/+64
* intel: support for 16 bit config with 24 depth and 8 stencilTapani Pälli2012-10-291-2/+7
* dri: Support MESA_FORMAT_SARGB8 in driCreateConfigsIan Romanick2012-10-291-1/+2
* intel: If the visual is sRGB, use an sRGB internal formatIan Romanick2012-10-291-0/+2
* dri: Convert driCreateConfigs to use a gl_format enumIan Romanick2012-10-297-156/+77
* dri_util: Elminiate the bytes_per_pixel tableIan Romanick2012-10-291-9/+3
* dri_util: Remove support for RGB332 framebuffersIan Romanick2012-10-291-27/+7
* swrast: Remove the 2_3_3_REV framebuffer formatIan Romanick2012-10-291-4/+0
* glx: Add the extension string for GLX_ARB_framebuffer_sRGBIan Romanick2012-10-292-0/+6
* glx: Set sRGBCapable to a default valueIan Romanick2012-10-291-0/+2
* glsl_to_tgsi: set correct register type for array and structure elementsBryan Cain2012-10-291-2/+19
* r600g: implement texturing with 8x MSAA compressed surfaces for EvergreenMarek Olšák2012-10-2913-37/+270
* mesa: bump MAX_VARYING to 32Marek Olšák2012-10-295-7/+39
* Revert "glsl_to_tgsi: set correct register type for array and structure eleme...Andreas Boll2012-10-291-19/+2
* nv50/ir: restore use of long immediate encodingsChristoph Bumiller2012-10-282-0/+9
* nv50,nvc0: fix 2d engine stencil-only copiesChristoph Bumiller2012-10-284-22/+48
* gallium/gallivm: code generation options for LLVM 3.1+Alexander V. Nikolaev2012-10-283-17/+44
* i965: Merge brw_prepare_query_begin() and brw_emit_query_begin().Eric Anholt2012-10-263-22/+7
* i965: Rename misleading "active" field of brw->query.Eric Anholt2012-10-262-5/+5
* r600g: advertise 32 streamout vec4 outputsMarek Olšák2012-10-261-1/+1
* softpipe: remove extraneous whitespaceBrian Paul2012-10-261-2/+0
* gallivm/llvmpipe: fix 64-bit %ll format compiler warnings for mingw32Brian Paul2012-10-262-8/+10
* r600g: advertise 32 fragment shaders inputs, not 34Marek Olšák2012-10-261-4/+1
* graw/fs-test: Use user constant buffers.José Fonseca2012-10-261-56/+14
* trace: Flush before drawing.José Fonseca2012-10-263-0/+11
* graw: Ensure new members are zeroed.José Fonseca2012-10-2615-0/+19
* tests/graw: Update occlusion query example.José Fonseca2012-10-261-4/+4
* radeonsi: Handle TGSI_SEMANTIC_FACE.Michel Dänzer2012-10-262-1/+31
* radeonsi: Handle TGSI_SEMANTIC_BCOLOR.Michel Dänzer2012-10-265-15/+75
* radeonsi: Don't snoop context state while building shaders.Michel Dänzer2012-10-263-17/+27
* radeon/llvm: Add intrinsic for reading SI FRONT_FACE VGPR in the pixel shader.Michel Dänzer2012-10-262-0/+6
* r600g: split cayman common state out into a shared functionAlex Deucher2012-10-263-16/+35
* r600g: emit some additional regs on caymanAlex Deucher2012-10-261-0/+54
* r600g: there are 16 const buffer size regs for each shader stageAlex Deucher2012-10-261-2/+19
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