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* virgl: add resource_reference to virgl_winsysChia-I Wu2019-06-174-32/+21
| | | | | | | | It works similar to pipe_resource_reference but is for virgl_hw_res. It can also replace resource_unref. Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Alexandros Frantzis <[email protected]>
* panfrost/midgard: Add rounding mode specific opcodesAlyssa Rosenzweig2019-06-173-20/+49
| | | | | | | This adds a set of opcodes for performing moves and type conversions with respect to particular rounding modes, required for OpenCL. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Drop draws with complete scissorAlyssa Rosenzweig2019-06-172-4/+20
| | | | | | | | The hardware support for scissoring requires minimally 1 pixel to be drawn. If the scissor culls *everything*, we need to drop the draw entirely early on. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Disable pipelining temporarilyAlyssa Rosenzweig2019-06-171-2/+4
| | | | | | | | Pipelined rendering is important for performance but is not working right these days. Disable it for correctness until the panfrost_job refactor is enabled and we can do it right. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/mfbd: Handle rendering to linear mipmapAlyssa Rosenzweig2019-06-171-4/+18
| | | | | | | In anticipation of more general mipmapping support, we implemented support for rendering to linear mipmaps (a very simple case). Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Implement sampling from non-zero initial levelsAlyssa Rosenzweig2019-06-171-15/+14
| | | | | | | | In preparation for more complex mipmap operations. glGenerateMipmap() in particular, as implemented by u_blitter, requires reading from non-zero initial mip levels. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Resource management for linear 2D texture arraysAlyssa Rosenzweig2019-06-171-1/+2
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Adjust swizzles for 2D arraysAlyssa Rosenzweig2019-06-171-0/+10
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Set array_size to permit array texturesAlyssa Rosenzweig2019-06-171-0/+11
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Decode array texturesAlyssa Rosenzweig2019-06-172-4/+5
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Implement 3D texture resource managementAlyssa Rosenzweig2019-06-171-5/+45
| | | | | | Passes dEQP-GLES3.functional.texture.format.unsized.*3d* Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Specify 3D in texture descriptorAlyssa Rosenzweig2019-06-172-1/+4
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Fix 3D texture masks/swizzlesAlyssa Rosenzweig2019-06-171-3/+8
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Add swizzle_of/mask_of helpersAlyssa Rosenzweig2019-06-171-6/+30
| | | | | | These make manipulating vectors in the Midgard compiler easier. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Enable helper invocations when texturingAlyssa Rosenzweig2019-06-174-76/+25
| | | | | | | | | | | | | | | | | | | it turns out we have explicit control over helper invocations; if a particular bit in the fragment shader descriptor is set, helper invocations are launched; if it clear, they are not. Helper invocations are required whenever computing derivatives, whether explicitly (dFdx/dFdy) *or* implicitly (any texturing). Accordingly, we set this bit when texturing to fix edge case behaviour (literally, haha). Thank you to Jason Ekstrand and Ilia Mirkin for pointing out the representative dEQP test failed along triangle edges and for suggesting helper invocations / derivatives as a list of suspect pieces (which led to discovering the helper invocations enable bit in the first place). Ideally we would use the new NIR analysis pass for this, but that hasn't landed quite yet. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Handle missing texture caseAlyssa Rosenzweig2019-06-171-18/+29
| | | | | | | In some cases, Gallium can give us bad info about the texture count, counting some NULL textures. We pass Gallium's info to the hardware blindly, which can confuse the hardware in edge cases. This patch adjusts accordingly.
* panfrost: Remove forced flush on clearsAlyssa Rosenzweig2019-06-171-4/+0
| | | | | | | This worked around a bug in oooold versions of Panfrost. Nowadays, its presence is, at best, *creating* bugs. Let's wack it. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Flush scanout tooAlyssa Rosenzweig2019-06-171-3/+6
| | | | | | | | | In a poorly coded app, the framebuffer can be partially drawn, an FBO switched, switch back to the framebuffer and keep drawing, etc. Reordering would fix this, but for now we need to just be careful about flushing scanout too. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Improve viewport (clipping) robustnessAlyssa Rosenzweig2019-06-171-6/+35
| | | | | | | | On more complex apps (possibly using desktop GL specific extensions?), our viewport code was getting wacky results for unclear reasons. Let's be a little less wacky. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Disable the tiler for clear-only jobsAlyssa Rosenzweig2019-06-176-37/+50
| | | | | | | | | To do so, we route some basic information through to the FBD creation routines (currently just a binary toggle of "has draws?"). Eventually, more refactoring will enable dynamic hierarchy mask selection, but right now we do the most basic. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Identify and decode mfbd_flagsAlyssa Rosenzweig2019-06-173-10/+22
| | | | | | Previously known as the unk3 field. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Stub out hierarchy mask selectionAlyssa Rosenzweig2019-06-171-0/+21
| | | | | | | Quite a bit of refactoring in the main driver will be necessary to make use of this effectively, so the implementation is incomplete. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Rename misc_0 -> tiler_polygon_listAlyssa Rosenzweig2019-06-173-10/+9
| | | | | | Just for readability. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Sanity check tiler polygon list sizeAlyssa Rosenzweig2019-06-171-0/+5
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Compute and use polygon list body sizeAlyssa Rosenzweig2019-06-172-1/+20
| | | | | | This is a bit of a hack, but it gets the point across. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Use polygon list header size computationAlyssa Rosenzweig2019-06-171-5/+16
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Calculate polygon list header sizeAlyssa Rosenzweig2019-06-172-1/+107
| | | | | | | | As per the notes at the beginning of pan_tiler.c, we implement a routine to calculate the size of the polygon list header given the framebuffer dimensions and the provided hierarchy mask. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Add pan_tiler.h headerAlyssa Rosenzweig2019-06-171-0/+44
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Document tile size heuristicAlyssa Rosenzweig2019-06-171-0/+65
| | | | | | | | I'm not sure how the blob does it, but this seems to be a dead simple test and roughly corresponds to what I've noticed from the blob, so maybe it's good enough. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Rename tiler fields per tiler researchAlyssa Rosenzweig2019-06-173-60/+54
| | | | | | | | | | | | | Following the research into Midgard's hierarchical tiling infrastructure, we now understand (in broad stokes) the purpose of each tiler field in the MFBD. Additionally, we understand more of the tiling fields in the SFBD and in Bifrost's structures, although this knowledge is still incomplete. Update the names, decoder, and comments to reflect this new understanding. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Add notes about the tiler allocationsAlyssa Rosenzweig2019-06-171-0/+86
| | | | | | | This explains how the polygon list is allocated, updating the headers appropiately to sync the terminology. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Integrate kernel names for tiler FBDAlyssa Rosenzweig2019-06-173-48/+66
| | | | | | | | | These names are from the replay workaround in kbase; they begin to shine some light on the meaning of these fields. In particular, we now understand why the "tiler_meta" field has the effect it does on performance in certain scenes (controlling tile granularity). Signed-off-by: Alyssa Rosenzweig <[email protected]>
* radv: Add asserts that buffer descriptors are created with valid buffer formats.Bas Nieuwenhuizen2019-06-171-0/+3
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Decompress DCC when the image format is not allowed for buffers.Bas Nieuwenhuizen2019-06-173-2/+40
| | | | | | | | | | Otherwise the buffer loads/stores in the bufimage meta operations fail. If we decompress DCC then we can use the "canonical" format compatible with the not-supported format. CC: <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: make sure to init the DCC decompress compute path stateSamuel Pitoiset2019-06-171-0/+8
| | | | | | | | | This fixes a segfault when forcing DCC decompressions on compute because internal meta objects are not created since the on-demand stuff. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-By: Bas Nieuwenhuizen <[email protected]>
* ac: make ac_compute_cmask() a static functionSamuel Pitoiset2019-06-172-7/+3
| | | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-By: Bas Nieuwenhuizen <[email protected]>
* radv: rely on ac_compute_cmask() for CMASK infoSamuel Pitoiset2019-06-171-42/+3
| | | | | | | | | Instead of re-computing in the driver. The 3d and cube flags are correctly set, so the same values should returned by ac_compute_surface(). Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-By: Bas Nieuwenhuizen <[email protected]>
* radv: silent a compiler warning in radv_CmdPushDescriptorSetKHR()Samuel Pitoiset2019-06-171-1/+1
| | | | | | Trivial. Signed-off-by: Samuel Pitoiset <[email protected]>
* panfrost: ci: Speed things up a bit by skipping a git cloneTomeu Vizoso2019-06-171-2/+5
| | | | Signed-off-by: Tomeu Vizoso <[email protected]>
* panfrost: ci: Exclude all blend tests from resultsTomeu Vizoso2019-06-171-41/+3
| | | | | | As they randomly fail on T760. Signed-off-by: Tomeu Vizoso <[email protected]>
* ac: update llvm.amdgcn.icmp intrinsic name for LLVM 9+Samuel Pitoiset2019-06-171-3/+4
| | | | | | | | LLVM r363339 changed llvm.amdgcn.icmp.i* to llvm.amdgcn.icmp.i64.i*. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-By: Bas Nieuwenhuizen <[email protected]>
* lima: lower fmod in ppir and gpirErico Nunes2019-06-161-0/+2
| | | | | | | | | | | | Since commit 4f3c82c72c5 fmod is no longer being lowered in nir, and ends up crashing lima programs with "unsupported nir_op: fmod" in both ppir and gpir. There seems to be no mod operation in hardware in utgard and there is an optimization in nir to lower fmod to instructions that lima already implements, so let's use that. Signed-off-by: Erico Nunes <[email protected]> Reviewed-by: Qiang Yu <[email protected]>
* freedreno/a6xx: re-enable UBWC for depth/stencilRob Clark2019-06-151-0/+2
| | | | | | | | Now that we can blit depth/stencil in a way that plays nicely with UBWC, re-enable it. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]>
* freedreno/a6xx: handle z24s8/z24x8 blits with u_blitterRob Clark2019-06-152-25/+11
| | | | | | | | | | Now that it can turn these blits into rendering to RB6_Z24_UNORM_S8_UINT it can properly handle cases where only one of depth+stencil is being blit. And this avoids lying about he format, which completely doesn't work when UBWC is used. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]>
* freedreno/a6xx: handle fallback for rewritten blits ourselfRob Clark2019-06-151-11/+37
| | | | | | | | | For re-written z/s blits, we want to use the re-written `pipe_blit_info` even if we have to fallback to 3d pipe (`u_blitter`). So handle that fallback ourself. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]>
* freedreno/a6xx: rename variableRob Clark2019-06-151-39/+39
| | | | | | | | | The name 'separate' doesn't make a while lot of sense, as only one of the cases is the blit actually split. But split out from previous patch in an attempt to reduce the noise. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]>
* freedreno/a6xx: consolidate z/s blit handlingRob Clark2019-06-151-67/+46
| | | | | | | This will get even simpler with the next patch Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]>
* gallium: add z24s8_as_r8g8b8a8 formatRob Clark2019-06-153-0/+10
| | | | | | | | | | | | This maps to a special format that recent generations of adreno have, for blitting z24s8. Conceptually it is similar to doing Z and/or S blits by pretending it is r8g8b8a8 (with appropriate writemask). But it differs when bandwidth compression is used, as z24 is a different type from r8g8b8. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]>
* st/mesa: Respect GL_TEXTURE_SRGB_DECODE_EXT in GenerateMipmaps()Kenneth Graunke2019-06-141-0/+3
| | | | | | | | | | | | | | Apparently, we're supposed to look at the texture object's built-in sampler object's sRGB decode setting in order to decide whether to decode/downsample/re-encode, or simply downsample as-is. Previously, we had just respected the pipe_resource's format. Fixes SKQP's Skia_Unit_Tests.SRGBMipMaps test. (This ports commit 337a808062c756b474ee80a9ac04b5a3dbbeb67e from i965 to st/mesa for Gallium drivers.) Reviewed-by: Eric Anholt <[email protected]>
* lima: fix dynarray usage in lima_submit_add_boErico Nunes2019-06-141-1/+1
| | | | | | | | | | Commit de8a919702a refactored dynarray usage and changed the size of the allocation in lima_submit_add_bo. That causes a segfault in programs running with lima. This commit restores the allocation size back to the previous size. Signed-off-by: Erico Nunes <[email protected]> Reviewed-by: Vasily Khoruzhick <[email protected]>
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