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* glsl/standalone: point which arguments are mandatoryAlejandro Piñeiro2018-01-051-1/+4
| | | | | | | Every now and then I execute the standalone compiler, get the non-version error, and need to remember what I'm doing wrong Reviewed-by: Ian Romanick <[email protected]>
* ac: rework ac_llvm_extract_elem()Timothy Arceri2018-01-051-3/+3
| | | | | | | Simplifies the logic a little and asserts index is 0. Suggested-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* st/glsl_to_nir/radeonsi: enable tessellation shadersTimothy Arceri2018-01-052-1/+5
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/tgsi: add patch support to tgsi_get_gl_varying_semantic()Timothy Arceri2018-01-051-3/+8
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: add dummy implementation of si_nir_scan_tess_ctrl()Timothy Arceri2018-01-053-0/+23
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac/radeonsi: add load_tess_coord() to the abiTimothy Arceri2018-01-053-24/+42
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: make si_llvm_emit_tcs_epilogue compatible with emit_outputs abiTimothy Arceri2018-01-051-3/+7
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: gather tess propertiesTimothy Arceri2018-01-051-0/+29
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac/radeonsi: add tcs_rel_ids to the abiTimothy Arceri2018-01-054-18/+18
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: add unpack_llvm_param() helperTimothy Arceri2018-01-051-6/+12
| | | | | | | | This allows us to pass the llvm param directly rather than looking it up. Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac: add {tcs,tes}_patch_id to the abiTimothy Arceri2018-01-054-19/+16
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: add nir support for tcs outputsTimothy Arceri2018-01-051-0/+118
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac: move some helpers to ac_llvm_build.cTimothy Arceri2018-01-053-40/+50
| | | | | | | We will call these from the radeonsi NIR backend. Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac: add store_tcs_outputs() to the abiTimothy Arceri2018-01-052-24/+51
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: add si_nir_load_input_tcs()Timothy Arceri2018-01-051-0/+45
| | | | | | V2: drop type param and just use ctx->i32 Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: add get_dw_address_from_generic_indices() helperTimothy Arceri2018-01-051-30/+46
| | | | | | | This will be used by both the tgsi and nir backends. Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac: call load_tcs_input() via the abiTimothy Arceri2018-01-051-19/+17
| | | | | | | | This also enables some code sharing with tes. V2: drop type param and just use ctx->i32 Reviewed-by: Marek Olšák <[email protected]>
* ac: add load_tes_inputs() to the abiTimothy Arceri2018-01-053-22/+52
| | | | | | V2: drop type param and just use ctx->i32 Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: add si_nir_load_input_tes()Timothy Arceri2018-01-052-0/+59
| | | | | | V2: drop type param and just use ctx->i32 Reviewed-by: Marek Olšák <[email protected]>
* swr/rast: fix invalid sign masks in avx512 simdlib codeTim Rowley2018-01-043-3/+3
| | | | | | | Should be 0x80000000 instead of 0x8000000. Cc: [email protected] Reviewed-by: Bruce Cherniak <[email protected]>
* radv: Use correct flush bits for flushing L2 during CB/DB flushes.Bas Nieuwenhuizen2018-01-041-13/+16
| | | | | | | | | | | | Copied from radeonsi. Putting in the correct metadata flush commands for eventually not flushing L2 on CB/DB switch. Does not remove the need for V_028A90_CACHE_FLUSH_AND_INV_TS_EVENT at the moment. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Invalidate L1 for VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT.Bas Nieuwenhuizen2018-01-041-1/+1
| | | | | | | These are just shaders reads, so we need to invalidate L1. Fixes: 6dbb0eaccc "radv: handle subpass cache flushes" Reviewed-by: Samuel Pitoiset <[email protected]>
* radv/gfx9: reduce the number of input VGPRs for the GS stageSamuel Pitoiset2018-01-041-1/+14
| | | | | | | This can still be improved, but let's start with this. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: scan if gl_PrimitiveID is used before translating to LLVMSamuel Pitoiset2018-01-045-10/+7
| | | | | | | | | It makes more sense to move all scan stuff in the same place. Also, we don't really need to duplicate the uses_primid field for each stages. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* amd/common: scan if gl_InvocationID is usedSamuel Pitoiset2018-01-042-0/+4
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* egl/android: Fix build break with dri2_initialize_android _EGLDisplay parameterRob Herring2018-01-041-15/+15
| | | | | | | | | | | | | | | | Commit 2f421651aca9 ("egl: let each platform decided how to handle LIBGL_ALWAYS_SOFTWARE") broke the build due to copy-n-paste of misnamed function parameter.: src/egl/drivers/dri2/platform_android.c:1183:8: error: use of undeclared identifier 'disp' Rather than just fixing 'disp', rename the function parameter 'dpy' to 'disp' to align with the other EGL platforms' implementations. Fixes: 2f421651aca9 ("egl: let each platform decided how to handle LIBGL_ALWAYS_SOFTWARE") Reviewed-by: Tapani Pälli <[email protected]> Acked-by: Eric Engestrom <[email protected]> Signed-off-by: Rob Herring <[email protected]>
* anv: Add missing unlock in anv_scratch_pool_allocAlex Smith2018-01-041-1/+3
| | | | | | | | | Fixes hangs seen due to the lock not being released here. Signed-off-by: Alex Smith <[email protected]> Cc: [email protected] Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* mesa/bindless: fix missing image _Layer initializationIlia Mirkin2018-01-041-0/+1
| | | | | | | | | | | Some later code relies on _Layer to set first/last_layer. Make sure it's always initialized. Detected by valgrind's conditional jump/move with uninit value logic. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi: fix alpha-to-coverage if color writes are disabledJózef Kucia2018-01-041-0/+3
| | | | | | | | If alpha-to-coverage is enabled, we have to compute alpha even if color writes are disabled. Signed-off-by: Józef Kucia <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* ac: rename has_sync_file to has_fence_to_handle.Bas Nieuwenhuizen2018-01-044-6/+6
| | | | | | | | | | | sync_files are in linux since 4.7, while the amdgpu fence_to_handle ioctl is only in 4.15. In particular we don't need it for sync_file in radv, because everything happens via syncobjs, which got support earlier than fence_to_handle. Reviewed-by: Marek Olšák <[email protected]>
* ac/nir: Handle loading data from compact arrays.Bas Nieuwenhuizen2018-01-041-6/+7
| | | | | Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver" Reviewed-by: Dave Airlie <[email protected]>
* radv: Allow writing 0 scissors.Bas Nieuwenhuizen2018-01-041-1/+2
| | | | | | | When rasterization is disabled we can have that few. Fixes: 76603aa90b8 "radv: Drop the default viewport when 0 viewports are given." Reviewed-by: Dave Airlie <[email protected]>
* radv: Use correct HTILE expanded words.Bas Nieuwenhuizen2018-01-041-2/+4
| | | | | | | | | | | Seems like users are actually hitting 0xFFFFFFFF actually making things broken for them, and the mad max regression is fixed, so lets put this in once more. v2: Use 0xf for depth-only htile. (Dave) Fixes: af2844116fd "radv: Revert HTILE reset word to 0xFFFFFFFF." Reviewed-by: Dave Airlie <[email protected]>
* ac: rename has_syncobj_wait -> has_syncobj_wait_for_submitMarek Olšák2018-01-044-7/+7
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* braodcom/vc5: Fix internal type/bpp for RGB10_A2UI images.Eric Anholt2018-01-031-0/+1
| | | | | I found that we were getting GPU hangs on most tests rendering to them, and the simulator was assertion failing.
* broadcom/vc5: Try to fix up compressed texture load/store.Eric Anholt2018-01-031-2/+15
| | | | | | We were trying to load/store the logical width/height number of compressed blocks. As long as the textures were large, single-level, and the load/store at (0,0), it kind of worked.
* broadcom/vc5: Fix image_h value for CPU-side tiling on miplevels > 1.Eric Anholt2018-01-031-1/+2
| | | | | Fixes overflow that caused failure in dEQP-GLES3.functional.texture.filtering.2d.sizes.128x128_linear.
* broadcom/vc5: Fix discard_if during control flow.Eric Anholt2018-01-031-1/+1
| | | | | | | I want to do the SETMSF.IFA to discard only if execute == 0 and cond, so our dest of the PUSHZ needs to be nonzero if execute or !cond are nonzero. Fixes dEQP-GLES3.functional.shaders.discard.dynamic_loop_dynamic.
* broadcom/vc5: Disable early Z when the stencil func isn't ALWAYS.Eric Anholt2018-01-031-1/+3
| | | | | | | | Apparently the other funcs will have observable differences when early Z is enabled. Fixes (new) simulator assertion failures in dEQP-GLES3.functional.rasterizer_discard.basic.clear_depth.
* broadcom/vc5: Don't emit component 3/4 F16 TLB writes for float/vec2.Eric Anholt2018-01-031-1/+2
| | | | | Fixes a simulator assertion failure on dEQP-GLES3.functional.fragment_out.array.fixed.r8_highp_float.
* nir: Add a helper to get the uvec4 type.Eric Anholt2018-01-032-0/+7
| | | | | | | I needed this in the vc5 compiler. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* broadcom/vc5: Introduce enums for internal depth/type, with V3D prefixes.Eric Anholt2018-01-036-84/+85
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* broadcom/xml: Fix up safe name confusion with prefixing.Eric Anholt2018-01-031-14/+13
| | | | | | | For enums we were doubling the underscore if the value had a numeric first character of its name (which safe_name() adds an underscore to). A little helper function cleans up the other instance of prefixing while also fixing this.
* broadcom/vc5: Turn the decimate mode field into an enum in the XML.Eric Anholt2018-01-031-1/+8
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* broadcom/vc5: Turn the output image format into an enum.Eric Anholt2018-01-032-96/+100
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* broadcom/vc5: Turn the CLE XML's memory format into an enum.Eric Anholt2018-01-031-16/+11
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* broadcom/vc5: Emit flat shade flags for varying components > 24.Eric Anholt2018-01-034-12/+52
| | | | | | | | | | This means that with no flatshading we'll emit the single-byte ZERO_ALL_FLAT_SHADE_FLAGS, and otherwise emit a set of FLAT_SHADE_FLAGS to get all the bits we need set. There's a _SET enum in the packet we could use to possibly set entire ranges of the bitfield without using another packet, but this at least fixes the conformance failure.
* broadcom/vc5: Emit proper flatshading code for glShadeModel(GL_FLAT).Eric Anholt2018-01-036-37/+17
| | | | | | | | In updating the simulator, behavior changed slightly so that our old code wasn't getting glxgears's flatshading interpolated right. Emit flat shading code just like we would for a normal flat-shaded varying, by passing a flag in the shader key for glShadeModel(GL_FLAT) state and customizing the color inputs based on that.
* braodcom/vc5: Rely on OVRTMUOUT always being set.Eric Anholt2018-01-037-41/+72
| | | | | | | | | | | | | | It seems that the HW team has decided that it's the only supported mode, and it's the mode I actually meant to be using but forgot. Our table of return_32_bit should have matched the default non-OVRTMUOUT behavior, so this change should be invisible. However, the change revealed that some my return_size checks for swizzling were a bit confused in the shadow case, so I had to move them to draw time once we have both the sampler and the view together. Fixes assertion failures in the updated simulator, where the non-OVRTMUOUT support has been removed.
* broadcom/vc5: Move texture return channel setup into the compiler.Eric Anholt2018-01-035-33/+49
| | | | | | | | The compiler decides how many LDTMUs we're going to emit, and that must match the P1 flags. This brings the return channel counting to a single place (so all that's passed into the compiler is "how many return channels you may request from this texture's format), and was a necessary step for shadow samplers once we stop using OVRTMUOUT=0.
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