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* v3d: Add an optimization pass for redundant flags updates.Eric Anholt2019-04-115-0/+143
| | | | | | | | | | | | Our exec masking introduces lots of redundant flags updates, and even without that there will be cases where NIR comparisons on the same sources for different reasons may generate the same comparison instruction before the selection. total instructions in shared programs: 6492930 -> 6460934 (-0.49%) total uniforms in shared programs: 2117460 -> 2115106 (-0.11%) total spills in shared programs: 4983 -> 4987 (0.08%) total fills in shared programs: 6408 -> 6416 (0.12%)
* kmsro: Extend to include armada-drmLubomir Rintel2019-04-113-0/+3
| | | | | | | | | | | | This allows using the Marvell Armada display controllers (with the armada drm modesetting driver) along with the render-only drivers, such as Etnaviv on an OLPC XO-1.75 laptop. v2: - Add to Android.mk too Signed-off-by: Lubomir Rintel <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* lima: implement blit with util_blitterIcenowy Zheng2019-04-113-1/+59
| | | | | | | | As we have already prepared for using util_blitter, use it to implement lima_blit. Signed-off-by: Icenowy Zheng <[email protected]> Reviewed-by: Qiang Yu <[email protected]>
* lima: make lima_context_framebuffer subtype of pipe_framebuffer_stateIcenowy Zheng2019-04-113-30/+29
| | | | | | | | | | | | | | Currently the lima driver saves the framebuffer state in its from-scratch struct lima_context_framebuffer. However, util_blitter requires to save framebuffer with standard struct pipe_framebuffer_state. Make the lima_context_framebuffer a subtype of the standard pipe_framebuffer_state, thus the standard part can be used for util_blitter framebuffer state saving. Signed-off-by: Icenowy Zheng <[email protected]> Reviewed-by: Qiang Yu <[email protected]>
* lima: add dummy set_sample_mask functionIcenowy Zheng2019-04-111-0/+8
| | | | | | | | | The set_sample_mask function is required in util_blitter. Add a dummy one to make util_blitter work. Signed-off-by: Icenowy Zheng <[email protected]> Reviewed-by: Qiang Yu <[email protected]>
* nir: initialise some variables in opt_if_loop_last_continue()Timothy Arceri2019-04-111-2/+2
| | | | | | | | Fixes a couple of Coverity warnings CID 1444626. Fixes: e30804c6024f ("nir/radv: remove restrictions on opt_if_loop_last_continue()") Reviewed-by: Tapani Pälli <[email protected]>
* nir/xfb: do not use bare interface typeJuan A. Suarez Romero2019-04-111-1/+1
| | | | | | | | | | | | | | In commit 3b3653c4cfb we decided not to use bare types; hence do not use bare type when comparing with interface type to find out if the xfb variable is an array block. This fixes dEQP-VK.transform_feedback.* tests. Fixes: 3b3653c4cfb ("nir/spirv: don't use bare types, remove assert in split vars for testing") CC: Dave Airlie <[email protected]> CC: Jason Ekstrand <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* virgl: use debug_printf instead of fprintfErik Faye-Lund2019-04-111-1/+3
| | | | | | | | While we're at it, prefix the string with "VIRGL: ", to match similar code elsewhere in virgl. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* virgl: do not warn about display-target bindingErik Faye-Lund2019-04-111-1/+1
| | | | | | | | We never want to display a transfer-temp surface, so let's ignore that flag when calculating the new binding flags. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* virgl: only warn about unchecked flagsErik Faye-Lund2019-04-111-3/+4
| | | | | | | | The other flags are already vetted, so there's no point in reporting them. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* virgl: unsigned int -> unsignedErik Faye-Lund2019-04-111-1/+1
| | | | | | | We don't usually spell out the int part of unsigned. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* egl: setup fds array correctly when exporting dmabufTapani Pälli2019-04-111-0/+12
| | | | | | | | | For formats with multiple planes, application will pass a num_planes sized fds array which should be initialized properly in case fds amount utilized by the driver is less than the number of planes. Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* gallium/aux: Report error if loading of a pipe driver fails.Jan Vesely2019-04-102-1/+62
| | | | | | Skip over non-existent files. Signed-off-by: Jan Vesely <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* kmsro: Add platform support for exynos and sun4iRob Herring2019-04-113-0/+6
| | | | | | | | | v2: - add Android.mk change Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Rob Herring <[email protected]> Signed-off-by: Qiang Yu <[email protected]>
* kmsro: Add lima renderonly supportRob Herring2019-04-112-0/+14
| | | | | | | | | Enable using lima for KMS renderonly. This still needs KMS driver name mapping to kmsro to be used automatically. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Rob Herring <[email protected]> Signed-off-by: Qiang Yu <[email protected]>
* gallium: add lima driverQiang Yu2019-04-1158-2/+16718
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v2: - use renamed util_dynarray_grow_cap - use DEBUG_GET_ONCE_FLAGS_OPTION for debug flags - remove DRM_FORMAT_MOD_ARM_AGTB_MODE0 usage - compute min/max index in driver v3: - fix plbu framebuffer state calculation - fix color_16pc assemble - use nir_lower_all_source_mods for lowering neg/abs/sat - use float arrary for static GPU data - add disassemble comment for static shader code - use drm_find_modifier v4: - use lima_nir_lower_uniform_to_scalar v5: - remove nir_opt_global_to_local when rebase Cc: Rob Clark <[email protected]> Cc: Alyssa Rosenzweig <[email protected]> Acked-by: Eric Anholt <[email protected]> Signed-off-by: Andreas Baierl <[email protected]> Signed-off-by: Arno Messiaen <[email protected]> Signed-off-by: Connor Abbott <[email protected]> Signed-off-by: Erico Nunes <[email protected]> Signed-off-by: Heiko Stuebner <[email protected]> Signed-off-by: Koen Kooi <[email protected]> Signed-off-by: Marek Vasut <[email protected]> Signed-off-by: marmeladema <[email protected]> Signed-off-by: Paweł Chmiel <[email protected]> Signed-off-by: Rob Herring <[email protected]> Signed-off-by: Rohan Garg <[email protected]> Signed-off-by: Vasily Khoruzhick <[email protected]> Signed-off-by: Qiang Yu <[email protected]>
* gallium/u_vbuf: export u_vbuf_get_minmax_indexQiang Yu2019-04-112-4/+6
| | | | | | | | This helper function can be used by driver which always need min/max index. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Qiang Yu <[email protected]>
* u_dynarray: add util_dynarray_grow_capQiang Yu2019-04-111-6/+17
| | | | | | | | | | | | | This is for the case that user only know a max size it wants to append to the array and enlarge the array capacity before writing into it. v2: - rename newsize to newcap - rename util_dynarray_enlarge to util_dynarray_grow_cap Signed-off-by: Qiang Yu <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* u_math: add ushort_to_float/float_to_ushortQiang Yu2019-04-111-0/+31
| | | | | | | | v2: - return 0 for NaN too Signed-off-by: Qiang Yu <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* gallium: trace: Add missing fence related wrappersGuido Günther2019-04-102-0/+68
| | | | | | | | | | | | | Without that kmscube with GALLIUM_TRACE would segfault like: #0 0x0000000000000000 in () #1 0x0000ffff8f311760 in dri2_create_fence_fd (_ctx=0xaaaae266b8b0, fd=10) at ../src/gallium/state_trackers/dri/dri_helpers.c:122 #2 0x0000ffff90788670 in dri2_create_sync (drv=0xaaaae2667910, disp=0xaaaae26691f0, type=12612, attrib_list=0xaaaae26b9290) at ../src/egl/drivers/dri2/egl_dri2.c:2993 #3 0x0000ffff90776a9c in _eglCreateSync (disp=0xaaaae26691f0, type=12612, attrib_list=0xaaaae26b9290, orig_is_EGLAttrib=0, invalid_type_error=12292) at ../src/egl/main/eglapi.c:1823 #4 0x0000ffff90776be4 in eglCreateSyncKHR (dpy=0xaaaae26691f0, type=12612, int_list=0xfffff662e828) at ../src/egl/main/eglapi.c:1848 Signed-off-by: Guido Günther <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* intel/tools: Remove redundant definitions of INTEL_DEBUGMark Janes2019-04-102-4/+0
| | | | | | INTEL_DEBUG is declared extern and defined in gen_debug.c Reviewed-by: Kenneth Graunke <[email protected]>
* intel/common: move gen_debug to intel/devMark Janes2019-04-1029-29/+29
| | | | | | | | | libintel_common depends on libintel_compiler, but it contains debug functionality that is needed by libintel_compiler. Break the circular dependency by moving gen_debug files to libintel_dev. Suggested-by: Kenneth Graunke <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* iris: support INTEL_NO_HW environment variableMike Blumenkrantz2019-04-103-1/+6
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* Partially revert "gallium: fix autotools build of pipe_msm.la"Jan Vesely2019-04-101-1/+2
| | | | | | | | | | | | This partially reverts commit 356ec7a21960d77db282f67af577dcdb46966b5a. There are symbols needed by libglsl missing, so we might as well skip the entire library. Fixes: 356ec7a21960d77db282f67af577dcdb46966b5a Signed-off-by: Jan Vesely <[email protected]> Acked-by: Dieter Nützel <[email protected]> Tested-by: Dieter Nützel <[email protected]> Tested-by: Vinson Lee <[email protected]>
* vc4: Upload CS/VS UBO uniforms together.Eric Anholt2019-04-105-181/+22
| | | | | | | | | | | | | | | | | Same as I did for V3D, drop all this code trying to GC the non-indirectly-loaded uniforms from the UBO that's used for indirect access of gallium cb[0]. While it does successfully drop some of those, it came at the cost of uploading the VS's indirect unifroms twice, for the bin and render versions of the shader. With the UBO loads simplified, I was also able to easily backport V3D's change to pack a UBO offset into the uniform_data[] field so that we don't need to do the add of the uniform base in the shader. As a bonus, now vc4 doesn't depend on mesa/st type_size functions. total uniforms in shared programs: 25514 -> 25490 (-0.09%) total instructions in shared programs: 77019 -> 76836 (-0.24%)
* vc4: Split UBO0 and UBO1 address uniform handling.Eric Anholt2019-04-103-19/+20
| | | | I'm going to extend how UBO0 works in a moment.
* vc4: Don't forget to set the range when scalarizing our uniforms.Eric Anholt2019-04-101-0/+2
| | | | | | In the next commit, we'll want this for handling UBO access clamping. Reviewed-by: Kenneth Graunke <[email protected]>
* st: Lower uniforms in st in the !PIPE_CAP_PACKED_UNIFORMS case as well.Eric Anholt2019-04-107-19/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | PIPE_CAP_PACKED_UNIFORMS conflates several things: Lowering uniforms i/o at the st level instead of the backend, packing uniforms with no padding at all, and lowering to UBOs. Requiring backends to lower uniforms i/o for !PIPE_CAP_PACKED_UNIFORMS leads to the driver needing to either link against the type size function in mesa/st, or duplicating it in the backend. Given that all backends want this lower-io as far as I can tell, just move it to mesa/st to resolve the link issue and avoid the driver author needing to understand st's uniforms layout. Incidentally, fixes uniform layout failures in nouveau in: dEQP-GLES2.functional.shaders.struct.uniform.sampler_nested_fragment dEQP-GLES2.functional.shaders.struct.uniform.sampler_nested_vertex dEQP-GLES2.functional.shaders.struct.uniform.sampler_array_fragment dEQP-GLES2.functional.shaders.struct.uniform.sampler_array_vertex and I think in Lima as well. v2: fix indents Reviewed-by: Kenneth Graunke <[email protected]>
* anv: don't use default pipeline cache for hits for ↵Lionel Landwerlin2019-04-101-1/+1
| | | | | | | | | | | | | VK_EXT_pipeline_creation_feedback If the user didn't provide a pipeline cache and we're using the default internal pipeline cache, then we shouldn't consider a cache hit for VK_EXT_pipeline_creation_feedback as the application did not provide a cache. Signed-off-by: Lionel Landwerlin <[email protected]> Fixes: 6601e5d6fc68cd ("anv: implement VK_EXT_pipeline_creation_feedback") Reviewed-by: Jason Ekstrand <[email protected]>
* Revert "glsl: fix shader_storage_blocks_write_access for SSBO block arrays"Marek Olšák2019-04-101-6/+2
| | | | | | This reverts commit b7ca074cc0df6101c428b2dfa53a59a0c6620af2. It broke a lot of tests.
* glsl/standalone: add GLES3.1 and GLES3.2 compatibilityKarol Herbst2019-04-101-0/+5
| | | | | | | | | | also set some constants for SSBOs. With that it can compile the shader from: dEQP-GLES31.functional.ssbo.layout.random.all_per_block_buffers.18 Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* virgl: use debug_printf instead of fprintfErik Faye-Lund2019-04-101-1/+1
| | | | | | | | | While we're at it, prefix the string with "VIRGL: ", to match similar code elsewhere in virgl. Fixes: d7b31969767 ("virgl: Return an error if we use fp64 on top of GLES") Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Elie Tournier <[email protected]>
* virgl: Enable passing arrays as input to fragment shadersGert Wollny2019-04-103-7/+64
| | | | | | | | | | | | | | | | | | | This is needed to properly handle interpolateAt* when the input to be interpolated is passed as array in the original GLSL. Currently, the the GLSL compiler would lower selecting the correct input so that the interpolant parameter to interpolateAt* is a temporary, and this can not be used to create a valid shader on the host side, because here the parameter must a shader input. By allowing the passing the created TGSI allows to create proper GLSL. This is related to the virglrenderer bug https://gitlab.freedesktop.org/virgl/virglrenderer/issues/74 v2: Squash the two patches handling these flags into another Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* Gallium: Add new CAP that indicated whether IO array definitions can be shrikedGert Wollny2019-04-103-0/+6
| | | | | | | | | PIPE_CAP_TGSI_SKIP_SHRINK_IO_ARRAYS is added to indicate whether the TGSI pass to shrink IO arrays should be skipped to enforce the originally declared array sizes and locations instead. Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* wsi: allow to override the present mode with MESA_VK_WSI_PRESENT_MODESamuel Pitoiset2019-04-106-3/+78
| | | | | | | This is common to all Vulkan drivers and all WSI. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* radv: enable VK_AMD_gpu_shader_half_floatSamuel Pitoiset2019-04-101-0/+1
| | | | | | | | Should be safe to enable as all instructions seem to support 16-bit. Unfortunately, there is no CTS test. Signed-off-by: Samuel Pitoiset <[email protected]> Acked-by: Bas Nieuwenhuizen <[email protected]>
* ac: add 16-bit support to ac_build_ddxy()Rhys Perry2019-04-101-5/+17
| | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: fix nir_op_b2f16Samuel Pitoiset2019-04-101-3/+9
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* virgl: Set bind when creating temp resource.Lepton Wu2019-04-091-0/+10
| | | | | | | | | virgl render complains about "Illegal resource" when running dEQP-EGL.functional.color_clears.single_context.gles2.rgb888_window, the reason is that a zero bind value was given for temp resource. Signed-off-by: Lepton Wu <[email protected]> Reviewed-by: Erik Faye-Lund <[email protected]>
* radv: Add non-uniform indexing lowering.Bas Nieuwenhuizen2019-04-102-7/+12
| | | | | | | | | This patch does it as late as possible so the potential extra basic blocks don't inhibit other optimizations. Big thanks to Jason for writing the lowering pass. Reviewed-by: Samuel Pitoiset <[email protected]>
* nir: Add access qualifiers on load_ubo intrinsic.Bas Nieuwenhuizen2019-04-102-2/+3
| | | | | | | | | Otherwise nir_lower_non_uniform_access crashes when it tries to get the access of a load_ubo. Fixes: 8ed583fe523 "spirv: Handle the NonUniformEXT decoration" Fixes: e50ab2c0f23 "nir: Add access flags to deref and SSBO atomics" Reviewed-by: Samuel Pitoiset <[email protected]>
* glsl: fix shader_storage_blocks_write_access for SSBO block arraysMarek Olšák2019-04-091-2/+6
| | | | | | | | CTS: GL45-CTS.compute_shader.resources-max Fixes: 4e1e8f684bf "glsl: remember which SSBOs are not read-only and pass it to gallium" Reviewed-by: Timothy Arceri <[email protected]>
* freedreno: PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT unreachable statementKhaled Emara2019-04-091-1/+0
| | | | | | | There seems to be a duplicate return statement, as A2XX doesn't support shader buffers. Reviewed-by: Rob Clark <[email protected]>
* genxml: sort xml files using new scriptLionel Landwerlin2019-04-0910-21155/+21105
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* genxml: add a sorting scriptLionel Landwerlin2019-04-093-0/+203
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* anv: advertise 8 subtexel/mipmap precision bitsJuan A. Suarez Romero2019-04-091-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | So far ANV was advertising 4 bits for both subTexelPrecisionBits and mipmapPrecisionBits. But these values were not actually verified. But it seems the right value is actually 8 bits for both cases. Unfortunately Intel PRM does not clarify how many bits the hardware use. For the mipmap case, there is the following reference in PRM Volume 6 (3D Media GPGPU), specifically in LOD Computation Pseudocode: ``` Bias: S4.8 MinLod: U4.8 MaxLod: U4.8 Base: U4.1 MIPCnt: U4 SurfMinLod: U4.8 ResMinLod: U4.8 `` We have other clues, though: - On one side, dEQP-VK.texture.explicit_lod.* tests fail when using 4 bits, but work when using 8 bits. These tests try to mimic the expected behaviour as much real as possible, and they use the reported subTexelPrecisionBits and mipmapPrecisionBits reported to get this. - On the other side, the equivalent driver for Windows is reporting 8 bits for both elements. Not sure if they got to verify it from the PRM or from a diffent source. CC: Jason Ekstrand <[email protected]> CC: Lionel Landwerlin <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* st/va: reverse qt matrix back to its original orderBoyuan Zhang2019-04-091-6/+32
| | | | | | | | | | | | The quantiser matrix that VAAPI provides has been applied with inverse z-scan. However, what we expect in MPEG2 picture description is the original order. Therefore, we need to reverse it back to its original order. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110257 Cc: [email protected] Signed-off-by: Boyuan Zhang <[email protected]> Acked-by: Alex Deucher <[email protected]>
* glsl/linker: location aliasing requires types to have the same widthAndres Gomez2019-04-091-39/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From the OpenGL 4.60.5 spec, section 4.4.1 Input Layout Qualifiers, Page 67, (Location aliasing): " Further, when location aliasing, the aliases sharing the location must have the same underlying numerical type and bit width (floating-point or integer, 32-bit versus 64-bit, etc.) and the same auxiliary storage and interpolation qualification." Additionally, we have improved the linker error descriptions. Specifically, when taking structs into account we were producing a linker error because we assumed that all components in each location were used and that would cause component aliasing. This is not accurate of the actual problem. Now, the failure specifies that the underlying numerical type incompatibility is the cause for the failure. Fixes the following piglit test: tests/spec/arb_enhanced_layouts/linker/component-layout/vs-to-fs-width-mismatch-double-float.shader_test v2: - Do not assert if we see invalid numerical types. These come straight from shader code, so we should produce linker errors if shaders attempt to do location aliasing on variables that are not numerical such as records. - While we are at it, improve error reporting for the case of numerical type mismatch to include the shader stage. v3: - Allow location aliasing of images and samplers. If we get these it means bindless support is active and they should be handled as 64-bit integers (Ilia) - Make sure we produce link errors for any non-numerical type for which we attempt location aliasing, not just structs. v4: - Rebased with minor fixes (Andres). - Added fixing tag to the commit log (Andres). v5: - Remove the helper function and check individually for the underlying numerical type and bit width (Timothy). - Implicitly, assume that any non-treated type which is checked for its underlying numerical type is either integer or float and has a defined bit width (Timothy). - Implicitly, assume that structs are the only non-treated non-numerical type (Timothy). - Improve the linker error descriptions and commit log (Andres). Fixes: 13652e7516a ("glsl/linker: Fix type checks for location aliasing") Cc: Ilia Mirkin <[email protected]> Cc: Timothy Arceri <[email protected]> Cc: Iago Toral Quiroga <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* softpipe: Enable PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENTGert Wollny2019-04-091-1/+1
| | | | | | | | | | | | | The offset alignment must be set to s16 because the tile cache is implemented to require this. This enables ARB_buffer_texture_range and OES_texture_buffer for softpipe. The according deqp-gles31 tests pass. Also update the feature table. Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* softpipe: Add an extra code path for the buffer texel lookupGert Wollny2019-04-091-1/+16
| | | | | | | | | | With buffers the addressing is done on a per-byte bases so the code path for normal textures doesn't work properly. Also add an assert to make sure that the bit cound for storing the X coordinate is large enough. Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Dave Airlie <[email protected]>