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* nir: Add intrinsics from ARB_shader_ballotMatt Turner2017-07-202-0/+58
| | | | | Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Enable ARB_shader_group_voteMatt Turner2017-07-201-0/+1
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* i965/fs: Implement ARB_shader_group_vote operationsMatt Turner2017-07-201-0/+50
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Handle explicit flag destinations in flags_written()Francisco Jerez2017-07-201-4/+19
| | | | | | | The implementations of the ARB_shader_group_vote intrinsics will explicitly write the flag as the destination register. Reviewed-by: Matt Turner <[email protected]>
* i965/vec4: Lower ARB_shader_group_vote intrinsicsMatt Turner2017-07-201-0/+1
| | | | | | | | I don't expect anyone is going to care about using this in vec4 programs (vertex/tessellation/geometry on Gen6/7), no one has come up with a good way to implement it much less test it. Reviewed-by: Kenneth Graunke <[email protected]>
* nir: Support lowering vote intrinsicsMatt Turner2017-07-202-2/+4
| | | | | | | ... trivially (as allowed by the spec!) by reusing the existing nir_opt_intrinsics code. Reviewed-by: Kenneth Graunke <[email protected]>
* nir: Add pass to optimize intrinsicsMatt Turner2017-07-204-0/+99
| | | | | | | Specifically, constant fold intrinsics from ARB_shader_group_vote, but I suspect it'll be useful for other things in the future. Reviewed-by: Kenneth Graunke <[email protected]>
* nir: Add intrinsics from ARB_shader_group_voteMatt Turner2017-07-202-0/+27
| | | | | | | | These are intrinsics rather than opcodes, because they operate across channels. Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Rename batch->exec_objects to validation_listChris Wilson2017-07-202-12/+14
| | | | | | | | | | | Within i965, we have many different objects and confusingly when submitting an execbuf we have lists of both our internal objects and a list of the kernel's drm_i915_gem_exec_object with very similar names. Rename the kernel's validation list to avoid the collison as it is only used for interfacing with the kernel and so a peripheral use of "object". Reviewed-by: Kenneth Graunke <[email protected]>
* Revert "i965: Call intel_prepare_render() from intel_update_state()"Kenneth Graunke2017-07-201-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit b7153c3e9f9d2d430b0338313587a00e531e4800. The point of that commit was to ensure intel_prepare_render() occurred before color resolves on the current framebuffer. In 0673bbfd9ba16be8 (i965: Move surface resolves back to draw/dispatch time), Jason moved brw_predraw_resolve_framebuffer back to draw time, which is already after a intel_prepare_render() call. So, this is no longer necessary. Furthermore, it caused problems. "mpv" would only display a small corner of movies, and Android started failing camera CTS tests. This is because intel_prepare_render() ended up handling DRI2 events which caused the drawable to be resized at an inopportune time, flagging ctx->NewState |= _NEW_BUFFERS, but at a point where we've already copied ctx->NewState, and failed to notice the newly set flag. The lack of _NEW_BUFFERS caused us to skip 3DSTATE_DRAWING_RECTANGLE, so the drawing ended up being clipped to an outdated framebuffer size. Just drop the hack and go back to handling this at the proper time. Thanks to Matti Hämäläinen (ccr), Tomasz Figa (tfiga), and Tapani Palli for reporting these issues. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101558 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101704 Tested-by: Tapani Pälli <[email protected]>
* mesa: remove useless assert in _mesa_TextureView()Samuel Pitoiset2017-07-201-1/+0
| | | | | | | Already checked in _mesa_choose_texture_format(). Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* mesa: remove duplicated code around framebuffer_renderbuffer()Samuel Pitoiset2017-07-201-47/+23
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* mesa: remove one extra check in _mesa_DeleteTextures()Samuel Pitoiset2017-07-201-5/+0
| | | | | | | Already checked above. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* mesa: make _mesa_generate_texture_mipmap() staticSamuel Pitoiset2017-07-202-10/+6
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* mesa: inline save_array_object()Samuel Pitoiset2017-07-201-14/+1
| | | | | | | | No need to check if ID is not 0 because _mesa_HashFindFreeKeyBlock() can't generate this value. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* mesa: inline remove_array_object()Samuel Pitoiset2017-07-201-15/+1
| | | | | | | | No need to check if ID is not 0 because _mesa_lookup_vao() already prevents this to happen. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* mesa: tidy up _mesa_DeleteVertexArrays()Samuel Pitoiset2017-07-201-13/+12
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* mesa: remove useless assert in texture_storage()Samuel Pitoiset2017-07-201-1/+0
| | | | | | | Already checked in _mesa_choose_texture_format(). Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* mesa: pass the 'caller' function to texstorage()Samuel Pitoiset2017-07-201-9/+11
| | | | | | | To be consistent with texturestorage(). Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* mesa: make _mesa_texture_storage() staticSamuel Pitoiset2017-07-202-19/+12
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* i965: Represent depth surfaces with islTopi Pohjolainen2017-07-203-48/+94
| | | | | | | | | | | | v2 (Jason): - s/separate_stencil_surface/make_separate_stencil_surface/ - drop the check for separate stencil when wrapping an existing buffer object with miptree. This is dead code as the first needs_separate_stencil() checks is MIPTREE_LAYOUT_FOR_BO-flag and says no. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965: Drop redundant check for non-tiled depth bufferTopi Pohjolainen2017-07-202-4/+2
| | | | | | | | | | Depth buffers are always Y-tiled. In brw_miptree_choose_tiling() driver opts to use linear buffers for small and 1D but this does not apply for depth - GL_DEPTH_COMPONENT and GL_DEPTH_STENCIL_EXT are considered first. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* intel/isl/gen4: Represent cube maps with 3D layoutTopi Pohjolainen2017-07-201-6/+35
| | | | | | | v2 (Jason): Check for !ISL_SURF_DIM_3D instead of CUBE_BIT. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Prepare 3D surfaces with physical 2D layoutTopi Pohjolainen2017-07-201-17/+22
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Prepare aux state map for isl basedTopi Pohjolainen2017-07-201-3/+18
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Represent y-tiled stencil copies with islTopi Pohjolainen2017-07-201-5/+4
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Represent w-tiled stencil surfaces with islTopi Pohjolainen2017-07-203-20/+36
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Prepare compressed offsets for isl basedTopi Pohjolainen2017-07-201-1/+1
| | | | | | | v2 (Jason): Simply switch to isl_surf_get_image_offset_el() Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Add support for imported bo offsets for isl basedTopi Pohjolainen2017-07-201-0/+13
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/fbo: Add support for isl-based miptrees in rb wrapperTopi Pohjolainen2017-07-201-0/+4
| | | | | | Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965: Prepare image setup from miptree for isl basedTopi Pohjolainen2017-07-201-2/+9
| | | | | | Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965: Prepare tex, img and rt state emission for isl based miptreesTopi Pohjolainen2017-07-201-5/+16
| | | | | | Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965: Refactor miptree to isl converter and adjustmentTopi Pohjolainen2017-07-201-46/+57
| | | | | | Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965: Prepare tex (sub)image for isl basedTopi Pohjolainen2017-07-202-5/+23
| | | | | | Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/wm: Prepare image surfaces for isl basedTopi Pohjolainen2017-07-201-0/+6
| | | | | | Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/wm: Fix number of layers in 3D imagesTopi Pohjolainen2017-07-201-3/+13
| | | | | | Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Prepare intel_miptree_copy() for isl basedTopi Pohjolainen2017-07-201-4/+16
| | | | | | Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965: Prepare blit engine for isl based miptreesTopi Pohjolainen2017-07-201-5/+11
| | | | | | | | | v2: Do not concern cpp, pitch and tiling which are already transitioned. Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Store chars-per-pixel even for isl basedTopi Pohjolainen2017-07-201-0/+1
| | | | | | | | | | This will significantly reduce chrun when switching remaaining surface types to isl. After the full transition it will be easier to calculate on-demand and drop the helper member in miptree. Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Switch to isl_surf::row_pitchTopi Pohjolainen2017-07-2013-66/+48
| | | | | | Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Take interleaving into account in stencil pitchTopi Pohjolainen2017-07-203-58/+20
| | | | | | | | This makes intel_mipmap_tree::pitch and isl_surf::row_pitch semantically equivalent. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Switch to isl_surf::tilingTopi Pohjolainen2017-07-2015-133/+128
| | | | | | | | v2 (Daniel): Use isl tiling converters instead of introducing local. Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* intel/isl: Add i915 to isl_tiling converterTopi Pohjolainen2017-07-202-0/+20
| | | | | | | | v2: s/i915_tiling_to_isl_tiling(/isl_tiling_from_i915_tiling/ Reviewed-by: Daniel Stone <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Use isl_tiling_to_i915_tiling()Topi Pohjolainen2017-07-202-14/+1
| | | | | | | and drop local copy. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Switch to isl_surf::samplesTopi Pohjolainen2017-07-2011-49/+43
| | | | | | | | | | | | | | v2 (Jason): - Don't trigger miptree re-creation in vain later on with ISL based. Core GL uses zero to indicate single sampled while ISL uses one - this would cause intel_miptree_match_image() to always fail. - Now that native miptree is already using sample number of one, there is no need for MAX2() when converting to ISL. Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Use num_samples of 1 instead of 0 for single-sampledTopi Pohjolainen2017-07-2010-32/+38
| | | | | | | | | | | | | | | | | | | | | Patch moves "assert(brw->num_samples <= 16)" from emit_3dstate_multisample2() to upload_multisample_state(). Latter is the only caller of the former and passes "brw->num_samples" as argument. Therefore it is clearer to assert in the caller. Possible bug fix in genX(emit_3dstate_multisample2) which doesn't have a case for num_samples == 0 in the switch statement. It should be noted that intel_miptree_map()/unmap() now checks additionally for "mt->surf.samples == 1" in order to support gen6 stencil which is already transitioned to ISL. This will go away in next patch when native miptrees start to use isl_surf::samples as well. Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Switch to isl_surf::msaa_layoutTopi Pohjolainen2017-07-206-131/+30
| | | | | | Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* radv: Add support for VK_KHR_variable_pointers.Bas Nieuwenhuizen2017-07-203-0/+18
| | | | | | | | Just a trivial enable. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Acked-by: Dave Airlie <[email protected]>
* radv: Add VK_KHR_storage_buffer_storage_class support.Bas Nieuwenhuizen2017-07-202-0/+5
| | | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Acked-by: Dave Airlie <[email protected]>
* mesa: check API profile for GL_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTIONBrian Paul2017-07-191-1/+1
| | | | | | | | If we have a compat profile context, it means that GL_QUADS[_STRIP] are supported so this query makes sense. It's also legal for 3.2 core profile because of a spec bug. Reviewed-by: Ian Romanick <[email protected]>
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