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* intel: Resolve buffers in intelSpanRenderStartChad Versace2011-11-221-1/+39
| | | | | | | | | Resolve all buffers that will be mapped by intelSpanRenderStart. This comprises resolving the depth buffer of each enabled texture and of the read and draw buffers. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Refactor intelSpanRenderStartChad Versace2011-11-221-16/+25
| | | | | | | | | Factor the mapping loops from intelSpanRenderStart() into intel_span_map_buffers(). This in preparation for the next commit, which resolves the buffers before mapping. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* i965: Resolve buffers before drawing [v2]Chad Versace2011-11-221-0/+73
| | | | | | | | | | | | Before emitting primitives in brw_try_draw_prims(), resolve the depth buffer's HiZ buffer and resolve the depth buffer of each enabled depth texture. v2: [anholt] The driver no longer validates drm bo's, so update a comment to reflect that. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* i965: Prevent recursive calls to FLUSH_VERTICES [v2]Chad Versace2011-11-221-0/+66
| | | | | | | | | | | | | To do so, we must resolve all buffers on entering a glBegin/glEnd block. For the detailed explanation, see the Doxygen comments in this patch. v2: - Fix typo: s/enusure/ensure/. - In brwPrepareExecBegin(), do the same resolves as done by brw_predraw_resolve_buffers(). Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* i965/gen6: Manipulate state batches for HiZ meta-ops [v4]Chad Versace2011-11-228-9/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | A lot of the state manipulation is handled by the meta-op state setup. However, some batches need manual intervention. v2: Do not special-case the 3DSTATE_DEPTH_STENCIL.Depth_Test_Enable bit for HiZ in gen6_upload_depth_stencil(). The HiZ meta-op sets ctx->Depth.Test, just read the value from that. v3: Add a new dirty flag, BRW_STATE_HIZ, for brw_tracked_state. Flag it immediately before and after executing the HiZ operation in gen6_resolve_slice(). Add the flag to the the dirty bits for the following state packets: gen6_clip_state gen6_depth_stencil_state gen6_sf_state gen6_wm_state v4: - Add BRW_NEW_STATE_HIZ to the dirty bit table in brw_state_upload.c. This is needed for INTEL_DEBUG=state. - Align brw dirty bit for gen6_depth_stencil_state. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* i965/gen6: Complete stubs for HiZ buffer resolvesChad Versace2011-11-221-2/+298
| | | | | | | | Some state batches also need to be manipulated. That's done in the next commit. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* i965: Add HiZ operation state to brw_contextChad Versace2011-11-221-0/+35
| | | | | | | | brw_context::hiz contains state needed to perform HiZ meta-ops and indicates if a HiZ operation is currently in progress. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Add resolve functions for renderbuffersChad Versace2011-11-222-0/+94
| | | | | | | | | Add the following functions: intel_renderbuffer_resolve_hiz intel_renderbuffer_resolve_depth Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Add resolve functions for miptreesChad Versace2011-11-222-1/+174
| | | | | | | | | | Add functions that - set a miptree slice as needing a resolve - resolve a single slice of a miptree - resolve all slices of a miptree Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Add field intel_mipmap_tree::hiz_mapChad Versace2011-11-221-0/+13
| | | | | | | This is a map of miptree slices to needed resolves. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Define struct intel_resolve_map [v2]Chad Versace2011-11-224-0/+196
| | | | | | | | | | | | | | This is a map of miptree slices to needed resolves, implemented as a linked list. A future commit will embed such a list in intel_mipmap_tree. If you think I'm crazy to put a list in a miptree, read the Doxygen in this patch for intel_resolve_map. v2: [anholt] Move Doxygen from functin prototypes to definitions. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Change signature of HiZ resolve functionsChad Versace2011-11-224-19/+32
| | | | | | | | | | | | | Now that intel_renderbuffer::region has been replaced with a miptree, the HiZ functions region parameter must be replaced with a miptree parameter. Change the return type from bool to void. Rename the 'depth' parameter to 'layer', because it will correspond to irb->mt_layer. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Remove unused HiZ functionsChad Versace2011-11-223-27/+0
| | | | | | | | | | | | | | Remove the following functions: i830_hiz_resolve_noop i915_hiz_resolve_noop brw_hiz_resolve_noop My original strategy for how intel->vtbl.resolve_*buffer was used has substantially changed. The above functions are no longer called in the current strategy. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Replace intel_mipmap_tree::hiz_region with a miptree [v2]Chad Versace2011-11-225-30/+50
| | | | | | | | | | | | This is required to correctly implement HiZ for mipmapped and multi-layered textures. v2: Accomodate refcount fixes in intel_process_dri2_buffer_*() that were introduced in v2 of commit intel: Replace intel_renderbuffer::region with a miptree [v2] Reviewed-by: Eric Anholt <eric@anholt> Signed-off-by: Chad Versace <[email protected]>
* intel: Replace intel_texture_image::stencil_irb with ↵Chad Versace2011-11-226-236/+252
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | intel_mipmap_tree::stencil_mt [v3] For depthstencil textures using separate stencil, we embedded a stencil buffer in intel_texture_image. The intention was that the embedded stencil buffer would be the golden copy of the texture's stencil bits. When necessary, we scattered/gathered the stencil bits between the texture miptree and the embedded stencil buffer. This approach had a serious deficiency for mipmapped or multi-layer textures. Any given moment the embedded stencil buffer was consistent with exactly one miptree slice, the most recent one to be scattered. This permitted tests of type A to pass, but broke tests of type B. Test A: 1. Create a depthstencil texture. 2. Upload data into (level=x1,layer=y1). 3. Read and test stencil data at (level=x1, layer=y1). 4. Upload data into (level=x2,layer=y2). 5. Read and test stencil data at (level=x2, layer=y2). Test B: 1. Create a depthstencil texture. 2. Upload data into (level=x1,layer=y1). 3. Upload data into (level=x2,layer=y2). 4. Read and test stencil data at (level=x1, layer=y1). 5. Read and test stencil data at (level=x2, layer=y2). v2: Only allocate stencil miptree if intel->must_use_separate_stencil, because we don't make the conversion from must_use_separate_stencil to has_separate_stencil until commit intel: Use separate stencil whenever possible v3: Don't call ChooseNewTexture in intel_renderbuffer_wrap_miptree() in order to determine the renderbuffer format. Instead, pass the format as a param to that function. CC: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Refactor intel_render_texture() [v2]Chad Versace2011-11-221-33/+88
| | | | | | | | | | | | | | | | | | | | | | | | | This is in preparation for properly implementing glFramebufferTexture*() for mipmapped depthstencil textures. The FIXME comments deleted by this patch give a rough explanation of what was broken. This refactor does the following: - In intel_update_wrapper() and intel_wrap_texture(), change the parameters to prepare to remove functions' dependency on gl_texture_image. - Move the call to intel_renderbuffer_set_draw_offsets() from intel_render_texture() into intel_udpate_wrapper(). Each time I encounter those functions, I dislike their vague names. (Update which wrapper? What is wrapped? What is the wrapper?). So, while I was mucking around, I also renamed the functions. v2: In addition to the ``GLenum internal_format`` parameter to intel_wrap_miptree(), add a ``gl_format format`` parameter. This removes the need to recalculate for the true format from internal_format with ChooseNewTextureFormat, which was just weird. Signed-off-by: Chad Versace <[email protected]>
* intel: Define intel_miptree_check_level_layer()Chad Versace2011-11-221-0/+13
| | | | | | | | | This is a small helper function that asserts that a given level and layer are valid for a miptree. I will be extensively using it in the future miptree HiZ functions. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Remove unneeded params from intel_renderbuffer_set_draw_offset()Chad Versace2011-11-223-14/+10
| | | | | | | | | | | | | | Since the renderbuffer tracks the miptree level and layer that it wraps, the 'tex_image' and 'zoffset' params are no longer needed to calculate the draw offsets. Not only are they no longer needed, but their presence would prevent calculating the renderbuffer draw offsets in situations where there were no texture image. Such situations will occur during the HiZ meta-op and during scatter/gather of separate stencil textures. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Track the miptree layer wrapped by a renderbuffer [v2]Chad Versace2011-11-222-5/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | TODO: Make v2 for kwg. Add two fields to intel_renderbuffer: mt_level mt_layer Multiple renderbuffers may simultaneously wrap a single texture and each provide a different view into that texture. [Consider glFramebufferTextureLayer()]. The new fields indicate which slice of the miptree is wrapped by the renderbuffer. The buffer resolve operations, to be introduced in the future, require these fields in order to resolve the correct slice in the miptree. To add the fields, it was necessary to replace the type of some function parameters from gl_texture_image to gl_renderbuffer_attachment. v2: [kwg] Replace confusing condition `CubeMapFace > 0` with the more sensible `Target == GL_TEXTURE_CUBE_MAP`. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Kill intel_mipmap_level::nr_images [v4]Chad Versace2011-11-226-43/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For all texture targets except GL_TEXTURE_CUBE_MAP, the 'nr_images' and 'depth' fields of intel_mipmap_level were identical. In the exceptional case, nr_images == 6 and depth == 1. It is simple to determine if a texture is a cube or not, so the presence of two fields here was not helpful. Worse, it was confusing. When we eventually implement GL_ARB_texture_cube_map_array, this mess would have become even more confusing. This patch removes 'nr_images' and assigns to 'depth' a consistent meaning: depth is the number of 2D slices at each miplevel. The exact semantics of depth varies according to the texture target: - For GL_TEXTURE_CUBE_MAP, depth is 6. - For GL_TEXTURE_2D_ARRAY, depth is the number of array slices. It is identical for all miplevels in the texture. - For GL_TEXTURE_3D, it is the texture's depth at each miplevel. Its value, like width and height, varies with miplevel. - For other texture types, depth is 1. As a consequence, parameters were removed from the following function signatures: intel_miptree_set_level_info Remove 'nr_images'. i945_miptree_layout brw_miptree_layout_texture brw_miptree_layout_texture_array Remove 'slices'. v2: - Replace "It's" with "Its". - Remove all hunks in intel_fbo.c. The hunks were spurious and sneaked in during a rebase. - Remove unneeded hunk in intel_tex_map_image_for_swrast(). It was a little refactor of the for-loop's upper bound. v4: In intel_miptree_get_image_offset(), document the conditions under which different if-branches are taken. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Refactor intel_miptree_copy_teximage()Chad Versace2011-11-211-56/+66
| | | | | | | | | | | | | | | | Extract the body of the inner loop into a new function, intel_miptree_copy_slice(). This is in preparation for adding support for separate stencil and HiZ to intel_miptree_copy_teximage(). When copying a slice of a depthstencil miptree that uses separate stencil, we will also need to copy the corresponding slice of the stencil miptree. The easiest way to do this will be to call intel_miptree_copy_slice() recursively. Analogous reasoning applies to copying a slice of a depth miptree with HiZ. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Refactor intel_mipmap_level offsetsChad Versace2011-11-212-25/+37
| | | | | | | | | | | | Add a new field, intel_mipmap_level::slice, and move the offset fields into it. Also add some much needed documentation for these fields. Before this patch, a separate array was allocated for the intel_mipmap_level::{x,y}_offsets. This was just silly; it incurred an extra call to malloc and diminished memory locality. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Replace intel_renderbuffer::region with a miptree [v3]Chad Versace2011-11-2116-140/+203
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Essentially, this patch just globally substitutes `irb->region` with `irb->mt->region` and then does some minor cleanups to avoid segfaults and other problems. This is in preparation for 1. Fixing scatter/gather for mipmapped separate stencil textures. 2. Supporting HiZ for mipmapped depth textures. As a nice benefit, this lays down some preliminary groundwork for easily texturing from any renderbuffer, even those of the window system. A future commit will replace intel_mipmap_tree::hiz_region with a miptree. v2: - Return early in intel_process_dri2_buffer_*() if region allocation fails. - Fix double semicolon. - Fix miptree reference leaks in the following functions: intel_process_dri2_buffer_with_separate_stencil() intel_image_target_renderbuffer_storage() v3: - [anholt] Fix check for hiz allocation failure. Replace ``if (!irb->mt)` with ``if(!irb->mt->hiz_region)``. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Define intel_miptree_create_for_renderbuffer()Chad Versace2011-11-212-0/+36
| | | | | | | | | This function creates a miptree that is suitable as storage for a non-texture renderbuffer. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Move inline functions from intel_fbo.h to .cChad Versace2011-11-212-17/+23
| | | | | | | | | | | | | | | Move the following inline functions: intel_get_rb_region intel_framebuffer_has_hiz A future commit will replace the renderbuffer's region with a miptree. This small refactor will eliminate the need for intel_fbo.h to include intel_mipmap_tree.h on that commit. I'd like to avoid the situation where each header transitively includes every other header. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Kill intel_framebuffer_get_hiz_region()Chad Versace2011-11-211-17/+3
| | | | | | | | | | The only user of intel_framebuffer_get_hiz_region() was intel_framebuffer_has_hiz(). So I folded the body of the former into the latter. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Temporarily disable HiZ for texturesChad Versace2011-11-211-59/+3
| | | | | | | | | | | | | | | | A great refactor thrashing begins after this commit for HiZ and separate stencil. Removing code for texture HiZ will make that refactoring easier, because then we don't have to maintain that code during the refactor. To disable HiZ for textures, I've removed the hook in intel_update_wrapper() that allocates a HiZ buffer when attaching a depth texture to a framebuffer. HiZ was broken for textures anyway, so there's no regression here. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Always gather stencil buffer in intel_map_renderbuffer_separate_s8z24()Chad Versace2011-11-211-32/+20
| | | | | | | | | | | | The function gathered the stencil buffer into the depth buffer only when the map mode contained the read bit. But we must do the gather even if the map mode is write-only. If we do not, then, when the depth buffer's stencil bits are scattered into the stencil buffer by intel_unmap_renderbuffer(), some of the scattered stencil bits would be invalid. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Fix swrast_render_start() for depthstencil buffers with separate stencilChad Versace2011-11-212-29/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Don't map the depthstencil buffer twice Place a guard in intel_renderbuffer_map() to prevent a renderbuffer from being mapped twice. This happened if a single buffer was attached to the framebuffer's depth and stencil attachment points. (Interestingly, because intel_map_renderbuffer_gtt() is idempotent, the double mapping did not cause bugs for depthstencil buffers *without* separate stencil). 2. Stop overriding gl_framebuffer::_DepthBuffer,_StencilBuffer Normally, if a depthstencil buffer is attached to the framebuffer's depth attachment point, then _mesa_update_framebuffer() installs a wrapper depth renderbuffer at gl_framebuffer::_DepthBuffer. Ditto for the stencil attachment point and gl_framebuffer::_StencilBuffer A depthstencil intel_renderbuffer with separate stencil contains hidden depth and stencil renderbuffers, which are the *real* renderbuffers. In order to force swrast to work, we were installing, in brw_update_draw_buffer(), the hidden renderbuffers at gl_framebuffer::_DepthBuffer and _StencilBuffer, thus overriding the behavior of _mesa_update_framebuffer(). However, now that intel_renderbuffer_map() is implemented with MapRenderbuffer(), overriding _mesa_update_framebuffer's introduces bugs. This patch removes the override code. Fixes several Piglit tests on gen7. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Don't use special stencil span accessorsChad Versace2011-11-211-42/+1
| | | | | | | | | | | | The special stencil span accessors, as set by intel_span_init_funcs. perform software W detiling. Since intel_renderbuffer_map() now uses MapRenderbuffer, rb->Data points to an *untiled* stencil buffer. Fixes several Piglit tests on gen7. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* nvc0: add support for GF119 (NVD9)Ben Skeggs2011-11-182-0/+2
| | | | Signed-off-by: Ben Skeggs <[email protected]>
* mesa: initialize stencilMap, Stride if stencilRb==depthRbBrian Paul2011-11-161-0/+4
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* mesa: Only update sampler uniforms that are used by the shader stageIan Romanick2011-11-161-3/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously a vertex shader that used no samplers would get updated (by calling the driver's ProgramStringNotify) when a sampler in the fragment shader was updated. This was discovered while investigating some spurious code generation for shaders in Cogs. The behavior in Cogs is especially pessimal because it ping-pongs sampler uniform settings: glUniform1i(sampler1, 0); glUniform1i(sampler2, 1); draw(); glUniform1i(sampler1, 1); glUniform1i(sampler2, 0); draw(); glUniform1i(sampler1, 0); glUniform1i(sampler2, 1); draw(); // etc. ProgramStringNotify is still too big of a hammer. Applications like Cogs will still defeat the shader cache. A lighter-weight mechanism that can work with the shader cache is needed. However, this patch at least restores the previous behavior. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: don't map depth+stencil buffer twice in glReadPixels()Brian Paul2011-11-161-3/+11
| | | | | | | | | | | In slow_read_depth_stencil_pixels_separate() we might have separate depth and stencil buffers or a combined buffer. In the later case, don't map the buffer twice. This function is used when the depth scale/bias pixel transfer values are not the defaults. Fixes http://bugs.freedesktop.org/show_bug.cgi?id=42963 Reviewed-by: José Fonseca <[email protected]>
* i965: Fix inconsistent indentation in brw_gs_emit.c.Kenneth Graunke2011-11-161-33/+33
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* glsl: Add missing textureSize(samplerCubeShadow, int) variant.Kenneth Graunke2011-11-161-0/+1
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* mesa: do not skip att and spot calculation for infinite lightYuanhan Liu2011-11-161-63/+50
| | | | | | | | | | | | | | | | | | glspec doesn't say that we should skip the attenuation and spot calculation for infinite light(Ppli.w == 0). Instead, it gives a same formula to do the light calculation for both finite light and infinite light(see page 62 of glspec 2.1.pdf) Also from the formula (2.4) at page 62 of glspec 2.1.pdf, we can skip attenuation calculation if Ppli.w == 0. This would fix all the intel oglc l_sed fail subcases and introduces no intel oglc regressions. v2: fix an wrong intendation(comments from Brian). Signed-off-by: Yuanhan Liu <[email protected]> Acked-by: Brian Paul <[email protected]>
* mesa: make sure all lighting tables are updated before the computationYuanhan Liu2011-11-161-0/+3
| | | | | | | | | Make sure all lighting tables are updated before using the table to calculate something, say using _SpotExpTable to calculate _VP_inf_spot_attenuation. Signed-off-by: Yuanhan Liu <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa: Fix a couple of missed conversion to arrays in format_unpack.Eric Anholt2011-11-151-11/+11
| | | | | | | | | | Fixes regression in piglit: ARB_color_buffer_float/GL_RGBA16F-getteximage ARB_color_buffer_float/GL_RGBA16F-readpixels ARB_color_buffer_float/GL_RGBA32F-getteximage ARB_color_buffer_float/GL_RGBA32F-readpixels Reviewed-by: Brian Paul <[email protected]>
* mesa: Include R/RG integer textures in _mesa_is_integer_format.Eric Anholt2011-11-151-0/+12
| | | | | | | | Fixes some spurious GL errors in the upcoming gl-3.0-required-sized-formats piglit test. Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel: Fix separate stencil in builtin DRI2 backendChad Versace2011-11-151-9/+80
| | | | | | | | | | | | | | | | intelAllocateBuffer() was oblivious to separate stencil buffers. This patch fixes it to allocate a non-tiled stencil buffer with special pitch, just as the DDX does. Without this, any app that attempted to create an EGL surface with stencil bits would crash. Of course, this affected only environments that used the builtin DRI2 backend, such as Android and Wayland. Fixes GLBenchmark2.1 on Android on gen7. Note: This is a candidate for the 7.11 branch. Tested-by: Louie Tsaie <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Fix region dimensions for stencil buffers received from DDXChad Versace2011-11-151-15/+16
| | | | | | | | | | | | | | | I changed the dimensions of the stencil buffer's region, as allocated by the DDX, at xf86-video-intel commit commit 3e55f3e88b40471706d5cd45c4df4010f8675c75 dri: Do not tile stencil buffer But I forgot to make the analogous update to the Intel DRI2 glue in Mesa. This patch makes that update. Surprisingly, the mismatch did not cause any bugs. But the mismatch, if left unfixed, *would* create bugs in the next commit. Note: This is a candidate for the 7.11 branch. Signed-off-by: Chad Versace <[email protected]>
* intel: Simplify stencil detiling arithmeticChad Versace2011-11-152-6/+3
| | | | | | | | | | | | | | | | When calculating the y offset needed for detiling window system stencil buffers, replace the term region->height * 2 + region->height % 2 - 1 with rb->Height - 1 . The two terms are incidentally equivalent due to some out-of-date, incorrect code in the Intel DRI2 glue for DDX. (See intel_process_dri2_buffer_with_separate_stencil(), line ``buffer_height /= 2;``). Note: This is a candidate for the 7.11 branch (only the intel_span.c hunk). Signed-off-by: Chad Versace <[email protected]>
* radeon: use _mesa_readpixels() instead of _swrast_ReadPixels()Brian Paul2011-11-151-7/+5
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* i965: use _mesa_readpixels() instead of _swrast_ReadPixels()Brian Paul2011-11-151-6/+5
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* mesa: convert unpack functions to operate on an array of valuesBrian Paul2011-11-151-630/+900
| | | | Reviewed-by: Eric Anholt <[email protected]>
* mesa: new BYTE/SHORT_TO_FLOATZ() macrosBrian Paul2011-11-153-42/+17
| | | | | | | Rather than redefining the BYTE/SHORT_TO_FLOAT macros, just define new ones with different names. These macros preserve zero when converting. Reviewed-by: Eric Anholt <[email protected]>
* mesa: move CEILING() macro into macros.hBrian Paul2011-11-153-7/+5
| | | | Reviewed-by: Eric Anholt <[email protected]>
* mesa: remove unused macros in macros.hBrian Paul2011-11-151-26/+0
| | | | Reviewed-by: Eric Anholt <[email protected]>
* mesa: consolidate cases in _mesa_components_in_format()Brian Paul2011-11-151-28/+12
| | | | | | and _mesa_sizeof_packed_type() Reviewed-by: Eric Anholt <[email protected]>
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