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* i965g: wipKeith Whitwell2009-10-2340-2599/+907
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* i965g: re-starting from the dri driverKeith Whitwell2009-10-2368-0/+29208
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* gallium: remove extended negate also, and also the ExtSwz tokenKeith Whitwell2009-10-2315-346/+11
| | | | | | Likewise, the extended negate functionality hasn't been used since mesa switched to using tgsi_ureg to build programs, and has been translating the SWZ opcode internally to a single MAD.
* cell: typo from ExtSwizzle commitKeith Whitwell2009-10-231-1/+1
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* gallium: remove the swizzling parts of ExtSwizzleKeith Whitwell2009-10-2326-489/+96
| | | | | | | | | These haven't been used by the mesa state tracker since the conversion to tgsi_ureg, and it seems that none of the other state trackers are using it either. This helps simplify one of the biggest suprises when starting off with TGSI shaders.
* gallium: remove noise opcodesKeith Whitwell2009-10-2310-77/+20
| | | | | | | | | | | Provide a dummy implementation in the GL state tracker (move 0.5 to the destination regs). At some point, a motivated person could add a better implementation of noise. Currently not even the nvidia binary drivers do anything more than this. In any case, the place to do this is in the GL state tracker, not the poor driver.
* r300g: last changes's typo, miss a include fileCooper Yuan2009-10-231-0/+1
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* r300g: add flush_frontbuffer function to display video surfaceCooper Yuan2009-10-231-1/+51
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* g3dvl: pass display and screen to g3dvl when creating video private contextCooper Yuan2009-10-233-5/+7
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* r600: remove remains of old tnl pipelineAlex Deucher2009-10-237-268/+41
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* r600: fix render size predictionAlex Deucher2009-10-233-20/+20
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* r600: remove old tnl pipelineAlex Deucher2009-10-232-192/+34
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* r600: clean up context creationAlex Deucher2009-10-231-102/+100
| | | | Make it more consistent with other radeon drivers.
* Revert "Store clipping distance for user clip planes as part of vertex ↵Ian Romanick2009-10-224-132/+18
| | | | | | | | | | processing" This reverts commit f058b25881e08c9d89a33345e5c84e1357396932. This change is completely wrong in so many ways. When clip distances are generated as part of vertex processing, they must be interpolated to perform clipping. Geometric clipping goes right out the window.
* Merge branch 'mesa_7_6_branch'Brian Paul2009-10-228-19/+84
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| * intel: flush old context before binding new contextBrian Paul2009-10-221-2/+15
| | | | | | | | | | Per the GLX spec, when changing rendering contexts, the old context should first be flushed.
| * glx: don't destroy context immediately if it's currently boundBrian Paul2009-10-221-0/+10
| | | | | | | | | | | | | | According to the GLXDestroyContext() man page, the context should not immediately be destroyed if it's bound to some thread. Wait until it's unbound to really delete it. The code for doing the later part is already present in MakeContextCurrent() so no change was needed there.
| * mesa: code refactoring- new _mesa_finish(), _mesa_flush()Brian Paul2009-10-222-8/+37
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| * i965: fix hacked Fallback usage in brw_prepare_vertices()Brian Paul2009-10-222-2/+6
| | | | | | | | | | | | | | | | Setting intel->Fallback = 1 clobbered any fallback state that was already set. Not sure where this hack originated (the git history is a little convoluted). Define and use a new BRW_FALLBACK_DRAW bit instead. This shouldn't break anything and could potentially fix some bugs (but no specific ones are known).
| * intel: define INTEL_FALLBACK_DRIVER for driversBrian Paul2009-10-221-0/+1
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| * intel: Fallback field is a bitmask, use GLbitfieldBrian Paul2009-10-223-5/+14
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| * i965: remove unused brw_context::tmp_fallback fieldBrian Paul2009-10-221-1/+0
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| * i965: remove unused BRW_FALLBACK_TEXTURE bitBrian Paul2009-10-221-1/+1
| | | | | | | | | | The value was probably wrong too. It was the same as INTEL_FALLBACK_DRAW_BUFFER.
* | mesa: fix up vbo commentsBrian Paul2009-10-221-8/+14
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* | mesa: added _mesa_dump_texture()Brian Paul2009-10-222-3/+28
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* | st/xorg: fix the makefile when used with new xextprotoZack Rusin2009-10-221-0/+2
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* | r300g: Enable more stuff in r300_screen, cleanup comments.Corbin Simpson2009-10-223-16/+23
| | | | | | | | Also enable 24-bit depth buffers without stencil.
* | r300g: Cleanup PSC setup math a bit and stop using Draw formats.Corbin Simpson2009-10-223-23/+74
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* | nv50: handle PIPE_TEX_FILTER_ANISO caseChristoph Bumiller2009-10-222-15/+13
| | | | | | | | | | Set the same bits as for linear filtering (in addition to max anisotropy), and 2 unknown bits I've seen set.
* | nouveau: nv30: rewrite so we can render only in depth bufferPatrice Mandin2009-10-221-20/+35
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* | nouveau: nv30: use a8r8g8b8 as depth texture format for z24s8Patrice Mandin2009-10-221-4/+4
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* | Kill off trident.Corbin Simpson2009-10-229-2988/+0
| | | | | | | | | | Hm. I could have said "chew trident and spit it out," or perhaps "spear trident," instead. Dohoho.
* | Nuke s3v.Corbin Simpson2009-10-2228-7719/+1
| | | | | | | | As per FDO #17889.
* | r300g: Clean up duplicate code in r300_render.Corbin Simpson2009-10-221-45/+4
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* | r300g: Move render functions to r300_render.Corbin Simpson2009-10-224-65/+249
| | | | | | | | Part of the fastpath cleanup.
* | llvmpipe: Avoid yet another variable size array.José Fonseca2009-10-221-2/+4
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* | llvmpipe: Define rdtsc for MSVC.José Fonseca2009-10-221-3/+14
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* | llvmpipe: Avoid variable size arrays.José Fonseca2009-10-223-4/+7
| | | | | | | | Not really variable size, but MSVC still doesn't like them.
* | llvmpipe: Use the pack/unpack functions for 8bit unsigned norm multiplication.José Fonseca2009-10-221-79/+17
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* | llvmpipe: Utility function to double the bit width of a type.José Fonseca2009-10-222-5/+28
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* | llvmpipe: Factor vector packing/unpacking to a separate source file.José Fonseca2009-10-225-237/+519
| | | | | | | | | | These functions will be needed to implement many of the 8bit operations, and they are quite complex on its own.
* | llvmpipe: Call util_cpu_detect() from the unit tests.José Fonseca2009-10-222-0/+7
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* | util: Set cpu endianness too.José Fonseca2009-10-222-0/+4
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* | Merge branch 'master' of git+ssh://[email protected]/git/mesa/mesaAlex Deucher2009-10-221-60/+36
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| * | st/xorg: cleanup the checks for whether the op is acceleratedZack Rusin2009-10-221-60/+36
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* | | Merge branch 'mesa_7_6_branch' of ↵Alex Deucher2009-10-225-9/+82
|\ \ \ | |/ / |/| / | |/ git+ssh://[email protected]/git/mesa/mesa
| * r600: set barrier for tex inst if dst is used earlier, might overwrite it ↵Andre Maasikas2009-10-221-2/+25
| | | | | | | | otherwise
| * r600: need to export something from PSAndre Maasikas2009-10-222-2/+19
| | | | | | | | | | | | | | Also avoids empty shader for "END" - seems to be somewhat valid fp Maybe this can be done differently in the future (fake FRAG_RESULT_COLOR already in Map_Fragment_Program() or is there a way to program the chip to not hang in case of no exports.
| * r600: add beginnings of ARL instructionAndre Maasikas2009-10-222-3/+33
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| * cell: fix compilation on cellMarc Dietrich2009-10-201-2/+2
| | | | | | | | s/LERP/LRP/
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