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* anv: Enable Vulkan 1.2 supportIván Briano2020-01-157-19/+20
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* anv: Implement the new core version property queriesJason Ekstrand2020-01-151-152/+261
| | | | | | | | | Vulkan 1.2 introduces some new structures to get the properties and features of a device from extensions that were promoted to core in 1.1 and 1.2. This commit implements the new property queries and makes all of the corresponding extension queries map to them. Reviewed-by: Iván Briano <[email protected]>
* anv: Implement the new core version feature queriesJason Ekstrand2020-01-151-56/+156
| | | | | | | | | Vulkan 1.2 introduces some new structures to get the properties and features of a device from extensions that were promoted to core in 1.1 and 1.2. This commit implements the new feature queries and makes all of the corresponding extension queries map to them. Reviewed-by: Iván Briano <[email protected]>
* anv,nir: Lower quad_broadcast with dynamic index in NIRJason Ekstrand2020-01-153-1/+6
| | | | | | | This is required for the subgroupBroadcastDynamicId feature that was added in Vulkan 1.2. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* anv: Bump the patch version to 131Jason Ekstrand2020-01-151-1/+1
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* vulkan/overlay: Fix for Vulkan 1.2Samuel Pitoiset2020-01-151-10/+13
| | | | | | | | | v2 (Jason Ekstrand): - Add duplicate hooks for both the 1.2 and KHR versions of vkCmdDraw[Indexed]IndirectCount. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* turnip: Pretend to support Vulkan 1.2Jason Ekstrand2020-01-153-13/+13
| | | | | | It doesn't really support any Vulkan properly yet so why not claim 1.2? This was an easier way of fixing the build than trying to roll it forward to a later version of ANV's entrypoint generator scripts.
* vulkan: Update the XML and headers to 1.2.131Jason Ekstrand2020-01-151-398/+946
| | | | | Acked-by: Lionel Landwerlin <[email protected]> Acked-by: Samuel Pitoiset <[email protected]>
* radeonsi: drop the negation from fmask_is_not_identityPierre-Eric Pelloux-Prayer2020-01-154-5/+5
| | | | | | | | | | | This change eases code reading ("fmask_is_identity = true" is clearer than "fmask_is_not_identity = false"). Initialization is not changed so fmask_is_identity is false when a texture is created. Reviewed-by: Marek Olšák <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3174> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3174>
* radeonsi: unbind image before compute clearPierre-Eric Pelloux-Prayer2020-01-151-0/+5
| | | | | | | It's not used and avoid infinite recursion when used from si_compute_expand_fmask Reviewed-by: Marek Olšák <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3174>
* radeonsi: make sure fmask expand is done if neededPierre-Eric Pelloux-Prayer2020-01-151-1/+2
| | | | | | | Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2248 Fixes: 095a58204d9 ("radeonsi: expand FMASK before MSAA image stores are used") Reviewed-by: Marek Olšák <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3174>
* radeonsi: fix fmask expand compute shaderPierre-Eric Pelloux-Prayer2020-01-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'coord' variable was using TGSI_WRITEMASK_XYZ so subsequent uses of TGSI_WRITEMASK_W were dropped. The result for a 2 samples program was: 0: UMAD TEMP[0].xy, SV[1].xyyy, IMM[0].xxxx, SV[0].xyyy 1: STORE IMAGE[0], TEMP[0], TEMP[1], RESTRICT, 2D_MSAA 2: STORE IMAGE[0], TEMP[0], TEMP[2], RESTRICT, 2D_MSAA 3: END instead of the expected: 0: UMAD TEMP[0].xy, SV[1].xyyy, IMM[0].xxxx, SV[0].xyyy 1: MOV TEMP[0].w, IMM[0].yyyy 2: LOAD TEMP[1], IMAGE[0], TEMP[0], RESTRICT, 2D_MSAA 3: MOV TEMP[0].w, IMM[0].zzzz 4: LOAD TEMP[2], IMAGE[0], TEMP[0], RESTRICT, 2D_MSAA 5: MOV TEMP[0].w, IMM[0].yyyy 6: STORE IMAGE[0], TEMP[0], TEMP[1], RESTRICT, 2D_MSAA 7: MOV TEMP[0].w, IMM[0].zzzz 8: STORE IMAGE[0], TEMP[0], TEMP[2], RESTRICT, 2D_MSAA 9: END This fixes half of https://gitlab.freedesktop.org/mesa/mesa/issues/2248 Fixes: 095a58204d9 ("radeonsi: expand FMASK before MSAA image stores are used") Reviewed-by: Marek Olšák <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3174>
* egl/android: Restrict minimum triple buffering for android color_buffersNataraj Deshpande2020-01-151-3/+7
| | | | | | | | | | | | | | | | | The patch restricts triple buffering as minimum at driver for android color_buffers in order to fix onscreen performance hit for T-Rex and Manhattan. v2: Update min_buffer check condition (Tapani Pälli) v3: further code cleanup (Eric Engestrom) Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2332 Fixes: 0661c357c60 ("egl/android: Update color_buffers querying for buffer age") Signed-off-by: Nataraj Deshpande <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3384> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3384>
* anv: fix pipeline switch back for non pipelined statesLionel Landwerlin2020-01-151-13/+8
| | | | | | | | | | | | | | Setting state base address can happen even before pipeline is selected. Also we must ensure it is set to 3D for Gen12, we can't switch back to an invalid pipeline value (UINT32_MAX). v2: Reuse helpers (Jason) Signed-off-by: Lionel Landwerlin <[email protected]> Fixes: b34422db5e66 ("anv: Implement Gen12 workaround for non pipelined state") Reviewed-by: Jason Ekstrand <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3396> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3396>
* radv/gfx10: simplify some duplicated NGG GS codeSamuel Pitoiset2020-01-151-62/+41
| | | | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3382> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3382>
* radv/gfx10: enable all CUs if NGG is never usedSamuel Pitoiset2020-01-151-2/+5
| | | | | | | | Ported from RadeonSI. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3382>
* radv: only use VkSamplerCreateInfo::compareOp if enabledSamuel Pitoiset2020-01-151-1/+5
| | | | | | | | | Cc: <[email protected]> Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2350 Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3392> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3392>
* v3d: fix bug when checking result of syncobj fence importIago Toral Quiroga2020-01-151-1/+1
| | | | | | Reviewed-by: Alejandro Piñeiro <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3383> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3383>
* st/mesa: run st_nir_lower_tex_src_plane for lowered xyuv/ayuvJonathan Marek2020-01-151-1/+2
| | | | | | | | | Has the effect of removing the nir_tex_src_plane for these formats too. Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/1896> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/1896>
* st/mesa: don't lower YUV when driver supports it nativelyJonathan Marek2020-01-156-55/+82
| | | | | | | | | | This fixes YUYV support on etnaviv. Fixes: 7404833c "gallium: add handling for YUV planar surfaces" Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/1896>
* radv: Disable VK_EXT_sample_locations on GFX10.Bas Nieuwenhuizen2020-01-151-1/+2
| | | | | | | | | Workaround for https://gitlab.freedesktop.org/mesa/mesa/issues/2163 CC: <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3236> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3236>
* st/mesa: implement EGLImageTargetTexStorageGurchetan Singh2020-01-152-0/+30
| | | | | | | | We can now support this extension. Acked-by: Marek Olšák <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3375> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3375>
* st/mesa: refactor egl image binding a bitGurchetan Singh2020-01-151-2/+3
| | | | | | | We'll need it for egl image tex storage. Acked-by: Marek Olšák <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3375>
* st/dri: track if image is created by a dmabufGurchetan Singh2020-01-154-0/+12
| | | | | | | Will be used by EXT_EGL_image_storage later. Acked-by: Marek Olšák <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3375>
* freedreno/ir3: rename instructionsRob Clark2020-01-157-14/+25
| | | | | | | | | | | | | Turns out this range of opcodes are more general purpose if/else/endif instructions. We should re-work tess to create a basic block and use normal flow control. And possibly (for a6xx+) optimize cases to use if/else/endif when appropriate. Signed-off-by: Rob Clark <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3398> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3398>
* nir/algebraic: sqrt(x)*sqrt(x) -> fabs(x)Elie Tournier2020-01-151-0/+1
| | | | | | | | | | | | | | | | | total instructions in shared programs: 12840840 -> 12839341 (-0.01%) instructions in affected programs: 122581 -> 121082 (-1.22%) helped: 559 HURT: 0 total cycles in shared programs: 302505756 -> 302490031 (<.01%) cycles in affected programs: 2022900 -> 2007175 (-0.78%) helped: 1090 HURT: 130 Signed-off-by: Elie Tournier <[email protected]> Reviewed-by: Matt Turner <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/948> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/948>
* nir/algebraic: i2f(f2i()) -> trunc()Elie Tournier2020-01-151-0/+5
| | | | | | | | | | | | | | | | total instructions in shared programs: 12840968 -> 12840784 (<.01%) instructions in affected programs: 17886 -> 17702 (-1.03%) helped: 77 HURT: 0 total cycles in shared programs: 302508917 -> 302505592 (<.01%) cycles in affected programs: 249964 -> 246639 (-1.33%) helped: 70 HURT: 7 Signed-off-by: Elie Tournier <[email protected]> Reviewed-by: Matt Turner <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/948>
* i965: Reuse the new core glsl_count_dword_slots().Eric Anholt2020-01-143-55/+3
| | | | | | | | | The only difference I could see was treating interfaces like structs. Maintain that case. Reviewed-by: Kristian H. Kristensen <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3297> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3297>
* mesa/st: Move the dword slot counting function to glsl_types as well.Eric Anholt2020-01-1411-130/+75
| | | | | | | | | | | | | To implement NIR-to-TGSI, we need to be able to get the size of the uniform variable for the TGSI declaration, not just the .driver_location. With its location in mesa/st, drivers couldn't link to it from nir-to-tgsi. This feels like a common enough function to want, so let's share it in the core compiler. Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3297>
* mesa/prog: Reuse count_vec4_slots() from ir_to_mesa.Eric Anholt2020-01-141-75/+1
| | | | | Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3297>
* mesa/st: Move the vec4 type size function into core GLSL types.Eric Anholt2020-01-148-109/+45
| | | | | | | | | | The only bit that gallium varied on was handling of bindless. We can retain previous behavior for count_attribute_slots() by passing in "true" (though I suspect this is just giving a silly answer to a silly question), and delete our recursive function from mesa/st. Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3297>
* mesa/st: Deduplicate the NIR uniform lowering code.Eric Anholt2020-01-143-18/+16
| | | | | | | Just a little refactor as I go looking at the type size functions. Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3297>
* radeonsi: move PS LLVM code into si_shader_llvm_ps.cMarek Olšák2020-01-147-1283/+1317
| | | | | | | | This is an attempt to clean up si_shader.c. v2: don't move code that is not specific to LLVM Reviewed-by: Timothy Arceri <[email protected]> (v1)
* radeonsi: remove always constant ballot_mask_bits from si_llvm_context_initMarek Olšák2020-01-143-10/+6
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: fold si_create_function into si_llvm_create_funcMarek Olšák2020-01-144-43/+30
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: rename si_shader_create -> si_create_shader_variant for clarityMarek Olšák2020-01-144-8/+10
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: rename si_compile_tgsi_main -> si_build_main_functionMarek Olšák2020-01-141-5/+5
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: clean up si_shader_infoMarek Olšák2020-01-143-131/+45
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: merge si_tessctrl_info into si_shader_infoMarek Olšák2020-01-144-23/+10
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: fork tgsi_shader_info and tgsi_tessctrl_infoMarek Olšák2020-01-1412-56/+205
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: rename si_shader_info -> si_shader_binary_infoMarek Olšák2020-01-141-2/+2
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: remove TGSI from commentsMarek Olšák2020-01-144-11/+9
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: rename DBG_NO_TGSI -> DBG_NO_NIRMarek Olšák2020-01-143-3/+3
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: don't adjust depth and stencil PS output locationsMarek Olšák2020-01-142-11/+3
| | | | | | this was for compatibility with TGSI Reviewed-by: Timothy Arceri <[email protected]>
* nir: Add missing nir_var_mem_global to various passesCaio Marcelo de Oliveira Filho2020-01-144-16/+28
| | | | | | Reviewed-by: Jason Ekstrand <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3322> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3322>
* spirv: Handle PhysicalStorageBuffer in memory barriersCaio Marcelo de Oliveira Filho2020-01-141-2/+6
| | | | | | | | | | | | | PhysicalStorageBuffer is lowered to nir_var_mem_global, and SPIR-V 1.5rev1 in section "3.25. Memory Semantics <id>" says UniformMemory Apply the memory-ordering constraints to StorageBuffer, PhysicalStorageBuffer, or Uniform Storage Class memory. Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3322>
* spirv: Drop EXT for PhysicalStorageBuffer symbolsCaio Marcelo de Oliveira Filho2020-01-142-11/+11
| | | | | Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3322>
* aco: Flip s_cbranch / s_cselect to optimize out an s_not if possible.Timur Kristóf2020-01-142-8/+51
| | | | | | | | | | | | | | | | | | | | | When possible, get rid of an s_not when all it does is invert the SCC, and its successor s_cbranch / s_cselect can be inverted instead. Also modify some parts of instruction_selection to take advantage of this feature. Example: s2: %3900, s1: %3899:scc = s_andn2_b64 %0:exec, %406 s2: %3902 = s_cselect_b64 -1, 0, %3900:scc s2: %407, s1: %3903:scc = s_not_b64 %3902 s2: %3906, s1: %3905:scc = s_and_b64 %407, %0:exec p_cbranch_z %3905:scc Can now be optimized to: s2: %3900, s1: %3899:scc = s_andn2_b64 %0:exec, %406 p_cbranch_nz %3900:scc Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: Optimize out s_and with exec, when used on uniform bitwise values.Timur Kristóf2020-01-141-4/+31
| | | | | | | | | | | | | Previously all booleans needed an s_and with exec when they were turned into a scalar condition. However, this is not needed for uniform booleans. v2 by Daniel Schürmann: - Make the code more readable v3 by Timur Kristóf: - Fix regressions, make it work in wave32 mode Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: Don't skip combine_instruction when definitions[1] is used.Timur Kristóf2020-01-141-1/+1
| | | | | Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
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