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* intel/compiler: add instruction setters for Src1Type and Src2Type.Iago Toral Quiroga2019-04-181-0/+2
* intel/compiler: drop unnecessary temporary from 32-bit fsign implementationIago Toral Quiroga2019-04-181-3/+2
* intel/compiler: implement 16-bit fsignIago Toral Quiroga2019-04-181-1/+16
* intel/compiler: handle extended math restrictions for half-floatIago Toral Quiroga2019-04-183-12/+34
* intel/compiler: lower some 16-bit float operations to 32-bitIago Toral Quiroga2019-04-181-0/+5
* intel/compiler: assert restrictions on conversions to half-floatIago Toral Quiroga2019-04-181-2/+3
* intel/compiler: handle b2i/b2f with other integer conversion opcodesIago Toral Quiroga2019-04-181-8/+8
* intel/compiler: split float to 64-bit opcodes from int to 64-bitIago Toral Quiroga2019-04-181-0/+7
* intel/compiler: add a NIR pass to lower conversionsIago Toral Quiroga2019-04-185-0/+175
* Add no_aos_sampling GALLIVM_PERF optionDominik Drees2019-04-173-4/+11
* ac: use struct/raw store intrinsics for 8-bit/16-bit int with LLVM 9+Samuel Pitoiset2019-04-171-14/+34
* ac: use struct/raw load intrinsics for 8-bit/16-bit int with LLVM 9+Samuel Pitoiset2019-04-171-12/+38
* ac: add support for more types with struct/raw LLVM intrinsicsSamuel Pitoiset2019-04-171-20/+26
* radv: add VK_KHR_shader_atomic_int64 but disable it for nowSamuel Pitoiset2019-04-173-0/+12
* ac/nir: add 64-bit SSBO atomic operations supportSamuel Pitoiset2019-04-171-3/+7
* ac/nir: use new LLVM 8 intrinsics for SSBO atomics except cmpswapSamuel Pitoiset2019-04-171-13/+18
* gallivm: fix saturated signed add / sub with llvm 9Roland Scheidegger2019-04-171-0/+14
* meson: Add dependency on genxml to anvil genfilesJuan A. Suarez Romero2019-04-171-1/+1
* intel/perf: constify accumlator parameterLionel Landwerlin2019-04-172-3/+3
* intel/perf: drop counter size fieldLionel Landwerlin2019-04-174-9/+26
* i965: perf: add mdapi pipeline statistics queries on gen10/11Lionel Landwerlin2019-04-172-1/+10
* intel/perf: stub gen10/11 missing definitionsLionel Landwerlin2019-04-171-0/+4
* i965: move mdapi guid into intel/perfLionel Landwerlin2019-04-172-2/+4
* i965: move mdapi result data format to intel/perfLionel Landwerlin2019-04-177-98/+138
* i965: move brw_timebase_scale to device infoLionel Landwerlin2019-04-176-19/+22
* i965: move OA accumulation code to intel/perfLionel Landwerlin2019-04-175-199/+229
* i965: move mdapi data structure to intel/perfLionel Landwerlin2019-04-173-97/+128
* i965: extract performance query metricsLionel Landwerlin2019-04-1731-866/+1098
* i965: store device revision in gen_device_infoLionel Landwerlin2019-04-174-6/+5
* intel/compiler/icl: Use tcs barrier id bits 24:30 instead of 24:27Topi Pohjolainen2019-04-171-7/+17
* virgl: document potentially failing blitErik Faye-Lund2019-04-171-0/+6
* virgl: do color-conversion during when mapping transferErik Faye-Lund2019-04-171-10/+70
* virgl: only blit if resource is readErik Faye-Lund2019-04-171-2/+5
* virgl: get readback-formats from hostErik Faye-Lund2019-04-173-0/+44
* gallium/util: support translating between uint and sint formatsErik Faye-Lund2019-04-171-0/+62
* virgl: make sure bind is set for non-buffersErik Faye-Lund2019-04-171-0/+3
* virgl: support write-back with staged transfersErik Faye-Lund2019-04-172-22/+49
* virgl: use pipe_box for blit dst-rectErik Faye-Lund2019-04-171-5/+12
* virgl: rewrite core of virgl_texture_transfer_mapErik Faye-Lund2019-04-171-36/+58
* virgl: return error if allocating resolve_tmp failsErik Faye-Lund2019-04-171-0/+4
* virgl: wait for the right resourceErik Faye-Lund2019-04-171-1/+1
* virgl: check for readback on correct resourceErik Faye-Lund2019-04-171-1/+1
* virgl: make unmap queuing a bit more straight-forwardErik Faye-Lund2019-04-171-5/+7
* virgl: simplify virgl_texture_transfer_unmap logicErik Faye-Lund2019-04-171-13/+9
* virgl: track full virgl_resource instead of just virgl_hw_resErik Faye-Lund2019-04-171-5/+5
* virgl: tmp_resource -> templErik Faye-Lund2019-04-171-4/+3
* virgl: remove pointless transfer-counterErik Faye-Lund2019-04-174-4/+2
* radeonsi/nir: fix scanning of bindless imagesTimothy Arceri2019-04-171-38/+37
* iris: Add texture cache flushing hacks for blit and resource_copy_regionKenneth Graunke2019-04-161-0/+36
* v3d: Always set up the qregs for CSD payload.Eric Anholt2019-04-161-10/+2
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-24 15:48:04 +0000