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* mesa: move legacy TCL dri config optionsTimothy Arceri2018-09-189-151/+15
| | | | Reviewed-by: Marek Olšák <[email protected]>
* util: use force_compat_profile for Wolfenstein The Old BloodTimothy Arceri2018-09-181-0/+4
| | | | | | | | | | | This game is looking for some odd extension after creating a core context such as ARB_vertex_program and EXT_framebuffer_object. Rather then enabling these in core this forces the game to use compat. This allows the game to run and seems to work without issues. All other id tech games/engines use a compat profile. Reviewed-by: Marek Olšák <[email protected]>
* mesa/st: add force_compat_profile option to driconfigTimothy Arceri2018-09-183-2/+14
| | | | Reviewed-by: Marek Olšák <[email protected]>
* Revert "radeonsi: avoid syncing the driver thread in si_fence_finish"Timothy Arceri2018-09-183-52/+40
| | | | | | | | | | This reverts commit bc65dcab3bc48673ff6180afb036561a4b8b1119. This was manually reverted. Reverting stops the menu hanging in some id tech games such as RAGE and Wolfenstein The New Order. Reviewed-by: Marek Olšák <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107891
* v3d: Switch from FLUSH_ALL_STATE to FLUSH for ending our bin CLs.Eric Anholt2018-09-171-6/+6
| | | | | | The HW for FLUSH_ALL_STATE isn't validated, since the closed driver only uses FLUSH. Now that we don't have any new state at the end of our bin CLs, follow their lead.
* v3d: Stop clearing the OQ state at the end of the job.Eric Anholt2018-09-173-18/+1
| | | | | | Ever since we added OQ support, we've been clearing OQ state at the start of the job anyway. We're intentionally breaking old-and-new-driver-mix systems, because we need to stop using the unvalidated FLUSH_ALL_STATE.
* v3d: Always emit a TF disable at the start of drawing on V3D 4.x.Eric Anholt2018-09-173-10/+8
| | | | | | | | | | The HW's FLUSH_ALL_STATE is not validated, so we probably shouldn't use it, meaning that we need to reset state at the start. By doing this, we also make ourselves more resilient to another client leaving the TF state enabled at the end of their batch (as we now do, ourselves). However, we still need to emit a single TF disable at the end of the frame, for SWVC5-718.
* build: Don't overlink gallium xlib targetDylan Baker2018-09-172-2/+1
| | | | | | | | | | | | | | | | | | | | | Currently gallium's xlib target will fail to link due to multiple definitions of all the symbols in libmesautil, this only shows up in autotools, and not in meson due to differences in the way that meson and autotools handle linking static archives into static archives. Autotools uses -Wl,--whole-archive implicitly, meson requires this behavior to be opted-into. The solution is just to remove libmesautils from the libgl-xlib target, since it will get all of those symbols form libmesagallium. I've dropped the link from meson as well, it doesn't seem to hurt anything and should make linking just a little faster. Fixes: 8396043f304bb2a752130230055605c5c966e89f ("Replace uses of _mesa_bitcount with util_bitcount") bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107923 Tested-by: Brian Paul <[email protected]> Tested-by: Vinson Lee <[email protected]> Cc: Sergii Romantsov<[email protected]>
* move pthread_setaffinity_np check to the build systemDylan Baker2018-09-171-4/+0
| | | | | | | | | | | | | | | | | Rather than trying to encode all of the rules in a header, lets just put them in the build system where they belong. This fixes the build on FreeBSD, which does have pthraed_setaffinity_np, but it's in a pthread_np.h, not behind _GNU_SOURCE. FreeBSD also implements cpu_set slightly differently, so additional changes would be required to get it working right there anyway. v2: - fix #define in autotools Fixes: 9f1bbbdbbd77d346c74c7abbb31f399151a85713 ("util: try to fix the Android and MacOS build") Cc: Emil Velikov <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* mesa: FramebufferParameteri parameter checkingFritz Koenig2018-09-171-0/+1
| | | | | | | | | Missing break; causes parameter checking to never pass GL_FRAMEBUFFER_FLIP_Y_MESA parameters. Fixes: 318c265160 ("mesa: GL_MESA_framebuffer_flip_y extension [v4]") Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa: Additional FlipY applicationsFritz Koenig2018-09-172-3/+3
| | | | | | | | | | | | | Instances where direction was determined based on winsys or user fbo and should be determined based on FlipY. Key STATE_FB_WPOS_Y_TRANSFORM for of FlipY instead of _mesa_is_user_fbo. This corrects gl_FragCoord usage when applying GL_MESA_framebuffer_flip_y. Fixes: ab05dd183cc ("i965: implement GL_MESA_framebuffer_flip_y [v3]") Reviewed-by: Brian Paul <[email protected]>
* radv: Use build ID if available for cache UUID.Bas Nieuwenhuizen2018-09-171-8/+35
| | | | | | | | | | | To get an useful UUID for systems that have a non-useful mtime for the binaries. I started using SHA1 to ensure we get reasonable mixing in the various possibilities and the various build id lengths. CC: <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* radv: enable shaderInt16 capabilitySamuel Pitoiset2018-09-172-1/+2
| | | | | | | | | Not sure if this is all wired up. CTS does pass and the Tangrams demo works fine on Vega. There are corruption issues on Polaris but not sure if that related to 16-bit support. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add 16-bit support to ac_build_bitfield_reverse()Samuel Pitoiset2018-09-171-0/+5
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add 16-bit support to ac_build_bit_count()Samuel Pitoiset2018-09-171-0/+5
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add 16-bit support to ac_find_lsb()Samuel Pitoiset2018-09-171-2/+13
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add 16-bit support to ac_build_umsb()Samuel Pitoiset2018-09-171-2/+16
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add 16-bit support to ac_build_isign()Samuel Pitoiset2018-09-171-5/+16
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add 16-bit constant values for zero and oneSamuel Pitoiset2018-09-172-0/+4
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add ac_build_bifield_reverse() helperSamuel Pitoiset2018-09-173-1/+26
| | | | | | | Are we missing 64-bit support? Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add ac_build_bit_count() helperSamuel Pitoiset2018-09-173-6/+31
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: fix use of unreachable() in the meta blit pathSamuel Pitoiset2018-09-171-4/+4
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* Revert "radv: Optimize rebinding the same descriptor set."Samuel Pitoiset2018-09-171-7/+1
| | | | | | This introduces random GPU hangs on Vega, at least. This reverts commit 02a43edf186cb9998741ba765cb948bb238a122d.
* radv: fix descriptor pool allocation sizeSamuel Pitoiset2018-09-171-1/+2
| | | | | | | | | | | The size has to be multiplied by the number of sets. This gets rid of the OUT_OF_POOL_KHR error and fixes a crash with the Tangrams demo. CC: 18.1 18.2 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* anv/query: Add an emit_srm helperJason Ekstrand2018-09-171-32/+21
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Add a mi_memset and use it for zeroing queriesJason Ekstrand2018-09-173-12/+23
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* anv/query: Use anv_address everywhereJason Ekstrand2018-09-171-57/+64
| | | | | | | Instead of passing around BOs and offsets, use addresses which are anv's GPU equivalent of pointers. Reviewed-by: Lionel Landwerlin <[email protected]>
* anv/query: Write both dwords in emit_zero_queriesJason Ekstrand2018-09-171-0/+5
| | | | | | | Each query slot is a uint64_t and we were only zeroing half of it. Fixes: 7ec6e4e68980 "anv/query: implement multiview interactions" Reviewed-by: Lionel Landwerlin <[email protected]>
* anv/query: Increment an index while writing resultsJason Ekstrand2018-09-171-36/+31
| | | | | | | Instead of computing an index at the end which we hope maps to the number of things written, just count the number of things as we go. Reviewed-by: Lionel Landwerlin <[email protected]>
* i965/fs: Don't propagate conditional modifiers from integer compares to addsIan Romanick2018-09-171-1/+9
| | | | | | | | | | | | No shader-db changes on any Intel platform... which probably explains why no bugs have been bisected to this problem since it landed in Mesa 18.1. :( The commit mentioned below is in 18.2, so 18.1 would need a slightly different fix (due to code refactoring). Signed-off-by: Ian Romanick <[email protected]> Fixes: 77f269bb560 "i965/fs: Refactor propagation of conditional modifiers from compares to adds" Reviewed-by: Alejandro Piñeiro <[email protected]> (reviewed the original patch) Cc: Matt Turner <[email protected]> (reviewed the original patch)
* radv: Only allow 16 user SGPRs for compute on GFX9+.Bas Nieuwenhuizen2018-09-161-1/+1
| | | | | | | | | | Apparently for compute there are only 16 instead of the 32 for the graphics path. Fixes dEQP-VK.binding_model.descriptorset_random.sets16.noarray.ubolimitlow.sbolimitlow.imglimitlow.noiub.comp.0 CC: <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Set the user SGPR MSB for Vega.Bas Nieuwenhuizen2018-09-161-0/+1
| | | | | | | Otherwise using 32 user SGPRs would be broken. CC: <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Optimize rebinding the same descriptor set.Bas Nieuwenhuizen2018-09-161-1/+7
| | | | | | | | This makes it cheaper to just change the dynamic offsets with the same descriptor sets. Suggested-by: Philip Rebohle <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* r600/sb: use safe math optimizations when TGSI contains precise operationsGert Wollny2018-09-153-1/+5
| | | | | | | | | | Fixes: dEQP-GLES3.functional.shaders.invariance.highp.common_subexpression_3 dEQP-GLES3.functional.shaders.invariance.mediump.common_subexpression_3 dEQP-GLES3.functional.shaders.invariance.lowp.common_subexpression_3 Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* android: broadcom/cle: export the broadcom top level path headersMauro Rossi2018-09-151-0/+2
| | | | | | | | | | | | | | | | | | | | Fixes the following building error in vc4 build: In file included from external/mesa/src/gallium/drivers/vc4/kernel/vc4_render_cl.c:34: In file included from external/mesa/src/gallium/drivers/vc4/kernel/vc4_drv.h:27: In file included from external/mesa/src/gallium/drivers/vc4/vc4_simulator_validate.h:34: In file included from external/mesa/src/gallium/drivers/vc4/vc4_context.h:39: In file included from external/mesa/src/gallium/drivers/vc4/vc4_cl.h:56: gen/STATIC_LIBRARIES/libmesa_broadcom_genxml_intermediates/broadcom/cle/v3d_packet_v21_pack.h:12:10: fatal error: 'cle/v3d_packet_helpers.h' file not found ^~~~~~~~~~~~~~~~~~~~~~~~~~ 1 error generated. Fixes: 5b102160ae ("broadcom/genxml: Introduce a V3D packet/struct decoder.") Cc: "18.2" <[email protected]> Acked-by: Eric Anholt <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Signed-off-by: Mauro Rossi <[email protected]>
* android: broadcom/cle: add gallium include pathMauro Rossi2018-09-151-0/+2
| | | | | | | | | | | | | | | | | Fixes the following building error: In file included from external/mesa/src/broadcom/cle/v3d_decoder.c:38: In file included from external/mesa/src/broadcom/cle/v3d_packet_helpers.h:29: external/mesa/src/gallium/auxiliary/util/u_math.h:42:10: fatal error: 'pipe/p_compiler.h' file not found ^~~~~~~~~~~~~~~~~~~ 1 error generated. Fixes: 5b102160ae ("broadcom/genxml: Introduce a V3D packet/struct decoder.") Cc: "18.2" <[email protected]> Acked-by: Eric Anholt <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Signed-off-by: Mauro Rossi <[email protected]>
* android: broadcom/genxml: fix collision with intel/genxml header-gen macroMauro Rossi2018-09-151-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes the following building error, happening when building both intel and broadcom: Gen Header: libmesa_broadcom_genxml_32 <= v3d_packet_v21_pack.h FAILED: gen/STATIC_LIBRARIES/libmesa_broadcom_genxml_intermediates/broadcom/cle/v3d_packet_v21_pack.h /bin/bash -c "python external/mesa/src/broadcom/cle/gen_pack_header.py \ external/mesa/src/broadcom/cle/v3d_packet_v21.xml \ > gen/STATIC_LIBRARIES/libmesa_broadcom_genxml_intermediates/broadcom/cle/v3d_packet_v21_pack.h" Traceback (most recent call last): File "external/mesa/src/broadcom/cle/gen_pack_header.py", line 626, in <module> p = Parser(sys.argv[2]) IndexError: list index out of range header-gen macro is already defined by Intel genxml building rules and the existing header-gen does not have the $(PRIVATE_VER) argument, infact the bash command line logged in the building error is missing exactly $(PRIVATE_VER) argument Renaming the macro as pack-header-gen in src/broadcom/Android.genxml.mk solves the building error, another possible way is to keep the gen rules commands expanded and not use the macros. Fixes: 7f80a9ff13 ("vc4: Introduce XML-based packet header generation like Intel's.") Cc: "18.2" <[email protected]> Acked-by: Eric Anholt <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Signed-off-by: Mauro Rossi <[email protected]>
* anv/memcpy: fix build after starting to use addressesCaio Marcelo de Oliveira Filho2018-09-141-2/+2
| | | | | | | | The offsets now come from the anv_address, these references were not updated and using the old variable. Fixes: e1ab8345574 "anv/memcpy: Use addresses instead of bo+offset" Tested-by: Clayton Craft <[email protected]>
* anv/cmd_buffer: Take an address in emit_lrmJason Ekstrand2018-09-141-17/+16
| | | | Reviewed-by: Eric Engestrom <[email protected]>
* anv/memcpy: Use addresses instead of bo+offsetJason Ekstrand2018-09-143-35/+34
| | | | Reviewed-by: Eric Engestrom <[email protected]>
* anv/so_memcpy: Use the correct SO_BUFFER size on gen8+Jason Ekstrand2018-09-141-1/+1
| | | | | | | This shouldn't matter as we'll never write OOB anyway but we may as well get it right. It's supposed to be in dwords - 1. Reviewed-by: Nanley Chery <[email protected]>
* ac: fix get_image_coords() for radeonsiTimothy Arceri2018-09-151-1/+2
| | | | | | | | | | Because this was setting image to true we would end up calling si_load_image_desc() when we sould be calling si_load_sampler_desc(). This fixes an assert() in Deus Ex: MD Reviewed-by: Marek Olšák <[email protected]>
* gallium/util: don't let child processes inherit our thread affinityMarek Olšák2018-09-141-4/+32
| | | | v2: corrected the comment
* gallium/util: start with a random L3 cache index for AMD ZenMarek Olšák2018-09-141-4/+16
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* st/mesa: Validate the result of pipe_transfer_map in make_texture (v2)Josh Pieper2018-09-141-8/+12
| | | | | | | | | | | | | | When using Freecad, I was getting intermittent segfaults inside of mesa. I traced it down to this path in st_cb_drawpixels.c where the result of pipe_transfer_map wasn't being checked. In my case, it was returning NULL because nouveau_bo_new returned ENOENT. I'm by no means a mesa developer, but this patch solves the problem for me and seems reasonable enough. v2: Marek - also unmap the PBO and release the texture, and call the make_texture function sooner for less cleanup Cc: 18.1 18.2 <[email protected]>
* radv: emit the initial config only once in the preamblesSamuel Pitoiset2018-09-144-50/+48
| | | | | | | | | It shouldn't be needed to emit the initial graphics or compute state when beginning a new command buffer. Emitting them in the preamble should be enough and this will reduce IB sizes. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: fix setting global locations for indirect descriptorsSamuel Pitoiset2018-09-141-1/+0
| | | | | | | | | | | | Indirect descriptors only need one entry, we don't have to emit a location for every descriptors. Fixes GPU hangs with new CTS: dEQP-VK.binding_model.descriptorset_random.* CC: 18.2 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: fix flushing indirect descriptorsSamuel Pitoiset2018-09-141-3/+9
| | | | | | | | | | | | | | Let say, we first bind a graphics pipeline that needs indirect descriptors sets. The userdata pointers will be emitted at draw time. Then if we bind a compute pipeline that doesn't need any indirect descriptors, the driver will re-emit them for all grpahics stages. To avoid this to happen, just check the bind point type. CC: 18.2 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: fix GPU hangs with 32-bit indirect descriptorsSamuel Pitoiset2018-09-141-3/+5
| | | | | | | | | | | LLVM 6 isn't affected. Fixes GPU hangs with new CTS: dEQP-VK.binding_model.descriptorset_random.* CC: 18.2 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: handle loc->indirect correctly for the first descriptorSamuel Pitoiset2018-09-142-11/+10
| | | | | | | | | | | | | This was wrong for descriptor #0 when all of them are indirect. This is because indirect_offset was 0 and we emitted a "normal" descriptor pointer for nothing. While we are at it remove radv_userdata_info::indirect_offset which is useless. CC: 18.2 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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