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* r600g,radeonsi: don't skip the context flush if a fence should be returnedMarek Olšák2014-04-182-2/+2
| | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77589
* svga: fix comment for emit_adjusted_vertex_attribs()Brian Paul2014-04-171-3/+3
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* svga: compute need_swvfetch in svga_create_vertex_elements_state()Brian Paul2014-04-173-13/+9
| | | | | | This saves us doing it at state validation time. Reviewed-by: Matthew McClure <[email protected]>
* svga: add VS code to set attribute W component to 1Brian Paul2014-04-175-46/+100
| | | | | | | | | | | | | | | There's a few 3-component vertex attribute formats that have no equivalent SVGA3D_DECLTYPE_x format. Previously, we had to use the swtnl code to handle them. This patch lets us use hwtnl for more vertex attribute types by fetching 3-component attributes as 4-component attributes and explicitly setting the W component to 1. This lets us handle PIPE_FORMAT_R16G16B16_SNORM/UNORM and PIPE_FORMAT_R8G8B8_UNORM vertex attribs without using the swtnl path. Fixes piglit normal3b3s GL_SHORT test. Reviewed-by: Charmaine Lee <[email protected]>
* svga: implement support for signed byte vertex attributesBrian Paul2014-04-176-14/+151
| | | | | | | | | | | | | | There's no SVGA3D_DECLTYPE that directly corresponds to PIPE_FORMAT_R8G8B8_SNORM. Previously, we used the swtnl fallback path to handle this but that's slow and causes invariance issues. Now we fetch the attribute as SVGA3D_DECLTYPE_UBYTE4N and insert some extra VS instructions to remap the attributes from the range [0,1] to the range[-1,1]. Fixes Sauerbraten sw fallback. Fixes piglit normal3b3s-invariance test. Reviewed-by: Charmaine Lee <[email protected]>
* svga: move translated vertex declaration types into svga_velems_stateBrian Paul2014-04-174-40/+45
| | | | | | | Now only translate the formats once in svga_create_vertex_elements_state(). And rename the array and use the proper SVGA3dDeclType type. Reviewed-by: Charmaine Lee <[email protected]>
* Revert "svga: add work-around for Sauerbraten Z fighting issue"Brian Paul2014-04-173-49/+2
| | | | | | | | | | | | This reverts commit c875d6e57a817bb6a8163a8a98ebd2768ee91848. Conflicts: src/gallium/drivers/svga/svga_context.c This work-around will no longer be needed after the next patch which properly supports signed-byte vertex attributes. Reviewed-by: Charmaine Lee <[email protected]>
* svga: use new inst_token_setp() helper functionBrian Paul2014-04-172-12/+26
| | | | Reviewed-by: Charmaine Lee <[email protected]>
* svga: use new inst_token_predicated() helper functionBrian Paul2014-04-172-13/+25
| | | | Reviewed-by: Charmaine Lee <[email protected]>
* i965: Retype pre-Gen6 varying pull load destination to UW.Kenneth Graunke2014-04-171-1/+1
| | | | | | | | | | | | This sets up the proper execution mask for sends in SIMD16 mode. Fixes Piglit's glsl-fs-normalmatrix, glsl-fs-uniform-array-2, glsl-fs-uniform-array-6, and glsl-fs-uniform-array-7 on Ironlake, which regressed when I enabled SIMD16 pull parameter support in commit b207e88b25e526d0f1ada7b19605b880a27866dc. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* mesa: Fix error condition for multisample proxy texture targetsAnuj Phogat2014-04-171-3/+13
| | | | | | | | Fixes failures in Khronos OpenGL CTS test proxy_textures_invalid_samples Cc: <[email protected]> Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add glBlitFramebuffer to commands affected by conditional renderingAnuj Phogat2014-04-171-0/+8
| | | | | | | | Fixes failures in Khronos OpenGL CTS test conditional_render_test9 Cc: <[email protected]> Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* swrast: Add glBlitFramebuffer to commands affected by conditional renderingAnuj Phogat2014-04-171-0/+8
| | | | | | Cc: <[email protected]> Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* i965: Fix component mask and varying_to_slot mapping for gl_ViewportIndexAnuj Phogat2014-04-171-1/+5
| | | | | | | | | | | | | | | | gl_ViewportIndex doesn't get its own varying slot. It is stored in VARYING_SLOT_PSIZ.z. This patch fixes the issue for both gen7 and gen8 because gen7_upload_3dstate_so_decl_list() is shared between them. Fixes failures in OpenGL Khronos CTS test transform_feedback_builtins. Makes new piglit test glsl-1.50-transform-feedback-builtins pass for 'gl_ViewportIndex'. Cc: <[email protected]> Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Fix component mask and varying_to_slot mapping for gl_LayerAnuj Phogat2014-04-171-4/+14
| | | | | | | | | | | | | | | | gl_Layer doesn't get its own varying slot. It is stored in VARYING_SLOT_PSIZ.y. This patch fixes the issue for both gen7 and gen8 because gen7_upload_3dstate_so_decl_list() is shared between them. Fixes failures in OpenGL Khronos CTS test transform_feedback_builtins. Makes new piglit test glsl-1.50-transform-feedback-builtins pass for 'gl_Layer'. Cc: <[email protected]> Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Put an assertion to check valid varying_to_slot[varying]Anuj Phogat2014-04-171-0/+1
| | | | | | | Cc: <[email protected]> Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* radeonsi: Added Diag Handler to receive LLVM Error messagesDarren Powell2014-04-173-9/+55
| | | | Reviewed-by: Tom Stellard <[email protected]>
* winsys/radeon: remove some unused codeMarek Olšák2014-04-171-28/+8
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* winsys/radeon: remove is_handle_added arrayMarek Olšák2014-04-172-30/+34
| | | | | | Use index -1 if a buffer is not added. Reviewed-by: Michel Dänzer <[email protected]>
* winsys/radeon: remove local variable reloc from radeon_get_relocMarek Olšák2014-04-171-5/+2
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* winsys/radeon: remove parameter reloc from radeon_get_relocMarek Olšák2014-04-172-11/+8
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* util: Add __declspec(noreturn) to _debug_assert_fail().José Fonseca2014-04-171-0/+3
| | | | | | | | Mostly for consistency; as MSVC's static source code analysis doesn't seem to rely on assertions, but instead on different kind of source annotations( http://msdn.microsoft.com/en-us/library/hh916383.aspx ). Reviewed-by: Brian Paul <[email protected]>
* auxiliary/os,auxiliary/util: Fix the `‘noreturn’ function does return` ↵José Fonseca2014-04-172-5/+2
| | | | | | | | | | | | | | | | warning. Now that _debug_assert_fail() has the noreturn attribute, it is better that execution truly never returns. Not just for sake of silencing the warning, but because the code at the return IP address may be invalid or lead to inconsistent results. This removes support for the GALLIUM_ABORT_ON_ASSERT debugging environment variable, but between the usefulness of GALLIUM_ABORT_ON_ASSERT and better static code analysis I think better static code analysis wins. Reviewed-by: Brian Paul <[email protected]>
* gallium glsl: Fix crash with piglit ↵Maarten Lankhorst2014-04-171-1/+4
| | | | | | | | | | | | | | fs-deref-literal-array-of-structs.shader_test This allows the following shader code to work without a weird crash: struct Foo { int value[1]; }; int actual_value = Foo[2](Foo(int[1](100)), Foo(int[1](200)))[i].value[0]; Signed-off-by: Maarten Lankhorst <[email protected]>
* nouveau/vdec: small fixes to h264 handlingMaarten Lankhorst2014-04-174-24/+24
| | | | | | | | | | | nouveau_vp3_inter_sizes requires sliec_count as argument just as the other places that call it from h264 code do. Hopefully fixes something. Fix the status_vp code to allow status == 0 too, when processing hasn't started yet. set h264->second_field correctly.
* st/xa: Cache render target surfaceThomas Hellstrom2014-04-171-3/+15
| | | | | | | | | | | | | | | | Otherwise it will trick the gallium driver into thinking that the render target has actually changed (due to different pipe_surface pointing to same underlying pipe_resource). This is really badness for tiling GPUs like adreno. This also appears to fix a rendering error with Motif on vmwgfx. Why that is is still under investigation. Based on an idea by Rob Clark. Cc: "10.0 10.1" <[email protected]> Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Rob Clark <[email protected]>
* st/xa: scissor to help tilersRob Clark2014-04-174-0/+48
| | | | | | | | | | | | | | Keep track of the maximal bounds of all the operations and set scissor accordingly. For tiling GPU's this can be a big win by reducing the memory bandwidth spent moving pixels from system memory to tile buffer and back. You could imagine being more sophisticated and splitting up disjoint operations. But this simplistic approach is good enough for the common cases. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]>
* st/xa: remove unneeded argsRob Clark2014-04-175-12/+8
| | | | | Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]>
* glsl: Small optimization for constant conditionalsIago Toral Quiroga2014-04-161-8/+2
| | | | | | | | Once the relevant branch has been identified do not iterate over the instructions in the branch, do a linked list insertion instead to avoid the loop. Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: Fix incorrect indentation.Iago Toral Quiroga2014-04-161-793/+782
| | | | Acked-by: Kenneth Graunke <[email protected]>
* meta: Clip src/dest rects in BlitFramebuffer, using the scissorChris Forbes2014-04-172-2/+43
| | | | | | | | | | | | | | | | | Fixes piglit's fbo-blit-stretch test on drivers which use the meta path. (i965: should fix Broadwell, but also fixes Sandybridge/Ivybridge/Haswell since this test falls off the blorp path now due to format conversion) V2: Use scissor instead of just mangling the rects, to avoid texcoord rounding problems. (Thanks Marek) V3: Rebase on Eric's CTSI meta changes; re-add _mesa_update_state in the CTSI path so that _mesa_clip_blit sees the correct bounds. Signed-off-by: Chris Forbes <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77414 Reviewed-by: Anuj Phogat <[email protected]> Tested-by: Anuj Phogat <[email protected]>
* mesa: fix check for dummy renderbuffer in _mesa_FramebufferRenderbufferEXT()Samuel Iglesias Gonsalvez2014-04-161-2/+1
| | | | | | | | | | | | | | | | | | | | According to the spec: <renderbuffertarget> must be RENDERBUFFER and <renderbuffer> should be set to the name of the renderbuffer object to be attached to the framebuffer. <renderbuffer> must be either zero or the name of an existing renderbuffer object of type <renderbuffertarget>, otherwise an INVALID_OPERATION error is generated. This patch changes the previous returned GL_INVALID_VALUE to GL_INVALID_OPERATION. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76894 Cc: [email protected] Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Samuel Iglesias Gonsalvez <[email protected]>
* i965: Don't make instructions with a null dest a barrier to scheduling.Matt Turner2014-04-161-4/+8
| | | | | | | | | | | | | | | | Now that we properly track accumulator dependencies, the scheduler is able to schedule instructions between the mach and mov in the common the integer multiplication pattern: mul acc0, x, y mach null, x, y mov dest, acc0 Since a null destination implies no dependency on the destination, we can also safely schedule instructions (that don't write the accumulator) between the mul and mach. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Change fs_visitor::emit_lrp to use MAC for gen<6Juha-Pekka Heikkila2014-04-161-7/+4
| | | | | | | | | This allows us to emit ADD/MUL/MAC instead of MUL/ADD/MUL/ADD, saving one instruction and two temporary registers. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Juha-Pekka Heikkila <[email protected]>
* i965/fs: Add support for the MAC instruction.Juha-Pekka Heikkila2014-04-162-0/+4
| | | | | | | | | | This allows us to generate the MAC (multiply-accumulate) instruction, which can be used to implement some expressions in fewer instructions than doing a series of MUL and ADDs. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Juha-Pekka Heikkila <[email protected]>
* i965/vec4: Change vec4_visitor::emit_lrp to use MAC for gen<6Juha-Pekka Heikkila2014-04-161-16/+6
| | | | | | | | | This allows us to emit ADD/MUL/MAC instead of MUL/ADD/MUL/ADD, saving one instruction and two temporary registers. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Juha-Pekka Heikkila <[email protected]>
* i965/vec4: Add support for the MAC instruction.Juha-Pekka Heikkila2014-04-163-0/+5
| | | | | | | | | | This allows us to generate the MAC (multiply-accumulate) instruction, which can be used to implement some expressions in fewer instructions than doing a series of MUL and ADDs. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Juha-Pekka Heikkila <[email protected]>
* i965: Add writes_accumulator flagJuha-Pekka Heikkila2014-04-168-35/+131
| | | | | | | | | | | | | | | | | | | | | | | Our hardware has an "accumulator" register, which can be used to store intermediate results across multiple instructions. Many instructions can implicitly write a value to the accumulator in addition to their normal destination register. This is enabled by the "AccWrEn" flag. This patch introduces a new flag, inst->writes_accumulator, which allows us to express the AccWrEn notion in the IR. It also creates a n ALU2_ACC macro to easily define emitters for instructions that implicitly write the accumulator. Previously, we only supported implicit accumulator writes from the ADDC, SUBB, and MACH instructions. We always enabled them on those instructions, and left them disabled for other instructions. To take advantage of the MAC (multiply-accumulate) instruction, we need to be able to set AccWrEn on other types of instructions. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Juha-Pekka Heikkila <[email protected]>
* i965: Add is_accumulator() function.Juha-Pekka Heikkila2014-04-164-0/+28
| | | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Juha-Pekka Heikkila <[email protected]>
* i965: Add reads_accumulator_implicitly() function.Matt Turner2014-04-162-0/+14
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Add error condition for integer formats in glGetTexImage()Anuj Phogat2014-04-161-0/+5
| | | | | | | | | | | | | | OpenGL 4.0 spec, page 306 suggests an INVALID_OPERATION in glGetTexImage if : "format is one of the integer formats in table 3.3 and the internal format of the texture image is not integer, or format is not one of the integer formats in table 3.3 and the internal format is integer." V2: Use helper function _mesa_is_format_integer() Cc: <[email protected]> Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa: Add helper function _mesa_is_format_integer()Anuj Phogat2014-04-162-0/+12
| | | | | | | | This function will be used in the following patch. Cc: <[email protected]> Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa: Fix glGetVertexAttribi(GL_VERTEX_ATTRIB_ARRAY_SIZE)Anuj Phogat2014-04-161-1/+1
| | | | | | | | | | | | | | | mesa currently returns 4 when GL_VERTEX_ATTRIB_ARRAY_SIZE is queried for a vertex array initially set up with size=GL_BGRA. This patch makes changes to return size=GL_BGRA as required by the spec. Fixes Khronos OpenGL CTS test: vertex_array_bgra_basic.test V2: Use array->Format instead of adding a new variable Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Cc: <[email protected]>
* glsl: Fix copy-paste error in linker_warning()Anuj Phogat2014-04-161-1/+1
| | | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* r600g: Disable LLVM by default at runtime for graphicsMichel Dänzer2014-04-173-5/+5
| | | | | | | | | | | | | | | | | For graphics, the LLVM compiler backend currently has many shortcomings compared to the non-LLVM one. E.g. it can't handle geometry shaders yet, but that's just the tip of the iceberg. So building Mesa with --enable-r600-llvm-compiler is currently not recommended for anyone who doesn't want to work on fixing those issues. However, for protection of users who end up enabling it anyway for some reason, let's disable the LLVM backend at runtime by default. It can be enabled with the environment variable R600_DEBUG=llvm. Cc: "10.1" <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* gallivm: fix compilation with llvm 3.5 r206241+Roland Scheidegger2014-04-161-11/+20
| | | | | | | Just adjust to the ever-changing API, pass in MCContext when creating the MCDisassembler. Reviewed-by: Tom Stellard <[email protected]>
* r600g,radeonsi: share some of gfx flush codeMarek Olšák2014-04-164-82/+55
| | | | Reviewed-by: Christian König <[email protected]>
* r600g,radeonsi: share r600_flush_from_stMarek Olšák2014-04-163-34/+17
| | | | Reviewed-by: Christian König <[email protected]>
* r600g: merge r600_flush with r600_context_flushMarek Olšák2014-04-163-45/+33
| | | | Reviewed-by: Christian König <[email protected]>
* radeonsi: merge si_flush with si_context_flushMarek Olšák2014-04-164-38/+33
| | | | | | This also removes si_flush_gfx_ring. Reviewed-by: Christian König <[email protected]>
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