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* util/os_file: avoid shadowing read() with a local variableEric Engestrom2019-06-091-5/+5
* util/os_file: actually return the error read() gave usEric Engestrom2019-06-091-1/+3
* virgl: Work around possible memory exhaustionAlexandros Frantzis2019-06-073-3/+22
* virgl: Remove incorrect resource wait conditionAlexandros Frantzis2019-06-071-13/+0
* virgl: Use copy transfers for texturesAlexandros Frantzis2019-06-072-9/+87
* virgl: Use buffer copy transfers to avoid waiting when mappingAlexandros Frantzis2019-06-076-6/+137
* virgl: Support copy transfersAlexandros Frantzis2019-06-075-5/+70
* virgl: Add copy_transfer3d definitionsAlexandros Frantzis2019-06-072-0/+9
* virgl: Make VIRGL_BIND_STAGING resources cacheableAlexandros Frantzis2019-06-072-2/+4
* virgl: Support VIRGL_BIND_STAGINGAlexandros Frantzis2019-06-073-4/+16
* virgl: Avoid unfinished transfer_get with PIPE_TRANSFER_DONTBLOCKAlexandros Frantzis2019-06-071-9/+12
* virgl: Deduplicate checks for resource cachingAlexandros Frantzis2019-06-074-20/+14
* virgl: Don't try to use cached resources for legacy fencesAlexandros Frantzis2019-06-072-6/+12
* virgl: More info about chosen alignment valueAlexandros Frantzis2019-06-071-0/+5
* virgl: store all info about atomic buffersChia-I Wu2019-06-072-16/+23
* virgl: add shader images to virgl_shader_binding_stateChia-I Wu2019-06-072-14/+27
* virgl: add SSBOs to virgl_shader_binding_stateChia-I Wu2019-06-072-14/+26
* virgl: add UBOs to virgl_shader_binding_stateChia-I Wu2019-06-072-20/+37
* virgl: add virgl_shader_binding_stateChia-I Wu2019-06-072-43/+44
* iris: Zero shs->cbuf0 when binding a passthrough TCSKenneth Graunke2019-06-071-0/+16
* intel/blorp: Only double the fast-clear rect alignment on HSWJason Ekstrand2019-06-071-10/+15
* freedreno/a6xx: re-arrange program stageobj/groupRob Clark2019-06-074-30/+58
* freedreno/a6xx: fix hangs with newer sqe fwRob Clark2019-06-071-32/+81
* freedreno/a6xx: WFI before RB_CCU_CNTL writesRob Clark2019-06-072-0/+4
* freedreno/a6xx: don't pre-dispatch texture fetch on accidentRob Clark2019-06-071-1/+4
* freedreno/a6xx: fix issues with gallium HUDRob Clark2019-06-071-5/+8
* anv/cmd_buffer: Initalize the clear color struct for CNL+Nanley Chery2019-06-071-13/+7
* glx/windows: Fix compilation with -Werror-formatJon Turney2019-06-072-5/+5
* iris: Rename bind_state to bind_shader_state.Kenneth Graunke2019-06-071-9/+9
* isl: Mark enum isl_channel_select packed so it becomes 1 byte.Kenneth Graunke2019-06-071-1/+1
* panfrost/ci: Texture wrap tests are legitimately fixedAlyssa Rosenzweig2019-06-071-58/+0
* panfrost/midgard: Lower inot to inor with 0Alyssa Rosenzweig2019-06-071-1/+2
* panfrost/midgard: Cleanup tag fetch in disassemblerAlyssa Rosenzweig2019-06-071-2/+3
* panfrost/midgard: Use fancy iteratorAlyssa Rosenzweig2019-06-071-1/+1
* panfrost/midgard: Cull dead branchesAlyssa Rosenzweig2019-06-072-2/+31
* panfrost/midgard: Add mir_print_bundle helperAlyssa Rosenzweig2019-06-072-0/+14
* panfrost/midgard/disasm: Pretty-print branch tagsAlyssa Rosenzweig2019-06-071-7/+34
* panfrost/ci: Note some since-fixed testsAlyssa Rosenzweig2019-06-071-26/+0
* panfrost/midgard: Vectorize I/OAlyssa Rosenzweig2019-06-073-7/+18
* panfrost/midgard: Remove varyings delay passAlyssa Rosenzweig2019-06-072-75/+9
* panfrost/midgard: Apply component to load_inputAlyssa Rosenzweig2019-06-071-0/+4
* nir: fix s/&&/||/ typoEric Engestrom2019-06-071-1/+1
* freedreno/a6xx: Drop struct stage arrayKristian H. Kristensen2019-06-071-144/+80
* freedreno/a6xx: Drop support for SS6_DIRECT shader uploadKristian H. Kristensen2019-06-071-30/+3
* freedreno/a6xx: Share shader_t_to_opcodeKristian H. Kristensen2019-06-073-35/+21
* freedreno/a6xx: Consolidate more of dword 0 building in fd6_draw_vboKristian H. Kristensen2019-06-071-31/+24
* freedreno: Move fd4_size2indextype() helper to freedreno_util.hKristian H. Kristensen2019-06-072-13/+13
* radv: enable VK_EXT_sample_locationsSamuel Pitoiset2019-06-072-9/+1
* radv: enable HTILE for images that might need variable sample locationsSamuel Pitoiset2019-06-071-7/+0
* radv: handle sample locations during automatic layout transitionsSamuel Pitoiset2019-06-072-18/+168