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* etnaviv: Reduce max offset to available hardware bits.Mathias Fröhlich2018-09-101-0/+2
| | | | | | Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* gallium: New cap PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET.Mathias Fröhlich2018-09-104-0/+12
| | | | | | | | | | | Introduce a new capability for the maximum value of pipe_vertex_element::src_offset. Initially just every driver backend returns the value previously set from _mesa_init_constants. So this shall end up in no functional change. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* virgl: don't send a shader create with no data. (v2)Dave Airlie2018-09-101-1/+1
| | | | | | | | | | | | | This fixes the situation where we'd send a shader with just the header and no data. piglit/glsl-max-varyings test was causing this to happen, and the renderer fix was breaking it. v2: drop fprintf Fixes: a8987b88ff1d "virgl: add driver for virtio-gpu 3D (v2)" Reviewed-by: Erik Faye-Lund <[email protected]>
* mesa: enable ARB_vertex_buffer_object in core profileTimothy Arceri2018-09-081-1/+1
| | | | | | | | | | This extension is required by "Wolfenstein: The Old Blood" and is exposed in core in the Nvidia binary driver. All the functions are just alias of the core functions so there should be nothing more to do. Reviewed-by: Ian Romanick <[email protected]>
* st/mesa: throttle texture uploads if their memory usage goes beyond a limitMarek Olšák2018-09-075-0/+165
| | | | | This prevents radeonsi from running out of memory. It also increases texture upload performance by being nice to the kernel memory manager.
* gallium: add PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGETMarek Olšák2018-09-0716-0/+24
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* Revert "gallium/os_thread: simplify helper pipe_current_thread_get_time_nano"Marek Olšák2018-09-071-1/+5
| | | | | | This reverts commit 6d477bc5460eec14c6a0d047a0384c9ce5c7609b. It fixes the Windows build hopefully.
* anv: Clamp scissors to the framebuffer boundaryJason Ekstrand2018-09-072-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Vulkan 1.1.81 spec says: "It is legal for offset.x + extent.width or offset.y + extent.height to exceed the dimensions of the framebuffer - the scissor test still applies as defined above. Rasterization does not produce fragments outside of the framebuffer, so such fragments never have the scissor test performed on them." Elsewhere, the Vulkan 1.1.81 spec says: "The application must ensure (using scissor if necessary) that all rendering is contained within the render area, otherwise the pixels outside of the render area become undefined and shader side effects may occur for fragments outside the render area. The render area must be contained within the framebuffer dimensions." Unfortunately, there's some room for interpretation here as to what the consequences are of having the render area set to exactly the framebuffer dimensions and having a scissor that is larger than the framebuffer. Given that GL and other APIs provide automatic clipping to the framebuffer, it makes sense that applications would assume that Vulkan does this as well. It costs us very little to play it safe and just clamp client-provided scissors to the framebuffer dimensions. Fortunately, the user is required to provide us with at least one scissor so we don't need to handle the case where they don't. Fixes: fb2a5ceb3264 "anv: Emit DRAWING_RECTANGLE once at driver..." Reviewed-by: Kenneth Graunke <[email protected]>
* anv: Disable the vertex cache when tessellating on SKL GT4Jason Ekstrand2018-09-071-1/+22
| | | | | | | | | | | I have no idea if I'm correct about what's going wrong or if this is the correct fix. However, in my multiple weeks of banging my head on this hang, a VUE reference counting bug seems to match all the symptoms and it definitely fixes the hang. Cc: [email protected] Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107280 Reviewed-by: Kenneth Graunke <[email protected]>
* anv: Implement a VF cache invalidate workaroundJason Ekstrand2018-09-071-0/+25
| | | | | | Known to fix nothing whatsoever but it's in the docs. Reviewed-by: Kenneth Graunke <[email protected]>
* anv: Re-emit vertex buffers when the pipeline changesJason Ekstrand2018-09-071-0/+2
| | | | | | | | Some of the bits of VERTEX_BUFFER_STATE such as access type, instance data step rate, and pitch come from the pipeline. Cc: [email protected] Reviewed-by: Kenneth Graunke <[email protected]>
* radeonsi: pin the winsys thread to the requested L3 cache (v2)Marek Olšák2018-09-074-0/+46
| | | | | | v2: rebase Reviewed-by: Brian Paul <[email protected]>
* gallium/u_threaded: implement set_context_param for thread pinning (v2)Marek Olšák2018-09-072-0/+41
| | | | | | | v2: - use set_context_param - set set_context_param even if the driver doesn't implement it Reviewed-by: Brian Paul <[email protected]>
* st/mesa: pin driver threads to a specific L3 cache on AMD Zen (v2)Marek Olšák2018-09-075-0/+116
| | | | | | v2: use set_context_param Reviewed-by: Brian Paul <[email protected]>
* gallium: add pipe_context::set_context_param for tuning perf on AMD Zen (v2)Marek Olšák2018-09-075-0/+59
| | | | | | | | | State trackers will not use the new param directly, but will instead use a helper in MakeCurrent that does the right thing. v2: rework the interface Reviewed-by: Brian Paul <[email protected]>
* gallium/os_thread: simplify helper pipe_current_thread_get_time_nanoMarek Olšák2018-09-071-5/+1
| | | | Reviewed-by: Brian Paul <[email protected]>
* gallium/u_cpu_detect: get the number of cores per L3 cache for AMD ZenMarek Olšák2018-09-072-0/+25
| | | | Reviewed-by: Brian Paul <[email protected]>
* gallium/u_cpu_detect: fix parsing the CPU familyMarek Olšák2018-09-071-1/+2
| | | | | | | | | | According to: https://support.amd.com/TechDocs/54945_PPR_Family_17h_Models_00h-0Fh.pdf Also Intel: https://www.microbe.cz/docs/CPUID.pdf Reviewed-by: Brian Paul <[email protected]>
* gallium/u_cpu_detect: fix a race condition on initializationMarek Olšák2018-09-071-8/+10
| | | | Reviewed-by: Brian Paul <[email protected]>
* Replace uses of _mesa_bitcount with util_bitcountDylan Baker2018-09-0736-134/+104
| | | | | | | | | | | | | and _mesa_bitcount_64 with util_bitcount_64. This fixes a build problem in nir for platforms that don't have popcount or popcountll, such as 32bit msvc. v2: - Fix additional uses of _mesa_bitcount added after this was originally written Acked-by: Eric Engestrom <[email protected]> (v1) Acked-by: Eric Anholt <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* move u_math to src/utilDylan Baker2018-09-0716-15/+15
| | | | | | | | | | | | | | | Currently we have two sets of functions for bit counts, one in gallium and one in core mesa. The ones in core mesa are header only in many cases, since they reduce to "#define _mesa_bitcount popcount", but they provide a fallback implementation. This is important because 32bit msvc doesn't have popcountll, just popcount; so when nir (for example) includes the core mesa header it doesn't (and shouldn't) link with core mesa. To fix this we'll promote the version out of gallium util, then replace the core mesa uses with the util version, since nir (and other non-core mesa users) can and do link with mesautils. Acked-by: Eric Engestrom <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Workaround the gen9 hw astc5x5 sampler bugJason Ekstrand2018-09-076-12/+131
| | | | | | | | | | | | | | gen9 hardware has a bug in the sampler cache that can cause GPU hangs whenever an texture with aux compression enabled is in the sampler cache together with an ASTC5x5 texture. Because we can't control what the client binds at any given time, we have two options: resolve the CCS or decompresss the ASTC. Doing a CCS or HiZ resolve is far less drastic and will likely have a smaller performance impact. Cc: [email protected] Reviewed-by: Kristian H. Kristensen <[email protected]> Tested-by: Tapani Pälli <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* v3d: Fix setup of the VCM cache size.Eric Anholt2018-09-072-2/+3
| | | | | | | | | | | There were two bugs working together to make things mostly work: I wasn't dividing the VPM output size available by the size of a batch (vertex), but I also had the size of the VPM reduced by a factor of 8. Fixes dEQP-GLES3.functional.vertex_array_objects.all_attributes and it seems also my intermittent varying failures. Fixes: 1561e4984eb0 ("v3d: Emit the VCM_CACHE_SIZE packet.")
* v3d: Fix SRC_ALPHA_SATURATE blending for RTs without alpha.Eric Anholt2018-09-071-1/+3
| | | | | | | | Fixes dEQP-GLES3.functional.fragment_ops.blend.default_framebuffer.rgb_func_alpha_func.dst.src_alpha_saturate_src_alpha_saturate and friends with --deqp-egl-config-name=rgb565d0s0 Cc: "18.2" <[email protected]>
* intel/genxml: turn SLM Enable bit into booleanLionel Landwerlin2018-09-073-3/+3
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/tools: 32bit compilation with mesonSergii Romantsov2018-09-071-1/+1
| | | | | | | | | | | Building of 32bit mesa with meson causes issue: "implicit declaration of function ‘__builtin_ia32_clflush’". Fixed by adding msse2 compilation flag. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107843 Fixes: 314879f7fec0 (i965: Fix asynchronous mappings on !LLC platforms.) Signed-off-by: Sergii Romantsov <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel: compiler option msse2 and mstackrealignSergii Romantsov2018-09-077-9/+10
| | | | | | | | | | | | | | | | | | | | | | | Seems in case of 32-bit library, usage of msse2 makes some stack corruption or incorrect instructions. Usage with mstackrealign fixes that case. v2: Fixed meson. v3: Definition of c_sse2_args moved on the top (L.Landwerlin). Added mstackrealign for Android's mks where msee4.1 is used. v4: Added for Vulkan also. v5: Commit message correction. CC: <[email protected]> Fixes: 6b05c080f202 (i965: Compile with -msse3) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107779 Signed-off-by: Sergii Romantsov <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* freedreno: fix rast->depth_cleap_near/farRob Clark2018-09-071-1/+2
| | | | | Fixes: daa19363def gallium: split depth_clip into depth_clip_near & depth_clip_far Signed-off-by: Rob Clark <[email protected]>
* gallium: enable GL_AMD_depth_clamp_separate on r600, radeonsiMarek Olšák2018-09-0621-3/+24
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* gallium: split depth_clip into depth_clip_near & depth_clip_farMarek Olšák2018-09-0651-58/+100
| | | | for AMD_depth_clamp_separate.
* anv/pipeline: Only consider double elements which actually existJason Ekstrand2018-09-061-1/+2
| | | | | | | | | | | | The brw_vs_prog_data::double_inputs_read field comes directly from shader_info::double_inputs which may contain inputs which are not actually read. Instead of using it directly, AND it with inputs_read which is only things which are read. Otherwise, we may end up subtracting too many elements when computing elem_count. Cc: [email protected] Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103241 Reviewed-by: Lionel Landwerlin <[email protected]>
* nir: Drop the vs_inputs_dual_locations optionJason Ekstrand2018-09-068-58/+23
| | | | | | | | | | | | | It was very inconsistently handled; the only things that made use of it were glsl_to_nir, glspirv, and nir_gather_info. In particular, nir_lower_io completely ignored it so anyone using nir_lower_io on 64-bit vertex attributes was going to be in for a shock. Also, as of the previous commit, it's set by every driver that supports 64-bit vertex attributes. There's no longer any reason to have it be an option so let's just delete it. Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi/nir: Set vs_inputs_dual_locations and let NIR do the remapJason Ekstrand2018-09-063-29/+22
| | | | | | | | | | | | | | | | | We were going out of our way to disable dual-location re-mapping in NIR only to then do the remapping in st_glsl_to_nir.cpp. Presumably, this was so that double_inputs would be correct for the core state tracker. However, now that we've it to gl_program::DualSlotInputs which is unaffected by NIR lowering, we can let NIR lower things for us. The one tricky bit here is that we have to remap the inputs_read bitfield back to the single-slot convention for the gallium state tracker to use. Since radeonsi is the only NIR-capable gallium driver that also supports GL_ARB_vertex_attrib_64bit, we only have to worry about radeonsi when making core gallium state tracker changes. Acked-by: Marek Olšák <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* compiler: Move double_inputs to gl_program::DualSlotInputsJason Ekstrand2018-09-0614-65/+83
| | | | | | | | | | | | | | | | | | | | | | | Previously, we had two field in shader_info: double_inputs_read and double_inputs. Presumably, the one was for all double inputs that are read and the other is all that exist. However, because nir_gather_info regenerates these two values, there is a possibility, if a variable gets deleted, that the value of double_inputs could change over time. This is a problem because double_inputs is used to remap the input locations to a two-slot-per-dvec3/4 scheme for i965. If that mapping were to change between glsl_to_nir and back-end state setup, we would fall over when trying to map the NIR outputs back onto the GL location space. This commit changes the way slot re-mapping works. Instead of the double_inputs field in shader_info, it adds a DualSlotInputs bitfield to gl_program. By having it in gl_program, we more easily guarantee that NIR passes won't touch it after it's been set. It also makes more sense to put it in a GL data structure since it's really a mapping from GL slots to back-end and/or NIR slots and not really a NIR shader thing. Tested-by: Alejandro Piñeiro <[email protected]> (ARB_gl_spirv tests) Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* gallium: add PIPE_CAP_RASTERIZER_SUBPIXEL_BITSMarek Olšák2018-09-066-0/+9
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* mesa/util: add missing va_end() after va_copy()Andrii Simiklit2018-09-061-0/+1
| | | | | | | | | | | MSDN: "va_end must be called on each argument list that's initialized with va_start or va_copy before the function returns." Reviewed-by: Eric Engestrom <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107810 Fixes: c6267ebd6c8a "gallium/util: Stop bundling our snprintf implementation." Signed-off-by: Andrii Simiklit <[email protected]>
* mesa/util: don't ignore NULL returned from 'malloc'Andrii Simiklit2018-09-061-1/+1
| | | | | | | | | | We should exit from the function 'util_vasprintf' with error code -1 for case where 'malloc' returns NULL Reviewed-by: Eric Engestrom <[email protected]> Fixes: 864148d69e1e "util: add util_vasprintf() for Windows (v2)" Signed-off-by: Andrii Simiklit <[email protected]>
* mesa/util: don't use the same 'va_list' instance twiceAndrii Simiklit2018-09-061-1/+1
| | | | | | | | The first usage of the 'va_list' instance could change it. Reviewed-by: Eric Engestrom <[email protected]> Fixes: 864148d69e1e "util: add util_vasprintf() for Windows (v2)" Signed-off-by: Andrii Simiklit <[email protected]>
* apple/glx/log: added missing va_end() after va_copy()Andrii Simiklit2018-09-061-0/+1
| | | | | | | | | Each invocation of va_copy() must be matched by a corresponding invocation of va_end() Reviewed-by: Eric Engestrom <[email protected]> Fixes: 51691f0767f6 "darwin: Use ASL for logging" Signed-off-by: Andrii Simiklit <[email protected]>
* mesa: add missing return statement for GL_RG_SNORM caseDanylo Piliaiev2018-09-061-1/+1
| | | | | | | Fixes: 0d356cf4781bece0dc9a7 "mesa: enable EXT_render_snorm extension" Signed-off-by: Danylo Piliaiev <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* meson: consolidate langs listsEric Engestrom2018-09-061-3/+9
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* intel/compiler: remove unused get_image_base_type()Eric Engestrom2018-09-061-19/+0
| | | | | | | | | Unused since 09f1de97a76a4990fd7c "anv,i965: Lower away image derefs in the driver". Cc: Jason Ekstrand <[email protected]> Signed-off-by: Eric Engestrom <[email protected]> Acked-by: Jason Ekstrand <[email protected]>
* tnl: Fix green gun regression in xonotic.Mathias Fröhlich2018-09-061-1/+1
| | | | | | | | | | | | | Fix an other regression of mesa: Make gl_vertex_array contain pointers to first order VAO members. The regression showed up with drivers using the tnl module and was reproducible using xonotic-glx -benchmark demos/the-big-keybench.dem. Fixes: 64d2a204805 mesa: Make gl_vertex_array contain pointers to first order VAO members. Tested-by: Ville Syrjälä <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* Revert "i965/tools: 32bit compilation with meson"Lionel Landwerlin2018-09-061-1/+1
| | | | | | This reverts commit 4aec44c0d9c4c0649c362199fac97efe0a3b38a4. Unfortunately this patch needed a another one to be committed first.
* i965/tools: 32bit compilation with mesonSergii Romantsov2018-09-061-1/+1
| | | | | | | | | | | Building of 32bit mesa with meson causes issue: "implicit declaration of function ‘__builtin_ia32_clflush’". Fixed by adding msse2 compilation flag. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107843 Fixes: 314879f7fec0 (i965: Fix asynchronous mappings on !LLC platforms.) Signed-off-by: Sergii Romantsov <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* glsl: fixer lexer for unreachable definesTimothy Arceri2018-09-062-23/+38
| | | | | | | | | | | | | | | | | | | | | | | | If we have something like: #ifdef NOT_DEFINED #define A_MACRO(x) \ if (x) #endif The # on the #define is not skipped but the define itself is so this then gets recognised as #if. Until 28a3731e3f this didn't happen because we ended up in <HASH>{NONSPACE} where BEGIN INITIAL was called stopping the problem from happening. This change makes sure we never call RETURN_TOKEN_NEVER_SKIP for if/else/endif when processing a define. Cc: Ian Romanick <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107772 Tested-By: Eero Tamminen <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* freedreno/ir3: insert mov if same instruction in the outputs.Hyunjun Ko2018-09-051-0/+14
| | | | | | | | | | | | | | | | For example, result0 = texture(sampler[indexBase + 5], coords); result1 = texture(sampler[indexBase + 0], coords); result2 = texture(sampler[indexBase + 0], coords); out_result0 = result0; out_result1 = result1; out_result2 = result2; In this kind of case we need to insert an extra mov to the outputs so that the result could be assigned to each register respectively. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: make immediates array dynamicHyunjun Ko2018-09-053-1/+11
| | | | | | | | | | Since most shaders wouldn't need that large array of immediates, making the array dynamic could save unnecessary spaces. In addition, sometimes we can potentially have a much larger array of immediates to be lowered, which might be more than 64. Signed-off-by: Rob Clark <[email protected]>
* freedreno: allocate ctx's batch on demandRob Clark2018-09-054-15/+25
| | | | | | | Don't fall over when app wants more than 32 contexts. Instead allocate contexts on demand. Signed-off-by: Rob Clark <[email protected]>
* freedreno: add fd_context_batch() accessorRob Clark2018-09-058-10/+21
| | | | | | | For cases in which (after the following commit) ctx->batch may be null. Prep work for following commit. Signed-off-by: Rob Clark <[email protected]>
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