index
:
mesa.git
gallium_va_encpackedheader01
master
Unnamed repository; edit this file 'description' to name the repository.
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
src
Commit message (
Expand
)
Author
Age
Files
Lines
...
*
winsys/amdgpu: simplify amdgpu_cs_add_buffer() a bit
Samuel Pitoiset
2017-04-17
1
-4
/
+3
*
i965/drm: Delete NULL check in brw_bo_unmap().
Kenneth Graunke
2017-04-16
1
-3
/
+0
*
intel/decoder: Fix is_header_field starting condition.
Kenneth Graunke
2017-04-16
1
-1
/
+1
*
i965/drm: Remove dead return in brw_bo_busy()
Kenneth Graunke
2017-04-16
1
-3
/
+1
*
android: amd/addrlib: trivial fix for gfx9 support
Mauro Rossi
2017-04-17
1
-0
/
+2
*
nir: Add GLSL_TYPE_[U]INT64 to some switch statements
Jason Ekstrand
2017-04-16
2
-0
/
+4
*
gallium/radeon: always flush asynchronously and wait after begin_new_cs
Marek Olšák
2017-04-17
2
-4
/
+11
*
radeonsi: remove local variable 'mod' from si_compile_tgsi_shader
Marek Olšák
2017-04-17
1
-5
/
+2
*
radeonsi: add si_shader_selector::vs_needs_prolog
Marek Olšák
2017-04-17
3
-7
/
+10
*
radeonsi: don't set VGT_GS_MODE as part of the GS state
Marek Olšák
2017-04-17
1
-2
/
+0
*
radeonsi: don't allow user indices with indirect draws
Marek Olšák
2017-04-17
1
-4
/
+4
*
radeonsi: merge two if (indirect) statements
Marek Olšák
2017-04-17
1
-27
/
+25
*
radeonsi: don't mark non-dirty textures with CMASK as compressed
Marek Olšák
2017-04-17
1
-2
/
+3
*
glsl: don't run the GLSL pre-processor when we are skipping compilation
Timothy Arceri
2017-04-15
2
-9
/
+20
*
glsl: delay optimisations on individual shaders when cache is available
Timothy Arceri
2017-04-15
4
-78
/
+96
*
anv: Add the pci_id into the shader cache UUID
Jason Ekstrand
2017-04-14
1
-5
/
+15
*
etnaviv: native fence fd support
Philipp Zabel
2017-04-15
6
-6
/
+82
*
i965: enable OpenGL 4.2 in Ivybridge
Juan A. Suarez Romero
2017-04-14
2
-2
/
+2
*
i965: enable ARB_shader_precision in gen7+
Samuel Iglesias Gonsálvez
2017-04-14
1
-1
/
+1
*
i965: enable ARB_vertex_attrib_64bit for gen7+
Juan A. Suarez Romero
2017-04-14
1
-1
/
+1
*
swr: Fix swr osmesa build
George Kyriazis
2017-04-14
1
-1
/
+1
*
etnaviv: SINGLE_BUFFER support on GC3000
Wladimir J. van der Laan
2017-04-15
8
-28
/
+63
*
etnaviv: Update includes from rnndb
Wladimir J. van der Laan
2017-04-15
5
-20
/
+91
*
etnaviv: Add chipMinorFeatures4 and 5
Wladimir J. van der Laan
2017-04-15
2
-1
/
+15
*
etnaviv: resolve tile status when flushing resource
Philipp Zabel
2017-04-15
2
-0
/
+11
*
etnaviv: stop repeatedly resolving an unchanged resource into its scanout pri...
Philipp Zabel
2017-04-15
1
-1
/
+4
*
swr: Add polygon stipple support
George Kyriazis
2017-04-14
5
-9
/
+84
*
i965: enable OpenGL 4.0 to Ivybridge/Baytrail
Samuel Iglesias Gonsálvez
2017-04-14
2
-5
/
+6
*
i965: enable ARB_gpu_shader_fp64 for Ivybridge/Baytrail
Samuel Iglesias Gonsálvez
2017-04-14
1
-1
/
+1
*
i965: Use correct VertStride on align16 instructions.
Matt Turner
2017-04-14
1
-10
/
+34
*
i965/vec4/dce: improve track of partial flag register writes
Samuel Iglesias Gonsálvez
2017-04-14
1
-1
/
+1
*
i965/vec4: don't do horizontal stride on some register file types
Samuel Iglesias Gonsálvez
2017-04-14
1
-2
/
+5
*
i965/vec4: Fix exec size for MOVs {SET,PICK}_{HIGH,LOW}_32BIT.
Matt Turner
2017-04-14
1
-4
/
+12
*
i965/vec4: use vec4_builder to emit instructions in setup_imm_df()
Samuel Iglesias Gonsálvez
2017-04-14
2
-50
/
+50
*
i965/vec4: consider subregister offset in live variables
Juan A. Suarez Romero
2017-04-14
1
-2
/
+2
*
i965/vec4: fix assert to detect SIMD lowered DF instructions in IVB
Francisco Jerez
2017-04-14
1
-5
/
+1
*
i965/vec4: split VEC4_OPCODE_FROM_DOUBLE into one opcode per destination's type
Samuel Iglesias Gonsálvez
2017-04-14
7
-27
/
+60
*
i965/vec4: split d2x conversion and data gathering from one opcode to two exp...
Samuel Iglesias Gonsálvez
2017-04-14
2
-8
/
+1
*
i965/vec4: fix VEC4_OPCODE_FROM_DOUBLE for IVB/BYT
Juan A. Suarez Romero
2017-04-14
1
-7
/
+19
*
i965/vec4: keep original type when dealing with null registers
Juan A. Suarez Romero
2017-04-14
1
-0
/
+2
*
i965/vec4: split DF instructions and later double its execsize in IVB/BYT
Samuel Iglesias Gonsálvez
2017-04-14
3
-1
/
+53
*
i965/fs: lower all non-force_writemask_all DF instructions to SIMD4 on IVB/BYT
Samuel Iglesias Gonsálvez
2017-04-14
1
-0
/
+9
*
i965/fs: Get 64-bit indirect moves working on IVB.
Francisco Jerez
2017-04-14
1
-2
/
+25
*
i965: Use source region <1,2,0> when converting to DF.
Matt Turner
2017-04-14
2
-13
/
+28
*
i965/fs: fix lower SIMD width for IVB/BYT's MOV_INDIRECT
Juan A. Suarez Romero
2017-04-14
1
-3
/
+14
*
i965/fs: fix dst stride in IVB/BYT type conversions
Juan A. Suarez Romero
2017-04-14
1
-27
/
+41
*
i965/fs: rename lower_d2x to lower_conversions
Samuel Iglesias Gonsálvez
2017-04-14
4
-4
/
+4
*
Revert "i965/fs: Don't emit SEL instructions for type-converting MOVs."
Samuel Iglesias Gonsálvez
2017-04-14
1
-2
/
+0
*
i965/fs: generalize the legalization d2x pass
Samuel Iglesias Gonsálvez
2017-04-14
2
-37
/
+67
*
i965: Use <0,2,1> region for scalar DF sources on IVB/BYT.
Matt Turner
2017-04-14
1
-0
/
+13
[prev]
[next]