summaryrefslogtreecommitdiffstats
path: root/src
Commit message (Expand)AuthorAgeFilesLines
* intel/compiler: Add instruction compaction support on Gen12Matt Turner2019-10-302-184/+868
* intel/compiler: Make separate src0/src1 index tablesMatt Turner2019-10-301-11/+18
* intel/compiler: Inline get_src_index()Matt Turner2019-10-301-26/+15
* intel/compiler: Restructure instruction compaction in preparation for Gen12Matt Turner2019-10-301-20/+28
* intel/compiler: Remove unreachable() from brw_reg_type.cMatt Turner2019-10-301-3/+3
* freedreno/a2xx: add missing vertex formats (SSCALE/USCALE/FIXED)Jonathan Marek2019-10-308-50/+83
* radeonsi: disable sdma for gfx10Pierre-Eric Pelloux-Prayer2019-10-301-1/+7
* radeonsi: sdma misc fixesPierre-Eric Pelloux-Prayer2019-10-302-4/+2
* radeonsi: align sdma byte count to dwPierre-Eric Pelloux-Prayer2019-10-301-1/+12
* radv: Enable ACO on Navi.Timur Kristóf2019-10-301-2/+1
* radeonsi: enable 8K video decode support for HEVC and VP9Leo Liu2019-10-301-2/+18
* radeon/vcn: Add VP9 8K decode supportLeo Liu2019-10-301-1/+1
* aco: try to group together VMEM loads of the same resourceRhys Perry2019-10-301-10/+56
* aco: don't schedule instructions through depending VMEM instructionsDaniel Schürmann2019-10-301-0/+3
* aco: add can_reorder flags to load_ubo and load_constantDaniel Schürmann2019-10-301-5/+9
* aco: only skip RAR dependencies if the variable is killed somewhereDaniel Schürmann2019-10-301-21/+46
* aco: restrict scheduling depending on max_wavesDaniel Schürmann2019-10-301-9/+15
* anv: Avoid emitting UBO surface states that won't be usedJason Ekstrand2019-10-301-1/+12
* intel/vec4: Set brw_stage_prog_data::has_ubo_pullJason Ekstrand2019-10-301-0/+2
* radv: fix perftest optionsSamuel Pitoiset2019-10-301-10/+9
* radv: move nomemorycache debug option at the right palceSamuel Pitoiset2019-10-301-1/+1
* radv: fix dumping SPIR-V into hang reportsSamuel Pitoiset2019-10-304-5/+13
* mesa: enable ARB_gpu_shader_int64 in compat profileTapani Pälli2019-10-303-77/+76
* mesa: add [Program]Uniform*64ARB display list supportTapani Pälli2019-10-301-0/+979
* radv: Enable VK_KHR_timeline_semaphore.Bas Nieuwenhuizen2019-10-302-1/+13
* radv: Add wait-before-submit support for timelines.Bas Nieuwenhuizen2019-10-302-7/+154
* radv: Add timelines with a VK_KHR_timeline_semaphore impl.Bas Nieuwenhuizen2019-10-303-60/+504
* radv: Add temporary datastructure for submissions.Bas Nieuwenhuizen2019-10-301-28/+142
* radv: Split semaphore into two parts as enum+union.Bas Nieuwenhuizen2019-10-302-38/+92
* radv: Always enable syncobj when supported for all fences/semaphores.Bas Nieuwenhuizen2019-10-301-2/+0
* radv: Improve fence signalling in QueueSubmit.Bas Nieuwenhuizen2019-10-301-13/+24
* radv: Do sparse binding in queue submission.Bas Nieuwenhuizen2019-10-301-60/+81
* radv: Split out commandbuffer submission.Bas Nieuwenhuizen2019-10-301-163/+187
* radv: Clean up unused variable.Bas Nieuwenhuizen2019-10-301-4/+3
* radv: Add an early exit in the secure compile if we already have the cache en...Bas Nieuwenhuizen2019-10-301-0/+14
* radv: Compute hashes in secure process for secure compilation.Bas Nieuwenhuizen2019-10-301-0/+23
* zink: drop nop descriptor-updatesErik Faye-Lund2019-10-301-4/+5
* zink: use bitfield for dirty flaggingErik Faye-Lund2019-10-302-7/+6
* zink: use dynamic state for line-widthErik Faye-Lund2019-10-305-13/+17
* zink: Use optimal layout instead of general. Reduces valid layer warnings. Fi...Duncan Hopkins2019-10-303-36/+113
* radv: make use of radv_sc_read()Timothy Arceri2019-10-303-39/+76
* radv: add radv_sc_read() helperTimothy Arceri2019-10-302-0/+42
* radv: allow select() calls in secure compileTimothy Arceri2019-10-301-1/+5
* mapi: Improve the x86 tsd stubs performance.Lepton Wu2019-10-291-5/+6
* mapi: Inline call x86_current_tls.Lepton Wu2019-10-291-4/+8
* mapi: Clean up entry_patch_public for x86 tlsLepton Wu2019-10-291-10/+7
* mapi: split entry_generate_or_patch for x86 tlsLepton Wu2019-10-291-5/+16
* mapi: Adapted libglvnd x86 tsd changesJonathan Gray2019-10-291-5/+11
* spirv: Don't fail if multiple ordering semantics bits are setCaio Marcelo de Oliveira Filho2019-10-291-9/+30
* intel/isl: Allow stencil buffer to support compression on Gen12+Sagar Ghuge2019-10-291-2/+3
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-27 05:41:28 +0000