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* mesa/es3.1: Allow enable of GL_SAMPLE_MASKMarta Lofstedt2015-08-031-1/+1
| | | | | | | GLES 3.1 must be able to enable GL_SAMPLE_MASK. Signed-off-by: Marta Lofstedt <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* mesa/es3.1: Allow textures with target GL_TEXTURE_2D_MULTISAMPLEMarta Lofstedt2015-08-032-3/+3
| | | | | | | | GLES 3.1 should be able to bind a texture with the target GL_TEXTURE_2D_MULTISAMPLE. Signed-off-by: Marta Lofstedt <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* mesa/es3.1: Allow GL_DEPTH_STENCIL_TEXTURE_MODEMarta Lofstedt2015-08-031-1/+3
| | | | | | | GLES 3.1 must support the parameter GL_DEPTH_STENCIL_TEXTURE_MODE. Signed-off-by: Marta Lofstedt <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* mesa/es3.1: Allow GL_SAMPLE_MASKMarta Lofstedt2015-08-031-1/+1
| | | | | | | GLES 3.1 should be allowed to enable GL_SAMPLE_MASK. Signed-off-by: Marta Lofstedt <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* mesa/es3.1: Allow binding GL_DRAW_INDIRECT_BUFFER with gles 3.1Marta Lofstedt2015-08-031-2/+3
| | | | | Signed-off-by: Marta Lofstedt <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* r600g: re-enable single-sample fast clearMarek Olšák2015-08-031-6/+1
| | | | | | | Fixed by the CB_SHADER_MASK fix. Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* r600g: fix the CB_SHADER_MASK setupMarek Olšák2015-08-032-4/+5
| | | | | | | | This fixes the single-sample fast clear hang. Cc: 10.6 <[email protected]> Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* r600g: fix the single-sample fast clear setupMarek Olšák2015-08-031-2/+6
| | | | | | | No effect, but this is what we should be doing. Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radeonsi: flush if the memory usage for an IB is too highMarek Olšák2015-08-022-0/+17
| | | | | | | Picked from the amdgpu branch. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]>
* opencl: use versioned .so in mesa.icdIgor Gnatenko2015-08-013-2/+2
| | | | | | | | | | | | We must have versioned library in mesa.icd, because ICD loader would fail if the mesa-devel package wasn't installed. Cc: "10.6" <[email protected]> Reported-by: Fabian Deutsch <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73512 Signed-off-by: Igor Gnatenko <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Acked-by: Michel Dänzer <[email protected]>
* winsys/radeon: don't leak the fd when it is 0Emil Velikov2015-08-011-2/+2
| | | | | | | | | | | | | | Earlier commit added an extra dup(fd) to fix a ZaphodHeads issue. Although it did not consider the (very unlikely) case where we might end up with the valid fd == 0. Fixes: 28dda47ae4d(winsys/radeon: Use dup fd as key in drm-winsys hash table to fix ZaphodHeads.) Cc: 10.6 <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Mario Kleiner <[email protected]>
* egl/wayland: use drmGetNodeTypeFromFd helper instead of opencoding itEmil Velikov2015-08-011-18/+2
| | | | | | Cc: Axel Davy <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Acked-by: Boyan Ding <[email protected]>
* egl/wayland: use designated initializersEmil Velikov2015-08-011-13/+13
| | | | | Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Thomas Helland <[email protected]>
* egl: remove ifdef $(egl_extension) compile guardsEmil Velikov2015-08-013-65/+1
| | | | | | All of these are already defined in the headers provided. Signed-off-by: Emil Velikov <[email protected]>
* egl/wayland: libdrm is a hard requirement, treat it as suchEmil Velikov2015-08-011-2/+0
| | | | | | | | Prompt at configure time if it's missing otherwise we'll fail later on in the build. Remove ambiguous HAVE_LIBDRM guard. Cc: 10.6 <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* egl: consolidate ifdef HAVE_LIBDRM blocksEmil Velikov2015-08-011-108/+102
| | | | | | | | Move the code around rather than having it scattered. No functional change. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Thomas Helland <[email protected]>
* Revert "gallium/radeon: re-enable unsafe math for graphics shaders"Marek Olšák2015-08-011-4/+0
| | | | | | This reverts commit 8559f6ce62a9d5b52fa8189ba2352cd48bdabccf. It causes hangs in DOTA 2 Reborn.
* clover: make dispatch matches functions defEdB2015-07-311-5/+18
| | | | Reviewed-by: Francisco Jerez <[email protected]>
* gallivm: Fix GCC unused-variable warning.Vinson Lee2015-07-311-2/+1
| | | | | | | | | | lp_bld_tgsi_soa.c: In function 'lp_emit_immediate_soa': lp_bld_tgsi_soa.c:3065:18: warning: unused variable 'size' [-Wunused-variable] const uint size = imm->Immediate.NrTokens - 1; ^ Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* glx: Fix missing bit decl for EXT_texture_integerAdam Jackson2015-07-311-0/+1
| | | | | | | | | | | | Missing from: commit b15aba940a3b6fc7c9bebc692968e7e9b72b9f29 Author: Adam Jackson <[email protected]> Date: Tue Jul 21 11:43:42 2015 -0400 glx: Fix image size computation for EXT_texture_integer (v2) Signed-off-by: Adam Jackson <[email protected]>
* glsl: Initialize parse-state in constructor of lower_subroutine.Matt Turner2015-07-311-3/+3
| | | | | | Static analysis tools don't like partial object initializations. Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* glx: Fix image size computation for EXT_texture_integer (v2)Adam Jackson2015-07-312-0/+11
| | | | | | | | | | | Without this this extension basically can't work in indirect contexts, TexImage2D will compute the image size as 0 and we'll send no image data to the server. v2: Add EXT_texture_integer to the client extension list too (Ian) Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Adam Jackson <[email protected]>
* radeonsi: copy *8_SNORM bits exactly in resource_copy_regionMarek Olšák2015-07-311-1/+3
| | | | | | | | | | Disabling the FP16 mode didn't help. If needed, we can use this trick for blits too, but not for scaled blits. + 4 piglits Reviewed-by: Michel Dänzer <[email protected]>
* r600g: early exit in r600_clear if there's nothing to doMarek Olšák2015-07-311-0/+2
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: early exit in si_clear if there's nothing to doMarek Olšák2015-07-311-0/+2
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: fix a regression since the resource_copy_region cleanupMarek Olšák2015-07-311-1/+1
| | | | | | | | | Broken since: 46b2b3b - radeonsi: don't change pipe_resource in resource_copy_region Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91444 Reviewed-and-Tested-by: Michel Dänzer <[email protected]>
* radeonsi: fix broken st/nine from merging tessellationMarek Olšák2015-07-311-2/+7
| | | | st/nine uses GENERIC slots greater than 60.
* radeonsi: move CP DMA functions to their own fileMarek Olšák2015-07-316-236/+274
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add a debug flag that disables printing ISA in shader dumpsMarek Olšák2015-07-313-9/+13
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* radeonsi: add a debug flag that disables printing TGSI in shader dumpsMarek Olšák2015-07-313-1/+3
| | | | Reviewed-by: Dave Airlie <[email protected]>
* radeonsi: add a debug flag that disables printing the LLVM IR in shader dumpsMarek Olšák2015-07-316-29/+29
| | | | This is for shader-db and should reduce size of shader dumps.
* radeonsi: store shader disassemblies in memory for future usersMarek Olšák2015-07-317-17/+18
| | | | | This will be used by the new ddebug pipe. I'm including it now to avoid conflicts with other patches.
* radeonsi: don't use llvm.AMDIL.fraction for FRC and DFRACMarek Olšák2015-07-311-4/+16
| | | | | | | | There are 2 reasons for this: - LLVM optimization passes can work with floor - there are patterns to select v_fract from floor anyway There is no change in the generated code.
* gallium/radeon: re-enable unsafe math for graphics shadersMarek Olšák2015-07-311-0/+4
| | | | | | | | | | | | | | | | This reverts commit 4db985a5fa9ea985616a726b1770727309502d81. The grass no longer disappears, which was the reason the commit was reverted. This might affect tessellation. We'll see. Totals from affected shaders: SGPRS: 151672 -> 150232 (-0.95 %) VGPRS: 90620 -> 89776 (-0.93 %) Code Size: 3980472 -> 3920836 (-1.50 %) bytes LDS: 67 -> 67 (0.00 %) blocks Scratch: 1357824 -> 1202176 (-11.46 %) bytes per wave Reviewed-by: Tom Stellard <[email protected]>
* gallium/radeon: don't use rsq_actionMarek Olšák2015-07-311-7/+3
| | | | Reviewed-by: Dave Airlie <[email protected]>
* gallium/radeon: move r600-specific code to r600gMarek Olšák2015-07-312-152/+150
| | | | Reviewed-by: Tom Stellard <[email protected]>
* gallium/radeon: remove unused variables and old commentsMarek Olšák2015-07-314-35/+0
| | | | Reviewed-by: Dave Airlie <[email protected]>
* gallium/radeon: remove build_intrinsic and build_tgsi_intrinsicMarek Olšák2015-07-314-108/+58
| | | | | | duplicated now Reviewed-by: Dave Airlie <[email protected]>
* gallivm: add LLVMAttribute parameter to lp_build_intrinsicMarek Olšák2015-07-317-19/+24
| | | | | | This will help remove some duplicated code from radeon. Reviewed-by: Dave Airlie <[email protected]>
* gallium/util: clear up that debug_get_flags_option returns a 64-bit maskMarek Olšák2015-07-312-7/+7
| | | | Reviewed-by: Kai Wasserbäch <[email protected]>
* radeonsi: completely rework updating descriptors without CP DMAMarek Olšák2015-07-314-271/+128
| | | | | | | | | | | | | | | | | | | | The patch has a better explanation. Just a summary here: - The CPU always uploads a whole descriptor array to previously-unused memory. - CP DMA isn't used. - No caches need to be flushed. - All descriptors are always up-to-date in memory even after a hang, because CP DMA doesn't serve as a middle man to update them. This should bring: - better hang recovery (descriptors are always up-to-date) - better GPU performance (no KCACHE and TC flushes) - worse CPU performance for partial updates (only whole arrays are uploaded) - less used IB space (no CP_DMA and WRITE_DATA packets) - simpler code - hopefully, some of the corruption issues with SI cards will go away. If not, we'll know the issue is not here. Reviewed-by: Michel Dänzer <[email protected]>
* i965/fs: Fix regression with SIMD8 VS since ↵Francisco Jerez2015-07-311-1/+2
| | | | | | | | | | | | | | b5f1a48e234d47b24df38cb562cffb8941d43795. With num_direct_uniforms == 0 there's no space allocated in the param_size array for the one block of direct uniforms -- On the FS stage this would be a harmless no-op because it would simply re-set one of the param_size entries allocated for the sampler units to zero, but on the VS stage it has been reported to cause memory corruption followed by a crash -- Surprising how a full piglit run on Gen8 didn't catch it. Reported-and-reviewed-by: "Lofstedt, Marta" <[email protected]>
* i965/gen9: Add hs, ds, and cs thread + urb infoBen Widawsky2015-07-301-0/+10
| | | | | | | | | | | | | | | | | For SKL: These are the production values. For BXT: These are low estimates to enable platforms. This patch was originally part of i965/skl: Add production thread counts and URB size but was split out at Jordan's request (which I found to be reasonable). Note on stable inclusion: 10.6 does not care about hs, and ds. It does care about cs, but since Jordan was the one that asked me to extract it, I'll leave it up to him to deal with a backport to stable is required. Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965/bxt: Use more conservative thread countsBen Widawsky2015-07-301-2/+4
| | | | | | | | | | | | Since we really do not know what may occur in the future, pick a more conservative value for thread counts until we know better what values are correct. As far as I can tell, the old values will work fine, but some of the registers seem to indicate that going even lower is possible and the purpose of having early support is to enable as many configurations that can possibly exist (we can trim things down after platforms begin shipping later). Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965/skl: Add production thread counts and URB sizeBen Widawsky2015-07-301-5/+5
| | | | | | | | | | | | | This patch adjusts the SKL values to the best known values we have. v2: Remove HS/DS/CS fields. Adding this makes most sense to add to the GEN9_FEATURES macro, however, doing that would require updating BXT values, and Jordan requested I not do that. Conveniently, this request makes a lot of sense wrt to stable backport as HS, and DS do not even exist there. Cc: [email protected] Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* vc4: Lower uniform loads to scalar in NIR.Eric Anholt2015-07-302-31/+81
| | | | | This also moves the vec4-to-byte-addressing math into NIR, so that algebraic has a chance at it.
* vc4: Move some FS input lowering into NIR.Eric Anholt2015-07-302-35/+50
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* vc4: Move program keys to the header file.Eric Anholt2015-07-302-47/+49
| | | | | I want to be able to inspect them from other files for lowering passes in NIR.
* vc4: Lower NIR inputs to scalar as well.Eric Anholt2015-07-302-4/+44
| | | | | For now this is just scalarizing, but it also means we'll get to dump a bunch of QIR-based lowering in a moment.
* vc4: Start adding a NIR-based output lowering pass.Eric Anholt2015-07-304-7/+137
| | | | | | For now, this just splits up store_output intrinsics to be scalars, and drops unused outputs in the coordinate shader. My goal is to be able to drop a bunch of my VC4-specific optimization by letting NIR handle it.
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-21 12:53:01 +0000