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* virgl: add protocol for resource transfersGurchetan Singh2019-02-152-0/+12
* virgl: when creating / freeing transfers, pass slab pool directlyGurchetan Singh2019-02-154-14/+14
* virgl: unmap uploader at flush timeGurchetan Singh2019-02-151-2/+3
* virgl: make alignment smaller when uploading index user buffersGurchetan Singh2019-02-151-1/+1
* virgl: track level cleanliness rather than resource cleanlinessGurchetan Singh2019-02-156-14/+20
* virgl: don't mark unclean after a flushGurchetan Singh2019-02-151-1/+0
* virgl: use virgl_resource_dirty helperGurchetan Singh2019-02-156-16/+19
* virgl: add ability to do finer grain dirty trackingGurchetan Singh2019-02-158-13/+15
* panfrost: Improve logging and patch memory leaksAlyssa Rosenzweig2019-02-152-49/+48
* panfrost: Don't align framebuffer dimsAlyssa Rosenzweig2019-02-151-2/+2
* panfrost: Implement PIPE_QUERY_OCCLUSION_COUNTERAlyssa Rosenzweig2019-02-151-1/+8
* panfrost: Identify MALI_OCCLUSION_PRECISE bitAlyssa Rosenzweig2019-02-152-5/+7
* drirc/i965: add option to disable 565 configs and visualsTapani Pälli2019-02-152-0/+18
* panfrost: Backport driver to Mali T600/T700Alyssa Rosenzweig2019-02-156-262/+340
* panfrost: Fix build; depend on libdrmAlyssa Rosenzweig2019-02-151-0/+1
* nir/dead_cf: Stop relying on liveness analysisJason Ekstrand2019-02-141-21/+39
* nir/dead_cf: Inline cf_node_has_side_effectsJason Ekstrand2019-02-141-41/+32
* intel/fs: Bail in optimize_extract_to_float if we have modifiersJason Ekstrand2019-02-141-0/+9
* swr: set PIPE_CAP_MAX_VARYINGS correctlyIlia Mirkin2019-02-141-0/+2
* intel/fs: Silence a compiler warningJason Ekstrand2019-02-141-2/+1
* anv: Silence some compiler warnings in release buildsJason Ekstrand2019-02-142-4/+4
* anv/blorp: Delete a pointless assertJason Ekstrand2019-02-141-5/+0
* nir: Silence a couple of warnings in release buildsJason Ekstrand2019-02-142-1/+3
* spirv: Eliminate dead input/output variables after translation.Kenneth Graunke2019-02-141-5/+20
* anv: Put MOCS in the correct locationKenneth Graunke2019-02-141-2/+2
* spirv: Add missing breakIan Romanick2019-02-141-0/+1
* util/tests: compile to something sensible in release buildsEric Engestrom2019-02-1412-0/+24
* anv/tests: compile to something sensible in release buildsEric Engestrom2019-02-145-0/+10
* etnaviv: drop duplicate #defineEric Engestrom2019-02-141-4/+0
* st/dri: drop duplicate #defineEric Engestrom2019-02-141-4/+0
* gbm: drop duplicate #definesEric Engestrom2019-02-141-8/+0
* drm-uapi: use local files, not system libdrmEric Engestrom2019-02-1494-108/+103
* radv: fix radv_fixup_vertex_input_fetches()Samuel Pitoiset2019-02-141-1/+1
* radv: reduce the number of loaded channels for vertex input fetchesSamuel Pitoiset2019-02-141-2/+79
* radv: store vertex attribute formats as pipeline keysSamuel Pitoiset2019-02-143-3/+21
* radv: use MAX_{VBS,VERTEX_ATTRIBS} when defining max vertex input limitsSamuel Pitoiset2019-02-141-2/+2
* ac: make use of ac_build_expand_to_vec4() in visit_image_store()Samuel Pitoiset2019-02-143-8/+6
* freedreno: Use the NIR lowering for isign.Eric Anholt2019-02-142-14/+1
* intel: Use the NIR lowering for isign.Eric Anholt2019-02-143-31/+1
* v3d: Use the NIR lowering for isign instead of rolling our own.Eric Anholt2019-02-141-16/+1
* nir: Move panfrost's isign lowering to nir_opt_algebraic.Eric Anholt2019-02-144-1/+6
* nir: turn an ssa check in nir_search into an assertTimothy Arceri2019-02-141-2/+1
* nir: turn ssa check into an assertTimothy Arceri2019-02-141-3/+11
* nir: prehash instruction in nir_instr_set_add_or_rewrite()Timothy Arceri2019-02-141-4/+5
* meson: Add dependency on genxml to anvilDylan Baker2019-02-131-2/+5
* radv: always export gl_SampleMask when the fragment shader uses itSamuel Pitoiset2019-02-131-4/+4
* gallium/aux: add PIPE_CAP_MAX_VARYINGS to u_screenAlok Hota2019-02-131-0/+3
* radv/winsys: fix BO list creation when RADV_DEBUG=allbos is setSamuel Pitoiset2019-02-131-0/+1
* freedreno/a6xx: Fix point coordKristian H. Kristensen2019-02-133-8/+4
* freedreno/a6xx: Front facing needs UNK3 bitKristian H. Kristensen2019-02-131-2/+5
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