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* virgl: simplify virgl_texture_transfer_unmap logicErik Faye-Lund2019-04-171-13/+9
* virgl: track full virgl_resource instead of just virgl_hw_resErik Faye-Lund2019-04-171-5/+5
* virgl: tmp_resource -> templErik Faye-Lund2019-04-171-4/+3
* virgl: remove pointless transfer-counterErik Faye-Lund2019-04-174-4/+2
* radeonsi/nir: fix scanning of bindless imagesTimothy Arceri2019-04-171-38/+37
* iris: Add texture cache flushing hacks for blit and resource_copy_regionKenneth Graunke2019-04-161-0/+36
* v3d: Always set up the qregs for CSD payload.Eric Anholt2019-04-161-10/+2
* v3d: Only look up the 3rd texture gather offset for non-arrays.Eric Anholt2019-04-161-1/+1
* spirv: Tell which opcode or value is unhandled when failingCaio Marcelo de Oliveira Filho2019-04-164-42/+61
* spirv: Add more to_string helpersCaio Marcelo de Oliveira Filho2019-04-162-3/+15
* intel/mi_builder: Disable mem_mem tests on IVBJason Ekstrand2019-04-161-0/+3
* iris: Change vendor and renderer stringsKenneth Graunke2019-04-161-1/+4
* intel/mi_builder: Re-order an initializerJason Ekstrand2019-04-161-2/+2
* nir/algebraic: Use a cache to avoid re-emitting structsJason Ekstrand2019-04-161-17/+36
* nir/algebraic: Move the template closer to the render functionJason Ekstrand2019-04-161-19/+19
* iris: Move iris_debug_recompile calls before uploading.Kenneth Graunke2019-04-161-33/+33
* iris: Print the reason for shader recompiles.Kenneth Graunke2019-04-161-6/+30
* i965: Move program key debugging to the compiler.Kenneth Graunke2019-04-1613-283/+275
* winsys/amdgpu: don't set GTT with GDS & OA placements on APUsMarek Olšák2019-04-161-9/+11
* nir: optimize gl_SampleMaskIn to gl_HelperInvocation for radeonsi when possibleMarek Olšák2019-04-164-2/+48
* st/va/enc: Add support for frame_cropping_flag of VAEncSequenceParameterBuffe...suresh guttula2019-04-161-0/+8
* radeon/vce:Add support for frame_cropping_flag of VAEncSequenceParameterBuffe...suresh guttula2019-04-161-2/+9
* vl: Add cropping flags for H264suresh guttula2019-04-161-0/+5
* compiler/glsl: handle case where we have multiple users for typesTapani Pälli2019-04-168-11/+66
* intel/compiler: Do not reswizzle dst if instruction writes to flag registerDanylo Piliaiev2019-04-161-0/+6
* radv: sort the shader capabilities alphabeticallySamuel Pitoiset2019-04-161-3/+3
* iris: Make shader_perf_log print to stderr if INTEL_DEBUG=perf is setKenneth Graunke2019-04-151-4/+11
* radv: enable shaderInt8 on SI and CIKSamuel Pitoiset2019-04-162-4/+3
* virgl: fix fence fd version checkChia-I Wu2019-04-151-2/+2
* virgl: introduce virgl_drm_fenceChia-I Wu2019-04-152-45/+115
* virgl: hide fence internals from the driverChia-I Wu2019-04-154-41/+44
* virgl: handle fence_server_sync in winsysChia-I Wu2019-04-156-20/+28
* gallivm: fix bogus assert in get_indirect_indexRoland Scheidegger2019-04-161-1/+1
* glsl/linker: always validate explicit locations for first and last interfacesAndres Gomez2019-04-153-20/+17
* vc4: fix buildRhys Perry2019-04-151-1/+0
* iris: Fix FLUSH_EXPLICIT handling with staging buffers.Kenneth Graunke2019-04-151-23/+41
* iris: Preserve all PIPE_TRANSFER flags in xfer->usageKenneth Graunke2019-04-152-13/+12
* iris: Actually mark blorp_copy_buffer destinations as written.Kenneth Graunke2019-04-151-0/+1
* drirc: add Spectacle, Falkon to a-sync blacklistgrmat2019-04-151-0/+6
* drirc: add Waterfox to adaptive-sync blacklist davidbepo2019-04-151-0/+3
* drirc: add Budgie WM to adaptive-sync blacklistEl Christianito2019-04-151-0/+3
* Delete autotoolsDylan Baker2019-04-15135-9126/+0
* radeonsi: enable GL_EXT_shader_image_load_formattedMarek Olšák2019-04-151-0/+1
* st/mesa: add support for EXT_shader_image_load_formattedRhys Perry2019-04-151-0/+1
* mesa, glsl: add support for EXT_shader_image_load_formattedRhys Perry2019-04-155-0/+15
* gallium: add support for formatted image loadsRhys Perry2019-04-158-0/+8
* radv: set ACCESS_NON_READABLE on stores for copy/fill/clear meta shadersSamuel Pitoiset2019-04-152-0/+3
* radv: Use local buffers for the global bo list.Bas Nieuwenhuizen2019-04-153-2/+8
* ac: Move has_local_buffers disable to radeonsi.Bas Nieuwenhuizen2019-04-152-3/+5
* radv: Add bolist RADV_PERFTEST flag.Bas Nieuwenhuizen2019-04-152-0/+3
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