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* nvc0/ir: fix ubo max clamp, reset file indexIlia Mirkin2017-02-091-1/+3
* nv50/ir: always return 0 when trying to read thread id along unit dimIlia Mirkin2017-02-094-5/+17
* nvc0/ir: fix robustness guarantees for constbuf loads on kepler+ computeIlia Mirkin2017-02-091-25/+22
* nvc0: increase number of ubo binding pointsIlia Mirkin2017-02-091-3/+2
* nvc0: expose int64Ilia Mirkin2017-02-091-1/+1
* nvc0/ir: make it possible to have the flags def in def0Ilia Mirkin2017-02-095-12/+15
* nvc0/ir: add support for 64-bit shift lowering on SM20/SM30Ilia Mirkin2017-02-091-6/+62
* nvc0/ir: add support for all the new int64 tgsi opcodesIlia Mirkin2017-02-096-5/+302
* nv50/ir: Split 64-bit integer MAD/MUL operationsPierre Moreau2017-02-091-0/+116
* nvc0/ir: add a "high" subop for shifts, emit shf.l/shf.r for 64-bitIlia Mirkin2017-02-093-3/+74
* nvc0/ir: fix SET and SLCT emissionIlia Mirkin2017-02-092-0/+6
* nvc0/ir: add support for emitting partial min/max ops for int64Ilia Mirkin2017-02-094-1/+14
* gallium: add separate PIPE_CAP_INT64_DIVMODIlia Mirkin2017-02-0918-0/+21
* glsl: Allow compatibility shaders with MESA_GL_VERSION_OVERRIDE=...Matt Turner2017-02-094-4/+14
* i965/fs: add support for int64 to bool conversionSamuel Iglesias Gonsálvez2017-02-091-2/+13
* nir: add opcode to perform int64 to bool conversionsSamuel Iglesias Gonsálvez2017-02-092-0/+2
* i965/fs: Add support for nir_op_[iu]2[iu]32Samuel Iglesias Gonsálvez2017-02-091-0/+4
* i965/fs: Add support for nir_op_[iu]642fSamuel Iglesias Gonsálvez2017-02-091-0/+2
* i965/fs: legalize [u]int64 to 32-bit data conversions in lower_d2xSamuel Iglesias Gonsálvez2017-02-091-1/+3
* i965/fs: Add support for nir_op_[iu]642dJason Ekstrand2017-02-091-0/+2
* i965: Allow int64 conversion operations in channel_expressionsJason Ekstrand2017-02-091-24/+24
* util/disk_cache: stop using ralloc_asprintf() unnecessarilyTimothy Arceri2017-02-091-13/+12
* glsl: add param to force shader recompileTimothy Arceri2017-02-094-4/+5
* util: add a disk_cache_remove() functionTimothy Arceri2017-02-092-0/+34
* st/mesa/i965: create link status enumTimothy Arceri2017-02-0913-21/+32
* radv: Add CPU color packing for VK_FORMAT_A2B10G10R10_UNORM_PACK32.Bas Nieuwenhuizen2017-02-081-2/+6
* mesa: (trivial) include <inttypes.h> for PRIx64 macrosRoland Scheidegger2017-02-081-0/+1
* swr: [rasterizer jitter] Pass LLVM-IR size into jitterTim Rowley2017-02-083-3/+4
* swr: [rasterizer core] Frontend SIMD16 WIPTim Rowley2017-02-084-293/+331
* swr: [rasterizer jitter] Disable unsafe FP optimizations in the jitterTim Rowley2017-02-081-1/+1
* swr: [rasterizer core] Frontend SIMD16 WIPTim Rowley2017-02-084-142/+243
* swr: [rasterizer jitter] Add DEBUGTRAP jit builder functionTim Rowley2017-02-082-1/+9
* swr: [rasterizer jitter] Multisample blend jit fixTim Rowley2017-02-081-2/+2
* swr: [rasterizer jitter] Change SimdVector representation to arrayTim Rowley2017-02-082-6/+2
* swr: [rasterizer jitter] Fix issues with stream-out on llvm>=3.8Tim Rowley2017-02-083-6/+6
* swr: [rasterizer jitter] Adjust jitter header includesTim Rowley2017-02-086-11/+11
* swr: [rasterizer core] Frontend SIMD16 WIPTim Rowley2017-02-085-43/+813
* r600/sb: Fix memory leakBartosz Tomczyk2017-02-081-1/+7
* mesa: use PRId64/PRIu64 when printing 64-bit intsTimothy Arceri2017-02-081-2/+2
* mesa/st: fix strict aliasing issue in int64 code.Dave Airlie2017-02-081-4/+2
* mesa/uniform: fix strict aliasing issues with int64 code.Dave Airlie2017-02-081-12/+26
* radv: handle dcc in explicit image resolve path. (v2)Dave Airlie2017-02-071-3/+8
* radv: Enable fast clears by default.Bas Nieuwenhuizen2017-02-073-4/+4
* spirv: Add more asserts in vtn_vector_constructJason Ekstrand2017-02-071-0/+15
* glsl: correct compute shader checks for memoryBarrier functionsMarc Di Luzio2017-02-061-6/+12
* gallium/tgsi: fix oob access in parse instructionLi Qiang2017-02-071-1/+1
* Revert "i965: Disable guardband clipping in the smaller-than-viewport case."Kenneth Graunke2017-02-061-31/+0
* i965: Always scissor on Gen6-7.5 instead of disabling guardband.Kenneth Graunke2017-02-063-48/+5
* i965: Use a better guardband calculation.Jason Ekstrand2017-02-064-82/+126
* i965: Combine the Gen6 SF and Clip viewport atoms.Kenneth Graunke2017-02-063-57/+30
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