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* llvmpipe: enable seamless cube filteringRoland Scheidegger2013-10-211-1/+1
| | | | | Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* gallivm: implement seamless cube filteringRoland Scheidegger2013-10-213-40/+368
| | | | | | | | | | | | | | | | | | | | | | | | | For seamless cube filtering it is necessary to determine new faces and new coords per sample. The logic for this is _seriously_ complex (what needs to happen is very "asymmetric" wrt face, x/y under/overflow), further complicated by the fact that if the 4 samples are in a corner (meaning we only have actually 3 samples, and all 3 are on different faces) then falling off the edge is happening _both_ on x and y axis simultaneously. There was a noticeable performance hit in mesa's cubemap demo when seamless filtering was forced on (just below 10 percent or so in a debug build, when disabling all filtering hacks, otherwise it would probably be a bit more) and when always doing the logic, hence use a branch which it only does it if any of the pixels in a quad (or in two quads) actually hit this. With that there was no measurable performance hit in the cubemap demo (neither in a debug nor release buidl), but this will vary (cubemap demo very rarely hits edges). Might also be different on other cpus, as this forces SoA sampling path which potentially can be quite a bit slower. Note that as for corners, this code gets all the 3 samples which actually exist right, and the 4th texel will simply be the same as one of the others, meaning that filter weights will be a bit wrong. This however should be enough for full OpenGL (but not d3d10) compliance. Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* winsys/radeon: cleanup CS offloadingChristian König2013-10-211-21/+10
| | | | | | | | | Using atomic function for ncs is superfluous since it is protected by a mutex anyway. Also lock the mutex only once while retrieving the next CS for submission. Signed-off-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeon: Enable ARB_texture_mirror_clamp_to_edge.Rico Schüller2013-10-201-0/+1
| | | | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Signed-off-by: Rico Schüller <[email protected]>
* r200: Enable ARB_texture_mirror_clamp_to_edge.Rico Schüller2013-10-201-0/+1
| | | | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Signed-off-by: Rico Schüller <[email protected]>
* gallium: Enable ARB_texture_mirror_clamp_to_edge.Rico Schüller2013-10-201-0/+1
| | | | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Signed-off-by: Rico Schüller <[email protected]>
* swrast: Enable ARB_texture_mirror_clamp_to_edge.Rico Schüller2013-10-201-0/+1
| | | | | | | | | v2: fix commit message Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Signed-off-by: Rico Schüller <[email protected]>
* mesa: Add infrastructure for GL_ARB_texture_mirror_clamp_to_edge.Rico Schüller2013-10-204-4/+12
| | | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Rico Schüller <[email protected]>
* r300g/compiler: Fix unsigned comparison with less than zeroDavid Heidelberger2013-10-211-1/+1
| | | | | | | | | | rc_find_free_temporary_list() returns signed integer (in case of lack of free temporary registers returns -1), so new_index in radeon_rename_regs() should be signed. https://bugs.freedesktop.org/show_bug.cgi?id=54867 Signed-off-by: Marek Olšák <[email protected]>
* r600g/sb: Initialize shader::dce_flags.Vinson Lee2013-10-201-1/+2
| | | | | | | Fixes "Uninitialized scalar field" defect reported by Coverity. Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Vadim Girlin <[email protected]>
* i965: Mark G45 as having surface tile offset support.Kenneth Graunke2013-10-191-0/+1
| | | | | | | Fixes a regression since 02b632d8e8f2b14c155740d28c276b5869305c60. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* glsl: Initialize per_vertex_accumulator::fields.Vinson Lee2013-10-181-1/+2
| | | | | | | Fixes "Uninitialized pointer field" defect reported by Coverity. Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965: Enable OpenGL 3.3 and GLSL 3.30.Kenneth Graunke2013-10-182-2/+2
| | | | | | | | | Everything necessary for these appears to be implemented. We'll want to add more tests to guard against bugs, but it should be functionally complete. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* translate_sse: Fix generated code argument handling for msabi on x86_64Jon TURNEY2013-10-181-3/+11
| | | | | | | | | | | | | | | | translate_sse.c contains code for msabi on x86_64, but it appears to be untested. Currently arguments 1 and 2 passed to the generated code are moved as 32-bit quantities into the registers used by sysvabi, irrespective of the architecture. Since these may be pointers, they must be moved as 64-bit quantities to avoid truncation. Commit f4dd0991719ef3e2606920c5100b372181c60899 disabled tranlate_sse.c on MinGW x86_64, I don't know if was due to this issue, or a different one... Signed-off-by: Jon TURNEY <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* rtasm: Cygwin uses the msabi calling convention on x86_64Jon TURNEY2013-10-181-1/+1
| | | | | | | | | | Cygwin also uses the msabi calling convention on x86_64, not the sysvabi calling convention Signed-off-by: Jon TURNEY <[email protected]> Reviewed-by: Brian Paul <[email protected]> ignored, and an empty message aborts the commit.
* rtasm: The heap is NX on 64-bit Cygwin, so use the rtasm_exec_malloc() ↵Jon TURNEY2013-10-181-1/+1
| | | | | | | | | | | implementation which uses mmap() The heap is NX on 64-bit Cygwin, so use the rtasm_exec_malloc() implementation which uses mmap() to allocate an anonymous page with execute permission, rather than the one which just uses malloc(). Signed-off-by: Jon TURNEY <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* glsl: Fix MSVC build (missing strcasecmp())Paul Berry2013-10-171-1/+7
| | | | | | MSVC doesn't have a strcasecmp() function; it uses _stricmp() instead. Reviewed-by: Jose Fonseca <[email protected]>
* i965: Fold brwInitVtbl() into brwCreateContext().Kenneth Graunke2013-10-173-72/+9
| | | | | | | | | With most of the virtual functions gone, brwInitVtbl() is now tiny. Merging it into the caller allows us to delete the entire file. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Merge brw_destroy_context() into intelDestroyContext().Kenneth Graunke2013-10-173-32/+19
| | | | | | | | | | | | Now that i915 and i965 have been split, the separation between intelDestroyContext and brw_destroy_context is kind of arbitrary. This patch replaces the only brw->vtbl.destroy() call with the body of brw_destroy_context (the only implementation of that virtual function). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Replace dri_bo_release with drm_intel_bo_unreference.Kenneth Graunke2013-10-171-11/+3
| | | | | | | | | | | | dri_bo_release is a helper function that calls drm_intel_bo_unreference but then also sets the pointer to NULL. This is unnecessary, since brw_destroy_context is called from intelDestroyContext, which also frees brw completely. If you're still trying to access them, you've got bigger problems. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Unindent the body of intelDestroyContext.Kenneth Graunke2013-10-171-24/+25
| | | | | | | | Having almost the entire body of the function indented one level for a check that should never happen seems silly. Just early return. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Un-virtualize brw_new_batch().Kenneth Graunke2013-10-173-44/+42
| | | | | | | | Since the i915/i965 split, there's only one implementation of this virtual function. We may as well just call it directly. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Un-virtualize brw_finish_batch().Kenneth Graunke2013-10-173-25/+22
| | | | | | | | Since the i915/i965 split, there's only one implementation of this virtual function. We may as well just call it directly. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* glsl: In update_max_array_access, fix interface instance check.Paul Berry2013-10-171-3/+3
| | | | | | | | | | | | | | | | | | | | In commit f878d20 (glsl: Update ir_variable::max_ifc_array_access properly), I accidentally used the wrong kind of check to determine whether the variable being accessed was an interface instance (I used var->get_interface_type() != NULL when I should have used var->is_interface_instance()). As a result, if an unnamed interface block contained a struct which contained an array, update_max_array_access() would mistakenly interpret the struct as a named interface block and try to dereference a null var->max_ifc_array_access. This patch corrects the check, fixing the null dereference. Fixes piglit test interface-block-struct-nesting. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70368 Reviewed-by: Matt Turner <[email protected]>
* glsl: Treat layout-qualifier-id's as case-insensitive in desktop GLSL.Paul Berry2013-10-171-15/+59
| | | | | | | | | | | | | | | | In desktop GLSL, location qualifiers are case-insensitive. In GLSL ES, they are case-sensitive. This patch handles the difference by using a new function to match layout qualifiers, match_layout_qualifier(), which calls either strcmp() or strcasecmp() as appropriate. Fixes piglit tests: - layout-not-case-sensitive-in.geom - layout-not-case-sensitive-max-vert.geom - layout-not-case-sensitive-out.geom - layout-not-case-sensitive.frag Reviewed-by: Kenneth Graunke <[email protected]>
* st/mesa: add a few comments in st_create_context_priv()Brian Paul2013-10-171-1/+5
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* st/mesa: handle layer and primitive id output and point size inputDave Airlie2013-10-171-0/+12
| | | | | | | This fixes a number of piglit crashes when running on a hacked up llvmpipe. Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* st/mesa: add geometry shader ubo supportDave Airlie2013-10-173-0/+19
| | | | | | | This just adds the missing bits so the ubo tests don't crash. Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa/st: Allow geometry shaders without gl_Position export.Fabian Bieler2013-10-171-2/+0
| | | | | | | | | From the ARB_geometry_shader4 spec (section Geometry Shader outputs): "The built-in special variable gl_Position is intended to hold the homogeneous vertex position. Writing gl_Position is optional." Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* st/mesa, glsl_to_tgsi: add support for geometry shadersBryan Cain2013-10-172-45/+163
| | | | | | | v2 (Bryan Cain <[email protected]>): fix 2D array indexing order. Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa/st: Add VARYING_SLOT_TEX[1-7] to st_translate_geometry_program().Bryan Cain2013-10-171-0/+7
| | | | | | | | | v2 (Paul Berry <[email protected]>: Split out to separate patch (previously this was part of "glsl: add builtins for geometry shaders.") Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* Revert "i965: Create ARGB2101010 DRI configs"Kristian Høgsberg2013-10-161-4/+1
| | | | | | | | | | | | | | | | Exposing 10-bit color configs confuses too many applications that try to use the chooser to pick an 8 bit config. The chooser consider an fbconfig with more bits a better match and will thus give a 10 bit config when an application asks for a config with GLX_RED_SIZE 1 or 8. One key example is glxinfo, which does this, and then doesn't specify that it needs a config where GLX_DRAWABLE_TYPE has the GLX_WINDOW_BIT set. This way it ends up with a 10 bit config that it can't use to create a GLX window and fails to log extensions. This reverts commit f354bcc1770e9df88db51eba5a4543a09ca6d128. https://bugs.freedesktop.org/show_bug.cgi?id=70557
* r600g/sb: fix issue with DCE between GVN and GCM (v2)Vadim Girlin2013-10-174-12/+39
| | | | | | | | | | | | | We can't perform DCE using the liveness pass between GVN and GCM because it relies on the correct schedule, but GVN doesn't care about preserving correctness - it's rescheduled later by GCM. This patch makes dce_cleanup pass perform simple DCE between GVN and GCM instead of relying on liveness pass. Fixes https://bugs.freedesktop.org/show_bug.cgi?id=70088 Signed-off-by: Vadim Girlin <[email protected]>
* glapi: Add missing XML files to Makefile dependencies.Matt Turner2013-10-161-0/+8
| | | | Reviewed-by: Andreas Boll <[email protected]>
* glsl: Optimize mul(a, -1) into neg(a).Matt Turner2013-10-161-0/+23
| | | | | | | | | | | Two extra instructions in some heroesofnewerth shaders, but a win for everything else. total instructions in shared programs: 1531352 -> 1530815 (-0.04%) instructions in affected programs: 121898 -> 121361 (-0.44%) Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Handle printing HW_REGS in dump_instruction().Matt Turner2013-10-161-0/+16
| | | | | | | | | | Scheduling debugging now prints: Instructions before scheduling (reg_alloc 1) 0: linterp vgrf20, hw_reg2, hw_reg3, hw_reg4, 1: linterp vgrf21, hw_reg2, hw_reg3, hw_reg4+16, Reviewed-by: Eric Anholt <[email protected]>
* i965: Print instructions' children during scheduling debugging.Matt Turner2013-10-161-2/+6
| | | | | | | | | | | | | | | | | | Useful for tracking down problems in dependency calculations. Scheduling debugging now prints: clock 2, scheduled: linterp vgrf5, hw_reg2, hw_reg3, hw_reg0, child 0, 53 parents: fb_write (null), (null), (null), (null), child 1, 2 parents: tex vgrf4, vgrf5, (null), (null), child 2, 52 parents: placeholder_halt (null), (null), (null), (null), clock 4, scheduled: linterp vgrf5+1, hw_reg2, hw_reg3, hw_reg0+16, child 0, 52 parents: fb_write (null), (null), (null), (null), child 1, 1 parents: tex vgrf4, vgrf5, (null), (null), now available child 2, 51 parents: placeholder_halt (null), (null), (null), (null), Reviewed-by: Eric Anholt <[email protected]>
* Revert "scons: Fix build when rtti is disabled"José Fonseca2013-10-162-7/+4
| | | | | | | | | | This reverts commit 94d05bf87a21bd364e84f699a0064e5fba58a6f9 as it has a few problems: - it breaks windows builds becuase env[LLVM_CXXFLAGS] is never set there - it is merging not only rtti, but the whole cxxflags (defines etc) which has proven to be a source of troubles (breaks debugging etc.)
* radeonsi: Use 'SI' as the LLVM processor for CIK on LLVM <= 3.3Tom Stellard2013-10-161-0/+4
| | | | | | | | LLVM 3.3 does not know about CIK processors, and the codes paths for SI and CIK are the same. Reviewed-by: Marek Olšák <[email protected]> Cc: "9.2" <[email protected]>
* r600g/compute Improve debugging outputTom Stellard2013-10-162-5/+7
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* clover: Link libclc before running any optimizationsTom Stellard2013-10-161-27/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | This is required in order for clang to correctly handle the OpenCL C barrier() builtin which has the following restrictions acording to the OpenCL 1.1 Specification: If barrier is inside a conditional statement, then all work-items must enter the conditional if any work-item enters the conditional statement and executes the barrier. If barrier is inside a loop, all work-items must execute the barrier for each iteration of the loop before any are allowed to continue execution beyond the barrier. By linking before otimizations, we can replace calls to barrier() with calls to a target specific intrinsic which has the noduplicate attribute This attribute prevents clang from performing optimizations which could violate the above rules. This attribute must be applied to the call instruction that invokes the function, so it is not enough to add this attribute the barrier() declaration. As a bonus this will probably speed up compile times since we will no longer need to run link-time optimizations.
* mesa: change glTexImage[23]DMultisample() internalformat to GLenumBrian Paul2013-10-163-6/+6
| | | | | | To match glext.h and the GL_ARB_texture_multisample extension. However, the GL 4.0 spec and man page say it's GLint. An OpenGL spec bug will be filed.
* svga: minor fix-ups in svga_get_shader_param()Brian Paul2013-10-161-2/+3
| | | | | Fix debug error message. Add switch case for PIPE_SHADER_COMPUTE. Trivial.
* cso: fix incorrect sampler view count in cso_restore_sampler_views()Brian Paul2013-10-161-3/+6
| | | | | | | | | | | | | | | | | | During the recent bind_sampler_states() interface change in gallium we changed the CSO single_sampler_done() function so that if we were decreasing the number of sampler states bound in the driver, we'd null-out the "extra/old" sampler states to unbind them. See commit 1e2fbf265. However, we didn't make the corresponding fix for sampler views. This caused an assertion to fail in the svga driver which checked that the number of sampler views matched the number of sampler states. This patch fixes cso_restore_sampler_views() so that it nulls-out the extra/old sampler views if the number of new views is less than the number of current/old views. Reviewed-by: Jose Fonseca <[email protected]>
* vbo: access VBO memory more efficiently when building display listsBrian Paul2013-10-161-8/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use GL_MAP_INVALIDATE_RANGE, UNSYNCHRONIZED and FLUSH_EXPLICIT flags when mapping VBOs during display list compilation. This mirrors what we do for immediate-mode VBO building in vbo_exec_vtx_map(). This improves performance for applications which interleave display list compilation with execution. For example: glNewList(A); glBegin/End prims; glEndList(); glCallList(A); glNewList(B); glBegin/End prims; glEndList(); glCallList(B); Mesa's vbo module tries to combine the vertex data from lists A and B into the same VBO when there's room. Before, when we mapped the VBO for building list B, we did so with GL_MAP_WRITE_BIT only. Even though we were writing to an unused part of the buffer, the map would stall until the preceeding drawing call finished. Use the extra map flags and FlushMappedBufferRange() to avoid the stall. Reviewed-by: José Fonseca <[email protected]>
* mesa: consolidate cube width=height error checkingBrian Paul2013-10-161-38/+5
| | | | | | | | | | | | | | | Instead of checking width==height in four places, just do it in _mesa_legal_texture_dimensions() where we do the other width, height, depth checks. Similarly, move the check that cube map array depth is a multiple of 6. This change also fixes some missing cube dimension checks for the glTexStorage[23]D() functions. Remove width==height assertion in _mesa_get_tex_max_num_levels() since that's called before the other size checks for glTexStorage. Cc: "9.2" <[email protected]>
* gbm: Add support for gbm bos and surfaces using GBM_FORMAT_ARGB2101010Kristian Høgsberg2013-10-151-0/+6
| | | | | | | | We can now add GBM support for the 10 bit/channel formats which lets us create a gbm surface that we can use with KMS for display hardware that support the format. Signed-off-by: Kristian Høgsberg <[email protected]>
* dri: Add __DRIimage support for the ARGB2101010 formatKristian Høgsberg2013-10-151-0/+10
| | | | | | | We add support for the ARGB2101010 color format to the DRI image extension, which allows DRI loaders to create a __DRIimage with this color format. Signed-off-by: Kristian Høgsberg <[email protected]>
* i965: Create ARGB2101010 DRI configsKristian Høgsberg2013-10-151-1/+4
| | | | | | | | | This commit enables ARGB2101010 system framebuffers (that is, DRI drawables) for the i965 drivers. This is done by generating DRI configs that advertise this color format as well as teaching intelCreateBuffer to pick the right color format when it sees such a DRI config. Signed-off-by: Kristian Høgsberg <[email protected]>
* dri/common: Add support for creating ARGB2101010 configsKristian Høgsberg2013-10-151-0/+10
| | | | | | | | This extends the common dri driver infrastructure with the ability to create __DRIconfigs for 10 bits/channel + 2 bit alphs formats. This still has to be supported and requested by a driver, so this doesn't enable anthing yet. Signed-off-by: Kristian Høgsberg <[email protected]>
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