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* exec_list: Add a foreach_list_typed_from macroRobert Bragg2017-03-091-0/+5
| | | | | | | | | This allows iterating list nodes from a given start point instead of necessarily the list head. Signed-off-by: Robert Bragg <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* i965: Add script to gen code for OA counter queriesRobert Bragg2017-03-093-2/+575
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Avoiding lots of error prone boilerplate and easing our ability to add + maintain support for multiple OA performance counter queries for each generation: This adds a python script to generate code for building up performance_queries from the metric sets and counters described in brw_oa_hsw.xml as well as functions to normalize each counter based on the RPN expressions given. Although the XML file currently only includes a single metric set, the code generated assumes there could be many sets. The metrics as described in XML get translated into C structures which are registered in a brw->perfquery.oa_metrics_table hash table keyed by the GUID of the metric set in XML. v2: numerous python style improvements (Dylan) v3: Makefile.am fixups (Emil) v4: Pattern rule for codegen + orthogonal .c and .h rules (Robert) Signed-off-by: Robert Bragg <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* i965: extend query/counter structs for OA queriesRobert Bragg2017-03-092-1/+21
| | | | | | | | | | | | | | | | | | | | | | | In preparation for generating code from brw_oa_hsw.xml for describing OA performance counter queries this adds some OA specific members to brw_perf_query that our generated code will initialize: - The oa_metric_set_id is the ID we will pass to DRM_IOCTL_I915_PERF_OPEN, and is an ID got via sysfs under: /sys/class/drm/<card>/metrics/<guid/id - The oa_format is the OA report layout we will request from the kernel - The accumulator offsets determine where the different groups of A, B and C counters are located within an intermediate 64bit 'accumulator' buffer. Additionally brw_perf_query_counter now has 64bit or float _read() callback members for OA counters. Signed-off-by: Robert Bragg <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* i965: brw_context.h additions for OA unit query codegenRobert Bragg2017-03-091-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation for generating code from the XML performance counter meta data, this makes some additions to brw_context.h for this code to be able to reference. It adds a brw->perfquery.oa_metrics_table hash table for indexing built up query descriptions by the GUID that is expected to be advertised by the kernel (via sysfs) to be able to use that query. It adds an 'OA_COUNTERS' brw_query_kind to be assigned to queries built up by generated code. It adds a brw->perfquery.sys_vars structure to have a consistent place to represent the different system variables like $EuCoresTotalCount and $EuSlicesTotalCount that are referenced by OA counter normalization equations. Although extending + referencing gen_device_info for these variables was considered, these are some of the (mostly minor) reasons for going with a dedicated structure: - Currently we only need this info for the performance_query backend and it might be a bit tedious to go back and initialize the state for pre-Haswell devinfo structures. - Considering the $SubsliceMask then the requirement for how multiple per-slice masks are packed only comes from how the variables are references by availability tests in XML, and might not be a good general representation for tracking subslice masks if another use case arises. - If we used gen_device_info then we'd likely want to avoid making assumptions about the C types during codegen and adding explicit casts, while that's not necessary with a dedicated struct with all members being uint64_t. - This structure and the code for initializing it is currently shared (just through copy & paste) with a few other projects dealing with OA counters, and that's been convenient so far. Signed-off-by: Robert Bragg <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* i965: XML description of Haswell OA metric setRobert Bragg2017-03-091-0/+998
| | | | | | | | | | | | | | | | | | | | | | In preparation for exposing Gen Observation Architecture performance counters via INTEL_performance_query this adds an XML description for an initial 'Render Metrics Basic Gen7.5' query and corresponding counters. The intention is to auto generate code for building a query from these counters as well as the code for normalizing the individual counters. Note that the upstream for this XML data is currently GPU Top: https://github.com/rib/gputop The files are maintained under gputop-data/ and they are themselves derived from files in an internal 'MDAPI XML' schema. There are scripts under gputop-scripts/ and make rules in gputop-data/Makefile.xml for maintaining these files. Signed-off-by: Robert Bragg <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* nv50/ir: check for origin insn in findOriginForTestWithZeroPierre Moreau2017-03-091-0/+2
| | | | | | | | Function arguments do not have an "origin" instruction, causing a NULL-pointer dereference without this check. Signed-off-by: Pierre Moreau <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* mesa/main: make use of lookup_samplerobj_locked()Samuel Pitoiset2017-03-091-11/+1
| | | | | | | | There is no need to check sampler == 0 twice. This removes now unused _mesa_lookup_samplerobj_locked(). Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* mesa/main: inline {begin,end}_samplerobj_lookups()Samuel Pitoiset2017-03-091-16/+2
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* glsl/blob: clear padding bytesGrazvydas Ignotas2017-03-091-3/+6
| | | | | | | | | | Since blob is intended for serializing data, it's not a good idea to leave padding holes with uninitialized data, which may leak heap contents and hurt compression if the blob is later compressed, like done by shader cache. Clear it. Signed-off-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* util/disk_cache: fix size subtraction on 32bitGrazvydas Ignotas2017-03-091-3/+3
| | | | | | | | | | Negating size_t on 32bit produces a 32bit result. This was effectively adding values close to UINT_MAX to the cache size (the files are usually small) instead of intended subtraction. Fixes 'make check' disk_cache failures on 32bit. Signed-off-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* util/disk_cache: fix compressed size calculationGrazvydas Ignotas2017-03-091-1/+1
| | | | | | | | | It incorrectly doubles the size on each iteration. Fixes: 85a9b1b5 "util/disk_cache: compress individual cache entries" Signed-off-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* glsl: builtin: always return clones of the builtinsLionel Landwerlin2017-03-093-8/+20
| | | | | | | | | | | | | | | | | | | | | | Builtins are created once and allocated using their own private ralloc context. When reparenting IR that includes builtins, we might be steal bits of builtins. This is problematic because these builtins might now be freed when the shader that includes then last is disposed. This might also lead to inconsistent ralloc trees/lists if shaders are created on multiple threads. Rather than including builtins directly into a shader's IR, we should include clones of them in the ralloc context of the shader that requires them. This fixes double free issues we've been seeing when running shader-db on a big multicore (72 threads) server. v2: Also rename _mesa_glsl_find_builtin_function_by_name() to better reflect how this function is used. (Ken) v3: Rename ctx to mem_ctx (Ken) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Delete render ring prelude.Kenneth Graunke2017-03-082-10/+0
| | | | | | | | | | | This was a hook I came up when trying to do the initial performance counter work years ago. Nothing's used it for a long time, and the upcoming performance counter support doesn't want it either. So, goodbye render ring prelude. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* swr: s/uint/enum pipe_render_cond_flag/Vinson Lee2017-03-081-1/+1
| | | | | | | | | | | | | | Fix build error. swr_context.cpp: In function ‘void swr_blit(pipe_context*, const pipe_blit_info*)’: swr_context.cpp:336:44: error: invalid conversion from ‘uint {aka unsigned int}’ to ‘pipe_render_cond_flag’ [-fpermissive] ctx->render_cond_mode); ~~~~~^~~~~~~~~~~~~~~~ Fixes: b0d39384307d ("gallium: s/uint/enum pipe_render_cond_flag/ for set_render_condition()") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100133 Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* radv: Don't flush the CB before doing a fast clear eliminate.Bas Nieuwenhuizen2017-03-091-2/+0
| | | | | | | | | The only way we write CMASK/DCC compressed textures through shaders is fast clears and CMASK/DCC inits, which have their own flushes. Hence the CB cache is always up to date. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Don't emit cache flushes on subpass switch.Bas Nieuwenhuizen2017-03-093-6/+0
| | | | | | | | I think we should only flush right before an action (draw/dispatch etc.), as otherwise it is too easy to issue redundant flushes. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Only flush for the needed stages, and before the flushes.Bas Nieuwenhuizen2017-03-091-6/+1
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Don't invalidate CB/DB for images that aren't modified outside CB/DB.Bas Nieuwenhuizen2017-03-091-9/+19
| | | | | | | | Without stores, the only writes are fast clears, transfers and metadata initialization, each of which have the appropiate invalidations already. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Flush more caches after writes.Bas Nieuwenhuizen2017-03-091-3/+9
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Don't flush for fixed-function reading.Bas Nieuwenhuizen2017-03-091-1/+0
| | | | | | | The data should always be in memory after a src flush. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Invalidate the correct caches for CB/DB dst barriers.Bas Nieuwenhuizen2017-03-091-5/+11
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Determine cache flushes per object.Bas Nieuwenhuizen2017-03-091-17/+19
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* mesa/main: remove unused _mesa_new_texture_image()Samuel Pitoiset2017-03-092-20/+0
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Alejandro Piñeiro <[email protected]>
* radv/ac: fixup texture coord to have right number of channels.Dave Airlie2017-03-092-4/+4
| | | | | | | | Jason has patches to add validation to this area, this should fix radv shaders. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* st/nine: pass NULL to ureg_get_tokens()Timothy Arceri2017-03-092-4/+2
| | | | | | | The number of tokens in never used and the pointer is NULL checked so just pass NULL. Reviewed-by: Axel Davy <[email protected]>
* vc4: Fix math with a condition flag set.Eric Anholt2017-03-082-3/+18
| | | | | | | | | | | Math results land in r4, regardless of the condition. To implement them, we just need to ensure that the results are moved out of r4 (as often happens anyway, the values is live across another math instruction), so that we can attach the condition to the MOV. Fixes dEQP-GLES2.functional.shaders.random.all_features.fragment.93 and a couple others, that were assertion failing that their conditions hadn't been handled during the QIR->QPU stage.
* vc4: Fix register pressure cost estimates when a src appears twice.Eric Anholt2017-03-081-3/+13
| | | | | | | | | | This ended up confusing the scheduler for things like fabs (implemented as fmaxabs x, x) or squaring a number, and it would try to avoid scheduling them because it appeared more expensive than other instructions. Fixes failure to register allocate in dEQP-GLES2.functional.uniform_api.random.3 with almost no shader-db effects (+.35% max temps)
* vc4: Report to shader-db how many threads a fragment shader has.Eric Anholt2017-03-081-0/+7
| | | | | Doing instruction count analysis when we emit the thread switches that will save us from tons of stalls is kind of missing the point.
* Revert "vc4: Lazily emit our FS/VS input loads."Eric Anholt2017-03-084-93/+75
| | | | | | This reverts commit 292c24ddac5acc35676424f05291c101fcd47b3e. It broke a lot of GLES2 deqp, and I see at least one problem that will require some serious rework to fix.
* radeonsi: fix elimination of literal VS outputsMarek Olšák2017-03-081-4/+7
| | | | | | broken when switched to the new intrinsics. Reviewed-by: Samuel Pitoiset <[email protected]>
* loader: Move non-error message to debug levelFabio Estevam2017-03-081-1/+1
| | | | | | | | | | | | | | | | | Currently when running mesa on imx6 the following loader warnings are seen: # kmscube -D /dev/dri/card1 MESA-LOADER: device is not located on the PCI bus MESA-LOADER: device is not located on the PCI bus MESA-LOADER: device is not located on the PCI bus Using display 0x1920948 with EGL version 1.4 As this is not an error message, change it to debug level in order to have a cleaner log output. Signed-off-by: Fabio Estevam <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* android: r600: fix libmesa_amd_common dependencyMauro Rossi2017-03-081-0/+1
| | | | | | | | | | | | | | | Adding libmesa_amd_common dependency and exporting its headers, avoids the following building error: external/mesa/src/gallium/drivers/r600/evergreen_compute.c:29:10: fatal error: 'ac_binary.h' file not found ^ 1 error generated. Fixes: 3bbbb63 "automake: r600: radeonsi: correctly manage libamd_common.la linking" Fixes: 503fb13 "radeon/ac: switch to ac_shader_binary_config_start()" v2 [Emil Velikov: drop unneeded LOCAL_EXPORT_C_INCLUDE_DIRS] Signed-off-by: Emil Velikov <[email protected]>
* gallium/targets: rework the empty targets removalEmil Velikov2017-03-083-6/+3
| | | | | | | | | | | | | | | | | Earlier commit added extra tracking and we've attempted to remove the vdpau/other folder if empty. V2 of said commit dropped the pipe to /dev/null and the explicit "true" override. Sadly both of those are needed since there's no guarantee that the folder will be empty before we [mesa] make install. Since we're bringing those two back, there's no need to track if we've installed anything, and simply do "rm -d foo/ &>/dev/null || true" Tested-by: Andy Furniss <[email protected]> Reported-by: Andy Furniss <[email protected]> Fixes: 1cd4fde053 ("gallium/targets: don't leave an empty target directory(ies)") Signed-off-by: Emil Velikov <[email protected]>
* util/indices: minor clean-upsBrian Paul2017-03-082-5/+2
| | | | Reviewed-by: Edward O'Callaghan <[email protected]>
* radeonsi: s/uint/enum pipe_shader_type/Brian Paul2017-03-082-2/+4
| | | | | | This can probably be done in more places in the driver. Reviewed-by: Edward O'Callaghan <[email protected]>
* gallium: s/uint/enum pipe_render_cond_flag/ for set_render_condition()Brian Paul2017-03-0817-17/+19
| | | | Reviewed-by: Edward O'Callaghan <[email protected]>
* gallium: s/uint/enum pipe_shader_type/ for set_constant_buffer()Brian Paul2017-03-0820-20/+27
| | | | Reviewed-by: Edward O'Callaghan <[email protected]>
* gallium: s/unsigned/enum pipe_shader_type/ for get_compiler_options()Brian Paul2017-03-083-3/+5
| | | | Reviewed-by: Edward O'Callaghan <[email protected]>
* virgl: s/unsigned/enum pipe_shader_type/Brian Paul2017-03-081-3/+3
| | | | Reviewed-by: Edward O'Callaghan <[email protected]>
* swr: s/unsigned/enum pipe_shader_type/Brian Paul2017-03-084-6/+7
| | | | Reviewed-by: Edward O'Callaghan <[email protected]>
* softpipe: s/unsigned/enum pipe_shader_type/Brian Paul2017-03-084-4/+6
| | | | Reviewed-by: Edward O'Callaghan <[email protected]>
* llvmpipe: s/unsigned/enum pipe_shader_type/Brian Paul2017-03-081-1/+1
| | | | Reviewed-by: Edward O'Callaghan <[email protected]>
* freedreno: s/unsigned/enum pipe_shader_type/Brian Paul2017-03-081-1/+1
| | | | Reviewed-by: Edward O'Callaghan <[email protected]>
* etnaviv: s/unsigned/enum pipe_shader_type/Brian Paul2017-03-081-2/+2
| | | | Reviewed-by: Edward O'Callaghan <[email protected]>
* draw: s/unsigned/enum pipe_shader_type/Brian Paul2017-03-084-14/+15
| | | | | | and some s/uint/enum pipe_shader_type/ Reviewed-by: Edward O'Callaghan <[email protected]>
* cso: s/unsigned/enum pipe_shader_type/Brian Paul2017-03-082-10/+12
| | | | Reviewed-by: Edward O'Callaghan <[email protected]>
* gallium: s/unsigned/enum pipe_shader_type/ for pipe_screen::get_shader_param()Brian Paul2017-03-0823-29/+62
| | | | Reviewed-by: Edward O'Callaghan <[email protected]>
* anv: change BLOCK_POOL_MEMFD_SIZE to exactly 2GBTapani Pälli2017-03-081-1/+1
| | | | | | | | | | This is what comment above definition says and change fixes issue with 32bit build where BLOCK_POOL_MEMFD_SIZE is used as ftruncate parameter and constant currently gets converted from 4294967296 to 0. Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Plamena Manolova <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Remove use of deprecated drm_intel_aub routinesChris Wilson2017-03-078-116/+19
| | | | | | | | | | | | | | With mesa/drm commit cd2f91e18db087edf93fed828e568ee53b887860 Author: Kristian Høgsberg Kristensen <[email protected]> Date: Fri Jul 31 10:47:50 2015 -0700 intel: Drop aub dumping functionality the drm_intel_aub routines are mere stubs and do nothing. Likewise remove our invocations. Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* spirv: Silence unused variable warnings in release modeJason Ekstrand2017-03-071-0/+1
| | | | Reviewed-by: Jordan Justen <[email protected]>
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